On 11/05/16 18:22, Laxman Dewangan wrote:
>
> On Wednesday 11 May 2016 09:05 PM, Jon Hunter wrote:
>> On 11/05/16 14:28, Laxman Dewangan wrote:
>>> On Sunday 08 May 2016 05:43 PM, Jon Hunter wrote:
On 06/05/16 16:32, Laxman Dewangan wrote:
> On Friday 06 May 2016 08:07 PM, Jon Hunter wro
On Wednesday 11 May 2016 09:05 PM, Jon Hunter wrote:
On 11/05/16 14:28, Laxman Dewangan wrote:
On Sunday 08 May 2016 05:43 PM, Jon Hunter wrote:
On 06/05/16 16:32, Laxman Dewangan wrote:
On Friday 06 May 2016 08:07 PM, Jon Hunter wrote:
On 06/05/16 11:45, Laxman Dewangan wrote:
+
+/* Las
On 11/05/16 14:28, Laxman Dewangan wrote:
> On Sunday 08 May 2016 05:43 PM, Jon Hunter wrote:
>> On 06/05/16 16:32, Laxman Dewangan wrote:
>>> On Friday 06 May 2016 08:07 PM, Jon Hunter wrote:
On 06/05/16 11:45, Laxman Dewangan wrote:
+
+/* Last entry */
+TEGRA_IO_PAD_M
On Sunday 08 May 2016 05:43 PM, Jon Hunter wrote:
On 06/05/16 16:32, Laxman Dewangan wrote:
On Friday 06 May 2016 08:07 PM, Jon Hunter wrote:
On 06/05/16 11:45, Laxman Dewangan wrote:
+
+/* Last entry */
+TEGRA_IO_PAD_MAX,
Nit should these be TEGRA_IO_PADS_xxx?
Because this was name o
On 06/05/16 16:32, Laxman Dewangan wrote:
>
> On Friday 06 May 2016 08:07 PM, Jon Hunter wrote:
>> On 06/05/16 11:45, Laxman Dewangan wrote:
>> +
>> +/* Last entry */
>> +TEGRA_IO_PAD_MAX,
>> Nit should these be TEGRA_IO_PADS_xxx?
>
> Because this was name of single pad and hence I said
On Friday 06 May 2016 08:07 PM, Jon Hunter wrote:
On 06/05/16 11:45, Laxman Dewangan wrote:
+
+ /* Last entry */
+ TEGRA_IO_PAD_MAX,
Nit should these be TEGRA_IO_PADS_xxx?
Because this was name of single pad and hence I said TEGRA_IO_PAD_XXX.
+};
+
+/* tegra_io_pads_source_volta
On 06/05/16 11:45, Laxman Dewangan wrote:
> The IO pins of Tegra SoCs are grouped for common control of IO
> interface like setting voltage signal levels and power state of
> the interface. The group is generally referred as IO pads. The
> power state and voltage control of IO pins can be done at
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