On 23/01/2015 at 15:50:13 +0800, Jean-Christophe PLAGNIOL-VILLARD wrote :
>
> > On Jan 23, 2015, at 12:07 AM, Nicolas Ferre wrote:
> >
> > Newer SoCs: at91sam9x5, at91sam9n12, sama5d3 and sama5d4 embed a DDR
> > controller
> > and have a different PMC status register layout than the at91sam9g45
> On Jan 23, 2015, at 12:07 AM, Nicolas Ferre wrote:
>
> Newer SoCs: at91sam9x5, at91sam9n12, sama5d3 and sama5d4 embed a DDR
> controller
> and have a different PMC status register layout than the at91sam9g45. Create
> another at91_sam9x5_pm_init() function to match this compatibility.
>
> Si
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