On Wed, Nov 14, 2012 at 11:31:38AM +, Charles Keepax wrote:
> In the absence of a physical reset line the chip is reset by writing the
> first register, which is done after the register patch has been applied.
> This patch synchronises the register cache after the reset to preserve
> any regist
In the absence of a physical reset line the chip is reset by writing the
first register, which is done after the register patch has been applied.
This patch synchronises the register cache after the reset to preserve
any register changes that had been applied.
Signed-off-by: Charles Keepax
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