On 01/29/2018 07:55 PM, Jim Mattson wrote:
Why should this MSR be pass-through? I doubt that it would be accessed
frequently.
True. Will update it to be emulated and allow user-space to set the
value exposed.
On Sun, Jan 28, 2018 at 4:58 PM, KarimAllah Ahmed wrote:
Add direct access to M
Why should this MSR be pass-through? I doubt that it would be accessed
frequently.
On Sun, Jan 28, 2018 at 4:58 PM, KarimAllah Ahmed wrote:
> Add direct access to MSR_IA32_SPEC_CTRL for guests. Future intel processors
> will use this MSR to indicate RDCL_NO (bit 0) and IBRS_ALL (bit 1).
>
> Cc: A
> On 29/01/2018 01:58, KarimAllah Ahmed wrote:
> > Add direct access to MSR_IA32_SPEC_CTRL for guests. Future intel processors
> > will use this MSR to indicate RDCL_NO (bit 0) and IBRS_ALL (bit 1).
>
> This has to be customizable per-VM (similar to the patches Amazon posted
> a while ago for UCOD
On 29/01/2018 01:58, KarimAllah Ahmed wrote:
> Add direct access to MSR_IA32_SPEC_CTRL for guests. Future intel processors
> will use this MSR to indicate RDCL_NO (bit 0) and IBRS_ALL (bit 1).
This has to be customizable per-VM (similar to the patches Amazon posted
a while ago for UCODE_REV for ex
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