Hi guys,
On Fri, Oct 18, 2013 at 04:31:22AM +0100, Jiang Liu (Gerry) wrote:
> On 2013/10/17 23:27, Steven Rostedt wrote:
> > On Thu, 17 Oct 2013 22:40:32 +0800
> > Jiang Liu wrote:
> >
> >
> > You could make the code more concise by limiting your patching ability
> > to
> > branch im
On 2013/10/17 23:27, Steven Rostedt wrote:
On Thu, 17 Oct 2013 22:40:32 +0800
Jiang Liu wrote:
You could make the code more concise by limiting your patching ability to
branch immediates. Then a nop is simply a branch to the next instruction (I
doubt any modern CPUs will choke on this, where
On Thu, 17 Oct 2013 22:40:32 +0800
Jiang Liu wrote:
> >>> You could make the code more concise by limiting your patching ability to
> >>> branch immediates. Then a nop is simply a branch to the next instruction
> >>> (I
> >>> doubt any modern CPUs will choke on this, whereas the architecture
>
On 10/17/2013 05:39 PM, Will Deacon wrote:
> On Wed, Oct 16, 2013 at 06:11:45PM +0100, Jiang Liu wrote:
>> On 10/16/2013 07:46 PM, Will Deacon wrote:
>>>
+ } else {
+ insn = aarch64_insn_gen_nop();
>>>
>>> You could make the code more concise by limiting your patching ability to
On Wed, Oct 16, 2013 at 06:11:45PM +0100, Jiang Liu wrote:
> On 10/16/2013 07:46 PM, Will Deacon wrote:
> >
> >> + } else {
> >> + insn = aarch64_insn_gen_nop();
> >
> > You could make the code more concise by limiting your patching ability to
> > branch immediates. Then a nop is simply
On 10/16/2013 07:46 PM, Will Deacon wrote:
> On Wed, Oct 16, 2013 at 04:18:11AM +0100, Jiang Liu wrote:
>> From: Jiang Liu
>>
>> Optimize jump label implementation for ARM64 by dynamically patching
>> kernel text.
>>
>> Signed-off-by: Jiang Liu
>> Cc: Jiang Liu
>> ---
>> arch/arm64/Kconfig
On Wed, Oct 16, 2013 at 04:18:11AM +0100, Jiang Liu wrote:
> From: Jiang Liu
>
> Optimize jump label implementation for ARM64 by dynamically patching
> kernel text.
>
> Signed-off-by: Jiang Liu
> Cc: Jiang Liu
> ---
> arch/arm64/Kconfig | 1 +
> arch/arm64/include/asm/jump_l
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