On Tue, Sep 23, 2014 at 9:04 AM, Thierry Reding
wrote:
> On Tue, Sep 23, 2014 at 03:06:35PM +0100, Russell King - ARM Linux wrote:
>> On Tue, Sep 23, 2014 at 07:56:01AM -0600, Bjorn Helgaas wrote:
>> > This doesn't require any coordination with the PCI core, so I was just
>> > leaving this up to t
On Tue, Sep 23, 2014 at 03:06:35PM +0100, Russell King - ARM Linux wrote:
> On Tue, Sep 23, 2014 at 07:56:01AM -0600, Bjorn Helgaas wrote:
> > This doesn't require any coordination with the PCI core, so I was just
> > leaving this up to the arch. But I guess I can at least give you my
> > opinion
On Tue, Sep 23, 2014 at 07:56:01AM -0600, Bjorn Helgaas wrote:
> This doesn't require any coordination with the PCI core, so I was just
> leaving this up to the arch. But I guess I can at least give you my
> opinion :)
However, PCI core people have more knowledge of the issues here than I do.
>
On Sun, Sep 7, 2014 at 4:28 AM, Vidya Sagar wrote:
> From: Vidya Sagar
>
> As per PCIe spec, fast back-to-back transactions feature
> is not applicable to PCIe devices. Hence, do not print
> that fast back-to-back trasactions are disabled when
> there is a PCIe device found on the bus
>
> Signed-
Anyone ???
On Sun, Sep 7, 2014 at 3:58 PM, Vidya Sagar wrote:
> From: Vidya Sagar
>
> As per PCIe spec, fast back-to-back transactions feature
> is not applicable to PCIe devices. Hence, do not print
> that fast back-to-back trasactions are disabled when
> there is a PCIe device found on the bus
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