On Tue, Jun 03, 2014 at 10:10:13AM +0200, Linus Walleij wrote:
> On Fri, May 30, 2014 at 10:25 AM, Mika Westerberg
> wrote:
>
> > I'm thinking that could we solve this so that we call
> > acpi_gpiochip_request_interrupts() at the end of gpiochip_irqchip_add()
> > and convert both pinctrl-baytrail
On Fri, May 30, 2014 at 10:25 AM, Mika Westerberg
wrote:
> I'm thinking that could we solve this so that we call
> acpi_gpiochip_request_interrupts() at the end of gpiochip_irqchip_add()
> and convert both pinctrl-baytrail and gpio-lynxpoint to use
> gpiochip_irqchip_add()?
Yes that seems like a
On Fri, May 30, 2014 at 4:12 AM, Zhu, Lejun wrote:
> retval = gpiochip_add(&cg->chip);
> if (retval) {
> dev_warn(&pdev->dev, "add gpio chip error: %d\n", retval);
> return ret;
> }
>
> gpiochip_irqchip_add(&cg->chip, &crystalcove_ir
On Thu, May 29, 2014 at 05:22:05PM +0200, Linus Walleij wrote:
> On Thu, May 29, 2014 at 6:03 PM, Grygorii Strashko
> wrote:
>
> > Also, I'd like to note that GPIO IRQs can be accessible not only
> > when GPIO chips is added, but also when IRQ domain is registered
> > (at least it's valid for DT
On 5/29/2014 9:37 PM, Linus Walleij wrote:
> On Tue, May 27, 2014 at 2:04 PM, Grygorii Strashko
> wrote:
>> On 05/27/2014 11:46 AM, Mika Westerberg wrote:
(...)
>
> My idea is that you should call gpiochip_add() *first* and then
> add the IRQs to the chip. In succession.
>
> Rationale: with dy
On Thu, May 29, 2014 at 6:03 PM, Grygorii Strashko
wrote:
> Also, I'd like to note that GPIO IRQs can be accessible not only
> when GPIO chips is added, but also when IRQ domain is registered
> (at least it's valid for DT cases). In these cases gpiod_to_irq()
> might be not used at all.
Yes. We
Hi All,
On 05/29/2014 06:00 PM, Mika Westerberg wrote:
> On Thu, May 29, 2014 at 03:37:37PM +0200, Linus Walleij wrote:
>> My idea is that you should call gpiochip_add() *first* and then
>> add the IRQs to the chip. In succession.
>>
>> Rationale: with dynamic GPIO numbers, gpio_to_irq()
>> cannot
On Thu, May 29, 2014 at 03:37:37PM +0200, Linus Walleij wrote:
> My idea is that you should call gpiochip_add() *first* and then
> add the IRQs to the chip. In succession.
>
> Rationale: with dynamic GPIO numbers, gpio_to_irq()
> cannot reasonably be working before the gpiochip is added,
> so it s
On Tue, May 27, 2014 at 2:04 PM, Grygorii Strashko
wrote:
> On 05/27/2014 11:46 AM, Mika Westerberg wrote:
> Regarding remove()/suspend() routines, It's like an axiom for me:
> - always disable irq
> - always stop all works/threads created by driver
> - do everything else
> (It's proved by dozens
On Tue, May 27, 2014 at 03:04:09PM +0300, Grygorii Strashko wrote:
> Hi Mika,
>
> On 05/27/2014 11:46 AM, Mika Westerberg wrote:
> > On Tue, May 27, 2014 at 12:24:56PM +0300, Grygorii Strashko wrote:
> +
> + if (retval) {
> + dev_warn(&pdev->dev, "request irq fai
Hi Mika,
On 05/27/2014 11:46 AM, Mika Westerberg wrote:
> On Tue, May 27, 2014 at 12:24:56PM +0300, Grygorii Strashko wrote:
+
+ if (retval) {
+ dev_warn(&pdev->dev, "request irq failed: %d\n", retval);
+ goto out;
+ }
+
+
On 5/27/2014 5:24 PM, Grygorii Strashko wrote:
> Hi Lejun,
>
> On 05/27/2014 08:38 AM, Alexandre Courbot wrote:
>> On Fri, May 23, 2014 at 11:00 AM, Zhu, Lejun
>> wrote:
>>> +static int crystalcove_gpio_probe(struct platform_device *pdev)
>>> +{
>>> + int irq = platform_get_irq(pdev, 0);
On Tue, May 27, 2014 at 12:24:56PM +0300, Grygorii Strashko wrote:
> >> +
> >> + if (retval) {
> >> + dev_warn(&pdev->dev, "request irq failed: %d\n", retval);
> >> + goto out;
> >> + }
> >> +
> >> + retval = gpiochip_add(&cg->chip);
> >> + if (re
Hi Lejun,
On 05/27/2014 08:38 AM, Alexandre Courbot wrote:
> On Fri, May 23, 2014 at 11:00 AM, Zhu, Lejun
> wrote:
>> Devices based on Intel SoC products such as Baytrail have a Power
>> Management IC. In the PMIC there are subsystems for voltage regulation,
>> A/D conversion, GPIO and PWMs. The
On 5/27/2014 1:38 PM, Alexandre Courbot wrote:
> On Fri, May 23, 2014 at 11:00 AM, Zhu, Lejun
> wrote:
>> +static void crystalcove_update_irq_type(int gpio, int type)
>> +{
>> + u8 ctli = GPIO_TO_CTL(gpio, I);
>> +
>> + type &= IRQ_TYPE_EDGE_BOTH;
>> + intel_soc_pmic_clearb(ct
On Tue, May 27, 2014 at 2:38 PM, Alexandre Courbot wrote:
>> + gpiochip_irqchip_add(&cg->chip, &crystalcove_irqchip, 0,
>> +handle_simple_irq, IRQ_TYPE_NONE);
>> +
>> + retval = request_threaded_irq(irq, NULL,
>> crystalcove_gpio_irq_handler,
>> +
On Fri, May 23, 2014 at 11:00 AM, Zhu, Lejun wrote:
> Devices based on Intel SoC products such as Baytrail have a Power
> Management IC. In the PMIC there are subsystems for voltage regulation,
> A/D conversion, GPIO and PWMs. The PMIC in Baytrail-T platform is called
> Crystal Cove.
>
> This patc
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