On Sun, 2 Jul 2017, Ondrej Zary wrote:
> On Sunday 02 July 2017 05:11:27 Finn Thain wrote:
> > On Sat, 1 Jul 2017, Ondrej Zary wrote:
> > > The write corruption is still present - "start" must be rolled back
> > > in both IRQ and timeout cases.
> >
> > Your original algorithm aborts the transfer
On Sunday 02 July 2017 05:11:27 Finn Thain wrote:
> On Sat, 1 Jul 2017, Ondrej Zary wrote:
> > The write corruption is still present - "start" must be rolled back in
> > both IRQ and timeout cases.
>
> Your original algorithm aborts the transfer for a timeout. Same with mine.
I do "start -= 2 * 12
On Sat, 1 Jul 2017, Ondrej Zary wrote:
>
> The write corruption is still present - "start" must be rolled back in
> both IRQ and timeout cases.
Your original algorithm aborts the transfer for a timeout. Same with mine.
The bug must be a elsewhere.
> And 128 B is not enough , 256 is OK (why d
On Saturday 01 July 2017 04:40:53 Finn Thain wrote:
> Ondrej, would you please test this new series?
>
> Changed since v1:
> - PDMA transfer residual is calculated earlier.
> - End of DMA flag check is now polled (if there is any residual).
>
> Changed since v2:
> - Bail out of transfer loops when
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