Hi Kevin,
On Friday 19 December 2014 03:27:35 Rafael J. Wysocki wrote:
> On Thursday, December 18, 2014 11:28:58 PM Laurent Pinchart wrote:
> > Hi Kevin,
>
> [cut]
>
> It would be better to be able to reference count the DMA engine from
> the bus master IMO and arguably you can use the r
On Thursday, December 18, 2014 11:28:58 PM Laurent Pinchart wrote:
> Hi Kevin,
>
[cut]
> > >>
> > >> It would be better to be able to reference count the DMA engine from the
> > >> bus master IMO and arguably you can use the runtime PM framework for
> > >> that. Namely, give bus masters sometin
Hi Kevin,
On Thursday 18 December 2014 13:14:24 Kevin Hilman wrote:
> Laurent Pinchart writes:
> > On Thursday 18 December 2014 02:32:30 Rafael J. Wysocki wrote:
> >> On Wednesday, December 17, 2014 02:15:31 AM Laurent Pinchart wrote:
> >>> On Tuesday 16 December 2014 11:18:33 Tomasz Figa wrote:
Laurent Pinchart writes:
> Hi Rafael,
>
> On Thursday 18 December 2014 02:32:30 Rafael J. Wysocki wrote:
>> On Wednesday, December 17, 2014 02:15:31 AM Laurent Pinchart wrote:
>> > On Tuesday 16 December 2014 11:18:33 Tomasz Figa wrote:
>> >> On Tue, Dec 16, 2014 at 4:53 AM, Laurent Pinchart wrot
Hi Rafael,
On Thursday 18 December 2014 02:32:30 Rafael J. Wysocki wrote:
> On Wednesday, December 17, 2014 02:15:31 AM Laurent Pinchart wrote:
> > On Tuesday 16 December 2014 11:18:33 Tomasz Figa wrote:
> >> On Tue, Dec 16, 2014 at 4:53 AM, Laurent Pinchart wrote:
> >>> On Monday 15 December 2014
On Wednesday, December 17, 2014 02:15:31 AM Laurent Pinchart wrote:
> Hi Tomasz,
>
> On Tuesday 16 December 2014 11:18:33 Tomasz Figa wrote:
> > On Tue, Dec 16, 2014 at 4:53 AM, Laurent Pinchart wrote:
> > > On Monday 15 December 2014 11:39:01 Tomasz Figa wrote:
> > >> On Sat, Dec 13, 2014 at 5:47
Hi Tomasz,
On Tuesday 16 December 2014 11:18:33 Tomasz Figa wrote:
> On Tue, Dec 16, 2014 at 4:53 AM, Laurent Pinchart wrote:
> > On Monday 15 December 2014 11:39:01 Tomasz Figa wrote:
> >> On Sat, Dec 13, 2014 at 5:47 AM, Laurent Pinchart wrote:
> >>> On Friday 12 December 2014 13:15:51 Tomasz Fi
On Tue, Dec 16, 2014 at 4:53 AM, Laurent Pinchart
wrote:
> Hi Tomasz,
>
> On Monday 15 December 2014 11:39:01 Tomasz Figa wrote:
>> On Sat, Dec 13, 2014 at 5:47 AM, Laurent Pinchart wrote:
>> > On Friday 12 December 2014 13:15:51 Tomasz Figa wrote:
>> >> On Fri, Dec 12, 2014 at 5:48 AM, Rafael J.
Hi Tomasz,
On Monday 15 December 2014 11:39:01 Tomasz Figa wrote:
> On Sat, Dec 13, 2014 at 5:47 AM, Laurent Pinchart wrote:
> > On Friday 12 December 2014 13:15:51 Tomasz Figa wrote:
> >> On Fri, Dec 12, 2014 at 5:48 AM, Rafael J. Wysocki wrote:
> >>> On Thursday, December 11, 2014 04:51:37 PM Ul
Geert Uytterhoeven writes:
> On Fri, Dec 12, 2014 at 9:04 PM, Kevin Hilman wrote:
>> An even more exciting problem exists when a CPU is in the same domain as
>> other peripherals, those peripherals are all idle and the power domain
>> is gated. :)
>
> We do have pm_genpd_attach_cpuidle() and pm_
On Fri, Dec 12, 2014 at 9:04 PM, Kevin Hilman wrote:
> An even more exciting problem exists when a CPU is in the same domain as
> other peripherals, those peripherals are all idle and the power domain
> is gated. :)
We do have pm_genpd_attach_cpuidle() and pm_genpd_name_attach_cpuidle()?
Gr{oetj
On Sat, Dec 13, 2014 at 5:04 AM, Kevin Hilman wrote:
> Tomasz Figa writes:
>
> [...]
>
>> We have a power domain, which contains an IOMMU and an IP block, which
>> can do bus transactions through that IOMMU. Of course the IP block is
>> not aware of the IOMMU, because this is just an integration
On Sat, Dec 13, 2014 at 5:47 AM, Laurent Pinchart
wrote:
> Hello,
>
> On Friday 12 December 2014 13:15:51 Tomasz Figa wrote:
>> On Fri, Dec 12, 2014 at 5:48 AM, Rafael J. Wysocki wrote:
>> > On Thursday, December 11, 2014 04:51:37 PM Ulf Hansson wrote:
>> >> On 11 December 2014 at 16:31, Kevin Hil
Hello,
On Friday 12 December 2014 13:15:51 Tomasz Figa wrote:
> On Fri, Dec 12, 2014 at 5:48 AM, Rafael J. Wysocki wrote:
> > On Thursday, December 11, 2014 04:51:37 PM Ulf Hansson wrote:
> >> On 11 December 2014 at 16:31, Kevin Hilman wrote:
> >> > [+ Laurent Pinchart]
> >> >
> >> > Tomasz Figa
Tomasz Figa writes:
[...]
> We have a power domain, which contains an IOMMU and an IP block, which
> can do bus transactions through that IOMMU. Of course the IP block is
> not aware of the IOMMU, because this is just an integration detail and
> on other platforms using the same IP block the IOM
Hi Rafael,
On Fri, Dec 12, 2014 at 5:48 AM, Rafael J. Wysocki wrote:
> On Thursday, December 11, 2014 04:51:37 PM Ulf Hansson wrote:
>> On 11 December 2014 at 16:31, Kevin Hilman wrote:
>> > [+ Laurent Pinchart]
>> >
>> > Tomasz Figa writes:
>> >
>> >> On Thu, Dec 11, 2014 at 8:58 PM, Ulf Hanss
On Thursday, December 11, 2014 04:51:37 PM Ulf Hansson wrote:
> On 11 December 2014 at 16:31, Kevin Hilman wrote:
> > [+ Laurent Pinchart]
> >
> > Tomasz Figa writes:
> >
> >> On Thu, Dec 11, 2014 at 8:58 PM, Ulf Hansson
> >> wrote:
> >
> > [...]
> >
> @@ -988,11 +1107,28 @@ static int rk_
On 11 December 2014 at 16:31, Kevin Hilman wrote:
> [+ Laurent Pinchart]
>
> Tomasz Figa writes:
>
>> On Thu, Dec 11, 2014 at 8:58 PM, Ulf Hansson wrote:
>
> [...]
>
@@ -988,11 +1107,28 @@ static int rk_iommu_probe(struct platform_device
*pdev)
return -ENXIO;
[+ Laurent Pinchart]
Tomasz Figa writes:
> On Thu, Dec 11, 2014 at 8:58 PM, Ulf Hansson wrote:
[...]
>>> @@ -988,11 +1107,28 @@ static int rk_iommu_probe(struct platform_device
>>> *pdev)
>>> return -ENXIO;
>>> }
>>>
>>> + pm_runtime_no_callbacks(dev);
>>> +
On 11 December 2014 at 13:42, Tomasz Figa wrote:
> Hi Ulf,
>
> On Thu, Dec 11, 2014 at 8:58 PM, Ulf Hansson wrote:
>> On 11 December 2014 at 09:26, Tomasz Figa wrote:
>>> This patch modifies the rockchip-iommu driver to consider state of
>>> the power domain the IOMMU is located in. When the pow
Hi Ulf,
On Thu, Dec 11, 2014 at 8:58 PM, Ulf Hansson wrote:
> On 11 December 2014 at 09:26, Tomasz Figa wrote:
>> This patch modifies the rockchip-iommu driver to consider state of
>> the power domain the IOMMU is located in. When the power domain
>> is powered off, the IOMMU cannot be accessed
On 11 December 2014 at 09:26, Tomasz Figa wrote:
> This patch modifies the rockchip-iommu driver to consider state of
> the power domain the IOMMU is located in. When the power domain
> is powered off, the IOMMU cannot be accessed and register programming
> must be deferred until the power domain
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