Re: [RFC PATCH 4/9] cxl/mem: Map memory device registers

2020-11-23 Thread Ben Widawsky
On 20-11-23 11:32:33, Dan Williams wrote: > On Mon, Nov 23, 2020 at 11:20 AM Ben Widawsky wrote: > [..] > > > -ENXIO is fine with me. I just don't see it as often so I don't > > > really know what it is. > > > > > > Bjorn > > > > Dan, Bjorn, I did a fairly randomized look at various probe functio

Re: [RFC PATCH 4/9] cxl/mem: Map memory device registers

2020-11-23 Thread Dan Williams
On Mon, Nov 23, 2020 at 11:20 AM Ben Widawsky wrote: [..] > > -ENXIO is fine with me. I just don't see it as often so I don't > > really know what it is. > > > > Bjorn > > Dan, Bjorn, I did a fairly randomized look at various probe functions and > ENODEV > seems to be more common. My sort of his

Re: [RFC PATCH 4/9] cxl/mem: Map memory device registers

2020-11-23 Thread Ben Widawsky
On 20-11-16 18:23:21, Bjorn Helgaas wrote: > On Mon, Nov 16, 2020 at 03:19:41PM -0800, Dan Williams wrote: > > On Fri, Nov 13, 2020 at 5:12 PM Ben Widawsky wrote: > > > On 20-11-13 12:17:32, Bjorn Helgaas wrote: > > > > On Tue, Nov 10, 2020 at 09:43:51PM -0800, Ben Widawsky wrote: > > > > > > st

Re: [RFC PATCH 4/9] cxl/mem: Map memory device registers

2020-11-17 Thread Jonathan Cameron
On Tue, 10 Nov 2020 21:43:51 -0800 Ben Widawsky wrote: > All the necessary bits are initialized in order to find and map the > register space for CXL Memory Devices. This is accomplished by using the > Register Locator DVSEC (CXL 2.0 - 8.1.9.1) to determine which PCI BAR to > use, and how much of

Re: [RFC PATCH 4/9] cxl/mem: Map memory device registers

2020-11-16 Thread Bjorn Helgaas
On Mon, Nov 16, 2020 at 03:19:41PM -0800, Dan Williams wrote: > On Fri, Nov 13, 2020 at 5:12 PM Ben Widawsky wrote: > > On 20-11-13 12:17:32, Bjorn Helgaas wrote: > > > On Tue, Nov 10, 2020 at 09:43:51PM -0800, Ben Widawsky wrote: > > > > static int cxl_mem_probe(struct pci_dev *pdev, const stru

Re: [RFC PATCH 4/9] cxl/mem: Map memory device registers

2020-11-16 Thread Dan Williams
On Fri, Nov 13, 2020 at 5:12 PM Ben Widawsky wrote: > > On 20-11-13 12:17:32, Bjorn Helgaas wrote: > > On Tue, Nov 10, 2020 at 09:43:51PM -0800, Ben Widawsky wrote: > > > All the necessary bits are initialized in order to find and map the > > > register space for CXL Memory Devices. This is accomp

Re: [RFC PATCH 4/9] cxl/mem: Map memory device registers

2020-11-13 Thread Ben Widawsky
On 20-11-13 12:17:32, Bjorn Helgaas wrote: > On Tue, Nov 10, 2020 at 09:43:51PM -0800, Ben Widawsky wrote: > > All the necessary bits are initialized in order to find and map the > > register space for CXL Memory Devices. This is accomplished by using the > > Register Locator DVSEC (CXL 2.0 - 8.1.9

Re: [RFC PATCH 4/9] cxl/mem: Map memory device registers

2020-11-13 Thread Bjorn Helgaas
On Tue, Nov 10, 2020 at 09:43:51PM -0800, Ben Widawsky wrote: > All the necessary bits are initialized in order to find and map the > register space for CXL Memory Devices. This is accomplished by using the > Register Locator DVSEC (CXL 2.0 - 8.1.9.1) to determine which PCI BAR to > use, and how mu