* Andi Kleen wrote:
> v11: Rebase to perf/core. Fix extra regs. Rename INTX.
Actually, you did not do what I asked you to do, to rename INTX to IN_TX,
you still kept the 'INTX' pattern that is confusingly similar to
interrupts related names like 'INT3'.
I still see, even your latest patch, t
[ FYI, we are still in the merge window when maintainers are very busy, so
don't expect quick replies to mails that are not about merge window
related patches and commits. Those issues are typically handled after
-rc1 has been released, once most of the merge fallout in the upstream
kernel
* Ingo Molnar wrote:
>
> * Ingo Molnar wrote:
>
> > You say it's barebones, yet it does not work :-( How well was this
> > patch-set tested on non-Haswell hardware, which makes up 99.99% of our
> > installed base?
> >
> > In particular, after applying your patches, 'perf top' stopped worki
* Andi Kleen wrote:
> > I found a similar system (not same stepping, but same model) and tested
> > perf top works fine here. Also on a couple of other systems.
> >
> > Since I cannot reproduce I would need your help debugging it.
>
> Ingo, I haven't heard back from you on this.
FYI, the v3.
> I found a similar system (not same stepping, but same model) and tested
> perf top works fine here. Also on a couple of other systems.
>
> Since I cannot reproduce I would need your help debugging it.
Ingo, I haven't heard back from you on this.
You reported an unreproducable bug. I gave you
> How well was this
> patch-set tested on non-Haswell hardware, which makes up 99.99% of our
> installed base?
I tested on a couple systems now and then: usually Haswell, IvyBridge,
sometimes also Westmere and Atom. I don't retest every iteration,
as you know most of the changes you're requestin
* Ingo Molnar wrote:
> You say it's barebones, yet it does not work :-( How well was this
> patch-set tested on non-Haswell hardware, which makes up 99.99% of our
> installed base?
>
> In particular, after applying your patches, 'perf top' stopped working
> on an Intel testbox of mine:
The
* Andi Kleen wrote:
> This is based on v7 of the full Haswell PMU support,
> rebased, and stripped down to the bare bones
Ok, I found some time to still squeeze this into the v3.10 x86 PMU bits
merge window but ran into problems.
You say it's barebones, yet it does not work :-( How well was t
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