Re: pgprot_writecombine() and PATs on x86

2007-04-25 Thread Eric W. Biederman
"Michael S. Tsirkin" <[EMAIL PROTECTED]> writes: >> So in general the pci prefetchable attribute means write-combining as >> well as prefetching is safe. A sane BIOS will allocate prefetchable >> BARS contiguously in the address space. So on a good day you >> can just use one MTRR to map all of

Re: pgprot_writecombine() and PATs on x86

2007-04-25 Thread Michael S. Tsirkin
> So in general the pci prefetchable attribute means write-combining as > well as prefetching is safe. A sane BIOS will allocate prefetchable > BARS contiguously in the address space. So on a good day you > can just use one MTRR to map all of the prefetchable BARs as write-combining. Good point,

Re: pgprot_writecombine() and PATs on x86

2007-04-25 Thread Andi Kleen
On Wednesday 25 April 2007 20:41:08 Dave Jones wrote: > On Wed, Apr 25, 2007 at 08:19:27PM +0200, Andi Kleen wrote: > > On Wednesday 25 April 2007 20:02:26 Roland Dreier wrote: > > > Hi Eric, > > > > > > Where do your patches to add an implementation of > > > pgprot_writecombine() using PATs

Re: pgprot_writecombine() and PATs on x86

2007-04-25 Thread Eric W. Biederman
Roland Dreier <[EMAIL PROTECTED]> writes: > > Roland is the mlx4 sane enough to put the memory that needs > > write-combining a prefetchable bar. So several cards can be combined > > together? > > Yes, it is in a prefetchable BAR. It's the second half of the second > BAR in: > > 0d:00.0 I

Re: pgprot_writecombine() and PATs on x86

2007-04-25 Thread Dave Jones
On Wed, Apr 25, 2007 at 08:19:27PM +0200, Andi Kleen wrote: > On Wednesday 25 April 2007 20:02:26 Roland Dreier wrote: > > Hi Eric, > > > > Where do your patches to add an implementation of > > pgprot_writecombine() using PATs on x86 stand? > > It's on my todo list. Whats the status on

Re: pgprot_writecombine() and PATs on x86

2007-04-25 Thread Eric W. Biederman
Andi Kleen <[EMAIL PROTECTED]> writes: > On Wednesday 25 April 2007 20:02:26 Roland Dreier wrote: >> Hi Eric, >> >> Where do your patches to add an implementation of >> pgprot_writecombine() using PATs on x86 stand? > > It's on my todo list. Basically enabling PAT is easy. Adding the paranoid

Re: pgprot_writecombine() and PATs on x86

2007-04-25 Thread Roland Dreier
> Roland is the mlx4 sane enough to put the memory that needs > write-combining a prefetchable bar. So several cards can be combined > together? Yes, it is in a prefetchable BAR. It's the second half of the second BAR in: 0d:00.0 InfiniBand: Mellanox Technologies Unknown device 634a (rev

Re: pgprot_writecombine() and PATs on x86

2007-04-25 Thread Roland Dreier
> > Where do your patches to add an implementation of > > pgprot_writecombine() using PATs on x86 stand? > > It's on my todo list. Great. Let me know if there's anything I can do to help. > When it's PCI space you can likely just use MTRRs. PAT is mostly useful > for applications that d

Re: pgprot_writecombine() and PATs on x86

2007-04-25 Thread Andi Kleen
On Wednesday 25 April 2007 20:02:26 Roland Dreier wrote: > Hi Eric, > > Where do your patches to add an implementation of > pgprot_writecombine() using PATs on x86 stand? It's on my todo list. > The mlx4 driver I'm > planning on merging for 2.6.22 would really like writecombining, and > I'm i