t;> Simon Horman <ho...@verge.net.au>; Zhou Wang
>>> <wangzh...@hisilicon.com>; Gabriele Paoloni
>>> <gabriele.paol...@huawei.com>; Stanimir Varbanov <svarbanov@mm-
>>> sol.com>; David Daney <david.da...@cavium.com>; linux-
>>> ker...@vge
inghuan Lian ; Richard Zhu
>>> ; Lucas Stach ;
>>> Murali Karicheri ; Thomas Petazzoni
>>> ; Jason Cooper
>>> ; Thierry Reding ;
>>> Simon Horman ; Zhou Wang
>>> ; Gabriele Paoloni
>>> ; Stanimir Varbanov >> sol.com>; David Dane
Hi Arnd,
On Thursday 25 August 2016 06:29 PM, Arnd Bergmann wrote:
> On Thursday, August 18, 2016 6:44:09 PM CEST Kishon Vijay Abraham I wrote:
>> Hi Arnd,
>>
>> On Thursday 04 August 2016 04:43 PM, Arnd Bergmann wrote:
>>> On Thursday, August 4, 2016 3:32:01 PM CEST Kishon Vijay Abraham I wrote:
Hi Arnd,
On Thursday 25 August 2016 06:29 PM, Arnd Bergmann wrote:
> On Thursday, August 18, 2016 6:44:09 PM CEST Kishon Vijay Abraham I wrote:
>> Hi Arnd,
>>
>> On Thursday 04 August 2016 04:43 PM, Arnd Bergmann wrote:
>>> On Thursday, August 4, 2016 3:32:01 PM CEST Kishon Vijay Abraham I wrote:
On Thursday, August 18, 2016 6:44:09 PM CEST Kishon Vijay Abraham I wrote:
> Hi Arnd,
>
> On Thursday 04 August 2016 04:43 PM, Arnd Bergmann wrote:
> > On Thursday, August 4, 2016 3:32:01 PM CEST Kishon Vijay Abraham I wrote:
> >> On Wednesday 03 August 2016 07:09 PM, Joao Pinto wrote:
> >>>
>
On Thursday, August 18, 2016 6:44:09 PM CEST Kishon Vijay Abraham I wrote:
> Hi Arnd,
>
> On Thursday 04 August 2016 04:43 PM, Arnd Bergmann wrote:
> > On Thursday, August 4, 2016 3:32:01 PM CEST Kishon Vijay Abraham I wrote:
> >> On Wednesday 03 August 2016 07:09 PM, Joao Pinto wrote:
> >>>
>
Hi Arnd,
On Thursday 04 August 2016 04:43 PM, Arnd Bergmann wrote:
> On Thursday, August 4, 2016 3:32:01 PM CEST Kishon Vijay Abraham I wrote:
>> On Wednesday 03 August 2016 07:09 PM, Joao Pinto wrote:
>>>
>>> You are rising a topic that we are also addressing in Synopsys.
>>>
>>> For the PCIe RC
Hi Arnd,
On Thursday 04 August 2016 04:43 PM, Arnd Bergmann wrote:
> On Thursday, August 4, 2016 3:32:01 PM CEST Kishon Vijay Abraham I wrote:
>> On Wednesday 03 August 2016 07:09 PM, Joao Pinto wrote:
>>>
>>> You are rising a topic that we are also addressing in Synopsys.
>>>
>>> For the PCIe RC
;> <gabriele.paol...@huawei.com>; Stanimir Varbanov <svarbanov@mm-
>> sol.com>; David Daney <david.da...@cavium.com>; linux-
>> ker...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
>> o...@vger.kernel.org; Carlos Palminha
>> <carlos.palmi...@syno
Jason Cooper
>> ; Thierry Reding ;
>> Simon Horman ; Zhou Wang
>> ; Gabriele Paoloni
>> ; Stanimir Varbanov > sol.com>; David Daney ; linux-
>> ker...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
>> o...@vger.kernel.org; Carlos Palminha
>
-
> ker...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
> o...@vger.kernel.org; Carlos Palminha
> <carlos.palmi...@synopsys.com>
> Subject: Re: Support for configurable PCIe endpoint
>
> Hi,
>
> On Wednesday 03 August 2016 07:09 PM, Joao Pinto wrote:
> >
com>; David Daney ; linux-
> ker...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
> o...@vger.kernel.org; Carlos Palminha
>
> Subject: Re: Support for configurable PCIe endpoint
>
> Hi,
>
> On Wednesday 03 August 2016 07:09 PM, Joao Pinto wrote:
>
On Thursday, August 4, 2016 3:32:01 PM CEST Kishon Vijay Abraham I wrote:
> On Wednesday 03 August 2016 07:09 PM, Joao Pinto wrote:
> >
> > You are rising a topic that we are also addressing in Synopsys.
> >
> > For the PCIe RC hardware validation we are currently using the standard
> >
On Thursday, August 4, 2016 3:32:01 PM CEST Kishon Vijay Abraham I wrote:
> On Wednesday 03 August 2016 07:09 PM, Joao Pinto wrote:
> >
> > You are rising a topic that we are also addressing in Synopsys.
> >
> > For the PCIe RC hardware validation we are currently using the standard
> >
Hi,
On Wednesday 03 August 2016 07:09 PM, Joao Pinto wrote:
> Hi Kishon,
>
> On 8/3/2016 7:03 AM, Kishon Vijay Abraham I wrote:
>> Hi,
>>
>> The PCIe controller present in TI's DRA7 SoC is capable of operating either
>> in
>> Root Complex mode or Endpoint mode. (It uses Synopsys Designware
Hi,
On Wednesday 03 August 2016 07:09 PM, Joao Pinto wrote:
> Hi Kishon,
>
> On 8/3/2016 7:03 AM, Kishon Vijay Abraham I wrote:
>> Hi,
>>
>> The PCIe controller present in TI's DRA7 SoC is capable of operating either
>> in
>> Root Complex mode or Endpoint mode. (It uses Synopsys Designware
Hi,
On Wednesday 03 August 2016 03:17 PM, Christoph Hellwig wrote:
> On Wed, Aug 03, 2016 at 11:33:19AM +0530, Kishon Vijay Abraham I wrote:
>> Hi,
>>
>> The PCIe controller present in TI's DRA7 SoC is capable of operating either
>> in
>> Root Complex mode or Endpoint mode. (It uses Synopsys
Hi,
On Wednesday 03 August 2016 03:17 PM, Christoph Hellwig wrote:
> On Wed, Aug 03, 2016 at 11:33:19AM +0530, Kishon Vijay Abraham I wrote:
>> Hi,
>>
>> The PCIe controller present in TI's DRA7 SoC is capable of operating either
>> in
>> Root Complex mode or Endpoint mode. (It uses Synopsys
Hi Arnd,
On Wednesday 03 August 2016 01:12 PM, Arnd Bergmann wrote:
> On Wednesday, August 3, 2016 11:33:19 AM CEST Kishon Vijay Abraham I wrote:
>> Hi,
>>
>> The PCIe controller present in TI's DRA7 SoC is capable of operating either
>> in
>> Root Complex mode or Endpoint mode. (It uses
Hi Arnd,
On Wednesday 03 August 2016 01:12 PM, Arnd Bergmann wrote:
> On Wednesday, August 3, 2016 11:33:19 AM CEST Kishon Vijay Abraham I wrote:
>> Hi,
>>
>> The PCIe controller present in TI's DRA7 SoC is capable of operating either
>> in
>> Root Complex mode or Endpoint mode. (It uses
On Wednesday, August 3, 2016 10:27:36 AM CEST Christoph Hellwig wrote:
> On Wed, Aug 03, 2016 at 06:03:54PM +0200, Arnd Bergmann wrote:
> > drivers/ntb seems like a reasonable start, while an alternative
> > approach that we have discussed in the past would be based on top
> > of virtio, so we
On Wednesday, August 3, 2016 10:27:36 AM CEST Christoph Hellwig wrote:
> On Wed, Aug 03, 2016 at 06:03:54PM +0200, Arnd Bergmann wrote:
> > drivers/ntb seems like a reasonable start, while an alternative
> > approach that we have discussed in the past would be based on top
> > of virtio, so we
On Wed, Aug 03, 2016 at 06:03:54PM +0200, Arnd Bergmann wrote:
> drivers/ntb seems like a reasonable start, while an alternative
> approach that we have discussed in the past would be based on top
> of virtio, so we could use the existing front-end drivers (net, block,
> v9fs, console, ...).
I
On Wed, Aug 03, 2016 at 06:03:54PM +0200, Arnd Bergmann wrote:
> drivers/ntb seems like a reasonable start, while an alternative
> approach that we have discussed in the past would be based on top
> of virtio, so we could use the existing front-end drivers (net, block,
> v9fs, console, ...).
I
On Wednesday, August 3, 2016 2:47:47 AM CEST Christoph Hellwig wrote:
> On Wed, Aug 03, 2016 at 11:33:19AM +0530, Kishon Vijay Abraham I wrote:
> > Hi,
> >
> > The PCIe controller present in TI's DRA7 SoC is capable of operating either
> > in
> > Root Complex mode or Endpoint mode. (It uses
On Wednesday, August 3, 2016 2:47:47 AM CEST Christoph Hellwig wrote:
> On Wed, Aug 03, 2016 at 11:33:19AM +0530, Kishon Vijay Abraham I wrote:
> > Hi,
> >
> > The PCIe controller present in TI's DRA7 SoC is capable of operating either
> > in
> > Root Complex mode or Endpoint mode. (It uses
Hi Kishon,
On 8/3/2016 7:03 AM, Kishon Vijay Abraham I wrote:
> Hi,
>
> The PCIe controller present in TI's DRA7 SoC is capable of operating either in
> Root Complex mode or Endpoint mode. (It uses Synopsys Designware Core). I'd
> assume most of the PCIe controllers on other platforms that use
Hi Kishon,
On 8/3/2016 7:03 AM, Kishon Vijay Abraham I wrote:
> Hi,
>
> The PCIe controller present in TI's DRA7 SoC is capable of operating either in
> Root Complex mode or Endpoint mode. (It uses Synopsys Designware Core). I'd
> assume most of the PCIe controllers on other platforms that use
On Wed, Aug 03, 2016 at 11:33:19AM +0530, Kishon Vijay Abraham I wrote:
> Hi,
>
> The PCIe controller present in TI's DRA7 SoC is capable of operating either in
> Root Complex mode or Endpoint mode. (It uses Synopsys Designware Core).I'd
> assume most of the PCIe controllers on other platforms
On Wed, Aug 03, 2016 at 11:33:19AM +0530, Kishon Vijay Abraham I wrote:
> Hi,
>
> The PCIe controller present in TI's DRA7 SoC is capable of operating either in
> Root Complex mode or Endpoint mode. (It uses Synopsys Designware Core).I'd
> assume most of the PCIe controllers on other platforms
On Wednesday, August 3, 2016 11:33:19 AM CEST Kishon Vijay Abraham I wrote:
> Hi,
>
> The PCIe controller present in TI's DRA7 SoC is capable of operating either in
> Root Complex mode or Endpoint mode. (It uses Synopsys Designware Core).I'd
> assume most of the PCIe controllers on other
On Wednesday, August 3, 2016 11:33:19 AM CEST Kishon Vijay Abraham I wrote:
> Hi,
>
> The PCIe controller present in TI's DRA7 SoC is capable of operating either in
> Root Complex mode or Endpoint mode. (It uses Synopsys Designware Core).I'd
> assume most of the PCIe controllers on other
Hi,
The PCIe controller present in TI's DRA7 SoC is capable of operating either in
Root Complex mode or Endpoint mode. (It uses Synopsys Designware Core).I'd
assume most of the PCIe controllers on other platforms that use Designware core
should also be capable to operate in endpoint mode. But
Hi,
The PCIe controller present in TI's DRA7 SoC is capable of operating either in
Root Complex mode or Endpoint mode. (It uses Synopsys Designware Core).I'd
assume most of the PCIe controllers on other platforms that use Designware core
should also be capable to operate in endpoint mode. But
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