Re: VST and Sched Load Balance

2005-04-20 Thread Srivatsa Vaddagiri
On Tue, Apr 19, 2005 at 09:07:49AM -0700, Nish Aravamudan wrote: > > + if (jiffies - sd1->last_balance >= interval) { > Sorry for the late reply, but shouldn't this jiffies comparison be > done with time_after() or time_before()? I think it is not needed. The check should b

Re: VST and Sched Load Balance

2005-04-19 Thread Nish Aravamudan
On 4/7/05, Srivatsa Vaddagiri <[EMAIL PROTECTED]> wrote: > Hi, > VST patch (http://lwn.net/Articles/118693/) attempts to avoid useless > regular (local) timer ticks when a CPU is idle. > linux-2.6.11-vatsa/kernel/sched.c | 52 > ++ > 1 files change

Re: VST and Sched Load Balance

2005-04-07 Thread Nick Piggin
Srivatsa Vaddagiri wrote: On Thu, Apr 07, 2005 at 05:10:24PM +0200, Ingo Molnar wrote: Interaction with VST is not a big issue right now because this only matters on SMP boxes which is a rare (but not unprecedented) target for embedded platforms. Well, I don't think VST is targetting just powe

Re: VST and Sched Load Balance

2005-04-07 Thread Srivatsa Vaddagiri
On Thu, Apr 07, 2005 at 05:10:24PM +0200, Ingo Molnar wrote: > Interaction with VST is not a big issue right now because this only matters > on SMP boxes which is a rare (but not unprecedented) target for embedded > platforms. Well, I don't think VST is targetting just power management in embe

Re: VST and Sched Load Balance

2005-04-07 Thread Srivatsa Vaddagiri
[Sorry about sending my response from a different account. Can't seem to access my ibm account right now] * Ingo wrote: > Another, more effective, less intrusive but also more complex approach > would be to make a distinction between 'totally idle' and 'partially > idle or busy' system states. Wh

Re: VST and Sched Load Balance

2005-04-07 Thread Ingo Molnar
* Srivatsa Vaddagiri <[EMAIL PROTECTED]> wrote: > Hi, > VST patch (http://lwn.net/Articles/118693/) attempts to avoid useless > regular (local) timer ticks when a CPU is idle. > > I think a potential area which VST may need to address is scheduler > load balance. If idle CPUs stop taking

Re: VST and Sched Load Balance

2005-04-07 Thread Nick Piggin
Srivatsa Vaddagiri wrote: Hmm ..I guess we could restrict the max time a idle CPU will sleep taking into account its balance interval. But whatever heuristics we follow to maximize balance_interval of about-to-sleep idle CPU, don't we still run the risk of idle cpu being woken up and going immedi

Re: VST and Sched Load Balance

2005-04-07 Thread Srivatsa Vaddagiri
On Thu, Apr 07, 2005 at 11:07:55PM +1000, Nick Piggin wrote: > 3. This is exactly one of the situations that the balancing backoff code >was designed for. Can you just schedule interrupts to fire when the >next balance interval has passed? This may require some adjustments to >the backo

Re: VST and Sched Load Balance

2005-04-07 Thread Nick Piggin
Srivatsa Vaddagiri wrote: I think a potential area which VST may need to address is scheduler load balance. If idle CPUs stop taking local timer ticks for some time, then during that period it could cause the various runqueues to go out of balance, since the idle CPUs will no longer pull tasks f

VST and Sched Load Balance

2005-04-07 Thread Srivatsa Vaddagiri
Hi, VST patch (http://lwn.net/Articles/118693/) attempts to avoid useless regular (local) timer ticks when a CPU is idle. I think a potential area which VST may need to address is scheduler load balance. If idle CPUs stop taking local timer ticks for some time, then during that period i