> PNI (Prescott New Instructions) was the original engineering code name.
> Unfortunately
> it was added too early before the marketing name was known and then it
> couldn't be
> changed anymore.
... and just to make things more fun, SSE4 is sometimes called Penryn
New Instructions -- PNI
On Thursday 03 May 2007 11:02:31 Avi Kivity wrote:
> Andi Kleen wrote:
> > On Thursday 03 May 2007 00:56:26 Ulrich Drepper wrote:
> >
> >> Andi Kleen wrote:
> >>
> >>> Nope. SSE3 != SSSE3. The additional S means Supplemential.
> >>>
> >>> It's probably because the few changes didn't
Andi Kleen wrote:
On Thursday 03 May 2007 00:56:26 Ulrich Drepper wrote:
Andi Kleen wrote:
Nope. SSE3 != SSSE3. The additional S means Supplemential.
It's probably because the few changes didn't justify a SSE4
OK, the problem is that the actual sse3 bit is misnamed. According
On Thursday 03 May 2007 00:56:26 Ulrich Drepper wrote:
> Andi Kleen wrote:
> > Nope. SSE3 != SSSE3. The additional S means Supplemential.
> >
> > It's probably because the few changes didn't justify a SSE4
>
> OK, the problem is that the actual sse3 bit is misnamed. According to
> Intel's docs
On Thursday 03 May 2007 00:56:26 Ulrich Drepper wrote:
Andi Kleen wrote:
Nope. SSE3 != SSSE3. The additional S means Supplemential.
It's probably because the few changes didn't justify a SSE4
OK, the problem is that the actual sse3 bit is misnamed. According to
Intel's docs bit 0 of
Andi Kleen wrote:
On Thursday 03 May 2007 00:56:26 Ulrich Drepper wrote:
Andi Kleen wrote:
Nope. SSE3 != SSSE3. The additional S means Supplemential.
It's probably because the few changes didn't justify a SSE4
OK, the problem is that the actual sse3 bit is misnamed. According
On Thursday 03 May 2007 11:02:31 Avi Kivity wrote:
Andi Kleen wrote:
On Thursday 03 May 2007 00:56:26 Ulrich Drepper wrote:
Andi Kleen wrote:
Nope. SSE3 != SSSE3. The additional S means Supplemential.
It's probably because the few changes didn't justify a SSE4
OK,
PNI (Prescott New Instructions) was the original engineering code name.
Unfortunately
it was added too early before the marketing name was known and then it
couldn't be
changed anymore.
... and just to make things more fun, SSE4 is sometimes called Penryn
New Instructions -- PNI all
Ulrich Drepper wrote:
> Andi Kleen wrote:
>> Nope. SSE3 != SSSE3. The additional S means Supplemential.
>>
>> It's probably because the few changes didn't justify a SSE4
>
> OK, the problem is that the actual sse3 bit is misnamed. According to
> Intel's docs bit 0 of ECX is "sse", the kernel
Andi Kleen wrote:
> Nope. SSE3 != SSSE3. The additional S means Supplemential.
>
> It's probably because the few changes didn't justify a SSE4
OK, the problem is that the actual sse3 bit is misnamed. According to
Intel's docs bit 0 of ECX is "sse", the kernel uses "pni". Too bad.
--
➧ Ulrich
On Thursday 03 May 2007 00:41:22 Ulrich Drepper wrote:
> Note the extra 's'. We use "sse" and "sse2", but "ssse3". I assume
> it's a typo.
Nope. SSE3 != SSSE3. The additional S means Supplemential.
It's probably because the few changes didn't justify a SSE4
-Andi
-
To unsubscribe from this
On Thursday 03 May 2007 01:41:22 Ulrich Drepper wrote:
> Note the extra 's'. We use "sse" and "sse2", but "ssse3". I assume
> it's a typo.
This might not be a typo see http://en.wikipedia.org/wiki/SSSE3
Regards,
ismail
signature.asc
Description: This is a digitally signed message part.
Note the extra 's'. We use "sse" and "sse2", but "ssse3". I assume
it's a typo.
Signed-off-by: Ulrich Drepper <[EMAIL PROTECTED]>
--- arch/i386/kernel/cpu/proc.c 2007-02-15 11:21:18.0 -0800
+++ arch/i386/kernel/cpu/proc.c-new 2007-05-02 15:31:17.0 -0700
@@ -46,7 +46,7 @@
Note the extra 's'. We use sse and sse2, but ssse3. I assume
it's a typo.
Signed-off-by: Ulrich Drepper [EMAIL PROTECTED]
--- arch/i386/kernel/cpu/proc.c 2007-02-15 11:21:18.0 -0800
+++ arch/i386/kernel/cpu/proc.c-new 2007-05-02 15:31:17.0 -0700
@@ -46,7 +46,7 @@
On Thursday 03 May 2007 01:41:22 Ulrich Drepper wrote:
Note the extra 's'. We use sse and sse2, but ssse3. I assume
it's a typo.
This might not be a typo see http://en.wikipedia.org/wiki/SSSE3
Regards,
ismail
signature.asc
Description: This is a digitally signed message part.
On Thursday 03 May 2007 00:41:22 Ulrich Drepper wrote:
Note the extra 's'. We use sse and sse2, but ssse3. I assume
it's a typo.
Nope. SSE3 != SSSE3. The additional S means Supplemential.
It's probably because the few changes didn't justify a SSE4
-Andi
-
To unsubscribe from this list: send
Andi Kleen wrote:
Nope. SSE3 != SSSE3. The additional S means Supplemential.
It's probably because the few changes didn't justify a SSE4
OK, the problem is that the actual sse3 bit is misnamed. According to
Intel's docs bit 0 of ECX is sse, the kernel uses pni. Too bad.
--
➧ Ulrich
Ulrich Drepper wrote:
Andi Kleen wrote:
Nope. SSE3 != SSSE3. The additional S means Supplemential.
It's probably because the few changes didn't justify a SSE4
OK, the problem is that the actual sse3 bit is misnamed. According to
Intel's docs bit 0 of ECX is sse, the kernel uses pni. Too
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