On Fri, 8 May 2015, Ingo Molnar wrote:
>
> * Ingo Molnar wrote:
>
> >
> > * Vince Weaver wrote:
> >
> > > So this is just a warning, and I've reported it before, but the
> > > perf_fuzzer triggers this fairly regularly on my Haswell system.
> > >
> > > It looks like fixed counter 0 (retire
* Ingo Molnar wrote:
>
> * Vince Weaver wrote:
>
> > So this is just a warning, and I've reported it before, but the
> > perf_fuzzer triggers this fairly regularly on my Haswell system.
> >
> > It looks like fixed counter 0 (retired instructions) being set to
> > fffe occasiona
* Vince Weaver wrote:
> On Fri, 1 May 2015, Ingo Molnar wrote:
>
> > So fffe corresponds to 2 events left until overflow,
> > right? And on Haswell we don't set x86_pmu.limit_period AFAICS, so we
> > allow these super short periods.
> >
> > Maybe like on Broadwell we need a quirk
On Fri, 1 May 2015, Ingo Molnar wrote:
> So fffe corresponds to 2 events left until overflow,
> right? And on Haswell we don't set x86_pmu.limit_period AFAICS, so we
> allow these super short periods.
>
> Maybe like on Broadwell we need a quirk on Nehalem/Haswell as well,
> one sim
On Fri, 1 May 2015, Ingo Molnar wrote:
>
> * Vince Weaver wrote:
>
> > So this is just a warning, and I've reported it before, but the
> > perf_fuzzer triggers this fairly regularly on my Haswell system.
> >
> > It looks like fixed counter 0 (retired instructions) being set to
> > ff
* Vince Weaver wrote:
> So this is just a warning, and I've reported it before, but the
> perf_fuzzer triggers this fairly regularly on my Haswell system.
>
> It looks like fixed counter 0 (retired instructions) being set to
> fffe occasionally causes an irq loop storm and gets
>
So this is just a warning, and I've reported it before, but the
perf_fuzzer triggers this fairly regularly on my Haswell system.
It looks like fixed counter 0 (retired instructions) being set to
fffe occasionally causes an irq loop storm and gets stuck
until the PMU state is cleared
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