Hi,
2018-03-03 22:02 GMT+01:00 Alexander Sergeyev :
> Hi,
>
> the microcode revision guidance from Intel is revised once again [1] (1
> Mar).
>
> It looks like the following:
>
>> Intel document only clears the 0xc2 microcode on *some* parts with CPUID
>> 506E3 (INTEL_FAM6_SKYLAKE_DESKTOP stepping
Hi,
the microcode revision guidance from Intel is revised once again [1] (1 Mar).
It looks like the following:
Intel document only clears the 0xc2 microcode on *some* parts with CPUID 506E3
(INTEL_FAM6_SKYLAKE_DESKTOP stepping 3). For the Skylake H/S platform it's OK
but for Skylake E3 which
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