On 30/03/17 05:12, Vikram Mulukutla wrote:
>
> Hi Sudeep,
>
>>
>> Interesting. Just curious if this is r0p0/p1 A53 ? If so, is the errata
>> 819472 enabled ?
>
> Sorry for bringing this up after the loo-ong delay, but I've been
> assured that the A53 involved is > r0p1. I've also confirmed thi
Hi Sudeep,
Interesting. Just curious if this is r0p0/p1 A53 ? If so, is the errata
819472 enabled ?
Sorry for bringing this up after the loo-ong delay, but I've been
assured that the A53 involved is > r0p1. I've also confirmed this
problem on multiple internal platforms, and I'm pretty sur
On 18/11/16 20:22, Vikram Mulukutla wrote:
Hi Sudeep,
Thanks for taking a look!
On 2016-11-18 02:30, Sudeep Holla wrote:
Hi Vikram,
On 18/11/16 02:22, Vikram Mulukutla wrote:
Hello,
This isn't really a bug report, but just a description of a
frequency/IPC
dependent behavior that I'm curi
Hi Sudeep,
Thanks for taking a look!
On 2016-11-18 02:30, Sudeep Holla wrote:
Hi Vikram,
On 18/11/16 02:22, Vikram Mulukutla wrote:
Hello,
This isn't really a bug report, but just a description of a
frequency/IPC
dependent behavior that I'm curious if we should worry about. The
behavior
Hi Vikram,
On 18/11/16 02:22, Vikram Mulukutla wrote:
Hello,
This isn't really a bug report, but just a description of a frequency/IPC
dependent behavior that I'm curious if we should worry about. The behavior
is exposed by questionable design so I'm leaning towards don't-care.
Consider these
Hello,
This isn't really a bug report, but just a description of a
frequency/IPC
dependent behavior that I'm curious if we should worry about. The
behavior
is exposed by questionable design so I'm leaning towards don't-care.
Consider these threads running in parallel on two ARM64 CPUs running
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