On Wed, Aug 27, 2014 at 7:40 PM, Sudeep Holla wrote:
>
>
> On 27/08/14 10:30, byungchul.p...@lge.com wrote:
>>
>> From: Byungchul Park
>>
>> This patch ensures that the cpu being offlined is not present in the
>> affinity mask.
>>
>
> I agree that this patch fixes the issue reported in [1] withou
On Thursday 28 August 2014 02:54 AM, Bjorn Andersson wrote:
> On Wed, Aug 27, 2014 at 3:57 AM, Pramod Gurav
> wrote:
>> This patches adds a call to gpiochip_remove_pin_ranges when
>> gpiochip_irqchip_add fails to release memory allocated for pin_ranges.
>>
>> diff --git a/drivers/pinctrl/qcom/pinc
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
I'm announcing the release of the 3.12.27 kernel.
All users of the 3.12 kernel series must upgrade.
The updated 3.12.y git tree can be found at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git
linux-3.12.y
and can be bro
Am Mittwoch, 27. August 2014, 21:35:28 schrieb Herbert Xu:
Hi Herbert,
> On Tue, Aug 26, 2014 at 11:36:54AM +0200, Stephan Mueller wrote:
> > The max_addtllen and max_req are defined in drbg_cores[] in crypto/drbg.c
> > for each DRBG type. As size_t on a 32 bit system is 32 bit the bit shifts
> >
On Wed, Aug 27, 2014 at 02:30:55PM -0700, Andrew Morton wrote:
> On Wed, 27 Aug 2014 16:22:20 -0500 (CDT) Christoph Lameter
> wrote:
>
> > > Some explanation of why one would use ext4 instead of, say,
> > > suitably-modified ramfs/tmpfs/rd/etc?
> >
> > The NVDIMM contents survive reboot and the
The drbg_healthcheck() contains a test to call the DRBG with an
uninitialized DRBG cipher handle. As this is an inappropriate use of the
kernel crypto API to try to generate random numbers before
initialization, checks verifying for an initialized DRBG during the
generate function have been removed
On Wed, 27 Aug 2014, Guenter Roeck wrote:
> On Wed, Aug 27, 2014 at 12:13:56AM +0200, Beniamino Galvani wrote:
> > This adds a driver for the watchdog timer available in Ricoh RN5T618
> > PMIC. The device supports a programmable expiration time of 1, 8, 32
> > or 128 seconds.
> >
> > Signed-off-by
On Wed, 27 Aug 2014, James Ralston wrote:
> This patch adds the LPC Device IDs for the Intel 9 Series PCH.
>
> Signed-off-by: James Ralston
> ---
> drivers/mfd/lpc_ich.c | 11 +++
> 1 file changed, 11 insertions(+)
Applied, thanks.
> diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lp
On Wed, Aug 27, 2014 at 11:38:43AM -0700, Guenter Roeck wrote:
> On Wed, Aug 27, 2014 at 07:53:06PM +0200, Andreas Werner wrote:
> > Added driver to support the 14F021P00 BMC Hardware Monitoring.
> > The BMC is a Board Management Controller including monitoring of the
> > board voltages.
> >
> > S
On Thu, Aug 21, 2014 at 03:09:12PM +0200, Sebastian Andrzej Siewior wrote:
> On 08/19/2014 05:12 PM, Vinod Koul wrote:
> >>
> >> desc = dmaengine_prep_slave_single(rxchan, …);
> >> rx_cookie = dmaengine_submit(desc);
> >> dma_async_issue_pending(rxchan);
> >>
> >> ssleep(2);
> >>
On 08/27/2014 08:53 PM, Matthew Wilcox wrote:
> On Wed, Aug 27, 2014 at 06:28:25PM +0300, Boaz Harrosh wrote:
>> We set all hd_geometry members to 1, because this way fdisk
>> math will not try its crazy geometry math and get stuff totally wrong.
>>
>> I was trying to get some values that will make
On Wed, 27 Aug 2014, Dmitry Torokhov wrote:
> On Wednesday, August 27, 2014 02:39:36 PM Lee Jones wrote:
> > On Tue, 26 Aug 2014, Chris Zhong wrote:
> > > +
> > > +static struct of_device_id rk808_of_match[] = {
> > > + { .compatible = "rockchip,rk808" },
> > > +};
> > > +MODULE_DEVICE_TABLE(of, r
On 27 August 2014 15:32, Kamalesh Babulal wrote:
> * Vincent Guittot [2014-08-26 13:06:49]:
>
>> This new field cpu_capacity_orig reflects the available capacity of a CPUs
>> unlike the cpu_capacity which reflects the current capacity that can be
>> altered
>> by frequency and rt tasks.
>>
>> Si
On Wed, 27 Aug 2014, Andreas Werner wrote:
> The MEN 14F021P00 Board Management Controller provides an
> I2C interface to the host to access the feature implemented in the BMC.
> The BMC is a PIC Microntroller assembled on CPCI Card from MEN Mikroelektronik
> and on a few Box/Display Computer.
>
On Wed, 2014-08-27 at 16:00 +0200, Tomas Henzl wrote:
> On 08/19/2014 09:25 AM, Ching Huang wrote:
> > From: Ching Huang
> >
> > Add code for supporting Areca new Raid adapter ARC12x4 series.
> >
> > Signed-off-by: Ching Huang
> > ---
>
> Hi Ching,
> please look at the comments below -
>
> > }
Signed-off-by: Geert Uytterhoeven
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 704be0f07f86..f76af4d18ee5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4989,6 +4989,7 @@ L:linux-kernel@vger.kernel.org
S: Maintained
T: git g
On 08/27/2014 09:24 PM, Bjorn Andersson wrote:
> On Tue, Jul 29, 2014 at 11:06 PM, Stephen Boyd wrote:
>> On 07/29, Rob Herring wrote:
> [..]
>>>
>>> You might as well do of_property_read_u32 in the below example.
>>>
>>
>> Fair enough. The example is probably too simple. Things are
>> sometimes s
On Wed, Aug 27, 2014 at 10:33:46AM -0700, Jim Davis wrote:
> On Wed, Aug 27, 2014 at 3:58 AM, Sudip Mukherjee
> wrote:
>
> > Hi,
> > I tried to build next-20140826 with your given config file . But for me
> > everything was fine.
>
> Well, you should be able to reproduce it. Do these steps wor
Some Exynos SoCs have a separate regulator controlling a
Boost 5V supply which goes as input for VBUS regulator.
So adding a control for the same in driver, to enable
vbus supply on the port.
Signed-off-by: Vivek Gautam
---
drivers/phy/phy-exynos5-usbdrd.c | 27 +--
1 f
This USB 3.0 PHY controller is also present on Exynos7
platform, so adding the dependency on ARCH_EXYNOS7 for this driver.
Signed-off-by: Vivek Gautam
---
drivers/phy/Kconfig |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 0d
Adding required support for clocks and additional VBUS regulators
to enable USB 3.0 support on Exynos7 SoC.
This series depends for ACRH_EXYNOS7 support on following series:
[PATCH 00/14] Support 64bit Cortex A57 based Exynos7 SoC
https://www.mail-archive.com/devicetree@vger.kernel.org/msg39392.ht
Exynos7 also has a separate special gate clock going to the IP
apart from the usual AHB clock. So add support for the same.
Signed-off-by: Vivek Gautam
---
drivers/usb/dwc3/dwc3-exynos.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/driv
Exynos7 SoC has now separate gate control for 125MHz pipe3 phy
clock, as well as 60MHz utmi phy clock.
So get the same and control in the phy-exynos5-usbdrd driver.
Signed-off-by: Vivek Gautam
---
.../devicetree/bindings/phy/samsung-phy.txt|4
drivers/phy/phy-exynos5-usbdrd.c
The Exynos-DWC3 USB 3.0 DRD controller is also present on
Exynos7 platform, so adding the dependency on ARCH_EXYNOS7
for this driver.
Signed-off-by: Vivek Gautam
---
drivers/usb/dwc3/Kconfig |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/dwc3/Kconfig b/drivers
Add Renesas SH-Mobile, R-Mobile, and R-Car Platform Device Tree Bindings
Documentation, listing supported SoCs and boards.
This allows to use checkpatch to validate DTSes referring to Renesas
shmobile SoCs, and boards containing those SoCs.
Signed-off-by: Geert Uytterhoeven
---
v2:
- Drop RFC
On 08/27/2014 06:45 AM, Matthew Wilcox wrote:
> One of the primary uses for NV-DIMMs is to expose them as a block device
> and use a filesystem to store files on the NV-DIMM. While that works,
> it currently wastes memory and CPU time buffering the files in the page
> cache. We have support in ex
Dear Webmail User,
This is to inform you that you have exceeded your quota limit of 325MB in our
database e-mail and you need to increase your quota limit of email
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Hi All,
Per my discussion with Matthew, I have agreed to take on maintenance of
platform-drivers-x86.
I have setup a new tree:
git://git.infradead.org/users/dvhart/linux-platform-drivers-x86.git
It currently has the one revert patch I know is pending for this branch in the
for-linus branch and I
From: Darren Hart
Update the general entry for drivers/platform/x86 with myself as
maintainer and point to my tree.
Leave Matthew Garrett as maintainer of the two drivers called out
specifically elsewhere in MAINTAINERS.
Signed-off-by: Darren Hart
Cc: Matthew Garrett
---
MAINTAINERS | 4 ++--
On Mon, Aug 25, 2014 at 12:00:13PM +0200, Hans de Goede wrote:
> I've received a bug report from a user that the touchpad control part
> of the ideapad-laptop ACPI interface does work for him on his
> "Lenovo Yoga 2 13", and that this patch causes a regression for him.
>
> Since it did not work fo
On Wed, Aug 27, 2014 at 04:28:19PM +0900, Minchan Kim wrote:
> On Wed, Aug 27, 2014 at 02:04:38PM +0900, Joonsoo Kim wrote:
> > On Wed, Aug 27, 2014 at 11:51:32AM +0900, Minchan Kim wrote:
> > > Hey Joonsoo,
> > >
> > > On Wed, Aug 27, 2014 at 10:26:11AM +0900, Joonsoo Kim wrote:
> > > > Hello, Mi
* Tony Lindgren | 2014-08-27 13:23:14 [-0700]:
>> which means I just enable DMA mode in UART and disable it. No DMA
>> operations were performed.
>> With this change I see a lost character now and then which means the
>> UART-IP goes into off and loses its context. Good. However I don't see
>> cor
On Thu, Aug 28, 2014 at 12:44:18AM +0200, Javier Martinez Canillas wrote:
> On Wed, Aug 27, 2014 at 11:03 PM, Tomasz Figa wrote:
> This is the case for Chromebooks as well but the solution implemented
> in the downstream Chrome OS 3.8 kernel is what Tomasz suggested
*sigh* This is not what you
On 2014年08月28日 07:37, Rafael J. Wysocki wrote:
> On Wednesday, August 27, 2014 03:11:29 PM Lan Tianyu wrote:
>> Deadlock is possible when CPU hotplug and evaluating ACPI method happen
>> at the same time.
>>
>> During CPU hotplug, acpi_cpu_soft_notify() is called under the CPU hotplug
>> lock. The
When CONFIG_PM_RUNTIME is not set, the following issues are seen:
* warning message at compilation time:
warning: 'bmc150_accel_get_startup_times' defined but not used
[-Wunused-function]
* bmc150_accel_set_power_state() will always fail and reading the
accelerometer data is impossible;
Hi,
The following patchset fixes a couple of minor issues with the BMC150
accelerometer driver and, also, adds support for more Bosch accelerometer chips
that are basically identical to BMC150 or have only the resolution different.
So, it makes sense to reuse this existing driver.
All the acceler
On pon, 2014-08-18 at 10:34 +0200, Javier Martinez Canillas wrote:
> If devm_rtc_device_register() fails a dev_err() is already
> reported so there is no need to do an additional dev_info().
>
> Signed-off-by: Javier Martinez Canillas
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
>
The following chips are either similar or have only the resolution
different. Hence, change this driver to support these chips too:
BMI055 - combo chip (accelerometer part is identical to BMC150's)
BMA255 - identical to BMC150's accelerometer
BMA222 - 8 bit resolution
BMA250 - 10 bit resolution
BM
According to documentation ([1] - page 27), the range for 16G is
7.81mg/LSB. Converted to SI, this is:
7.81 * 10^-3 * 9.80665 m/s^2 / LSB = 0.0765899365 m/s^2 / LSB
[1]
http://ae-bst.resource.bosch.com/media/products/dokumente/bmc150/BST-BMC150-DS000-04.pdf
Signed-off-by: Laurentiu Palcu
--
Hi Linus,
The major changes for 3.17 already went via Greg-KH's tree this time
as well; this is a small pull request for dma-buf - all documentation
related.
Could you please pull?
The following changes since commit f1bd473f95e02bc382d4dae94d7f82e2a455e05d:
Merge branch 'sec-v3.17-rc2' of
gi
(2014/08/28 0:54), Luis Henriques wrote:
> Hi,
>
> Not really a complete review, but just 2 comments on this script:
>
> On Tue, Aug 26, 2014 at 11:15:18AM +, Masami Hiramatsu wrote:
> ...
>> +prlog() { # messages
>> + echo $@ | tee -a $LOG_FILE
>> +}
>> +catlog() { #file
>> + cat $1 | tee
On Thursday 28 August 2014 08:59:19 Caesar Wang wrote:
> Thermal is TS-ADC Controller module supports user-defined mode and automatic
> mode.
>
> User-defined mode refers,TSADC all the control signals entirely by software
> writing to register for direct control.
>
> Automaic mode refers to the
Hi Changman,
> -Original Message-
> From: Changman Lee [mailto:cm224@samsung.com]
> Sent: Thursday, August 28, 2014 9:48 AM
> To: Chao Yu
> Cc: Jaegeuk Kim; linux-kernel@vger.kernel.org;
> linux-f2fs-de...@lists.sourceforge.net
> Subject: Re: [f2fs-dev] [PATCH] f2fs: reposition unlock
Hi Andrew, could you please apply?
-=-=-=-=-=-=-=-=-=# Don't remove this line #=-=-=-=-=-=-=-=-=-
This patch avoids fuse hangs on sh4 by flushing the cache on
get_user_pages_fast(). This is not necessary a good thing to do,
but get_user_pages() does this, so get_user_pages_fast() should too.
Ple
On 08/15/2014 09:03 AM, Marc Zyngier wrote:
+
+static struct irq_chip gicv2m_chip;
+
+#ifdef CONFIG_OF
Is there any reason why this should be guarded by CONFIG_OF? Surely the
v2m capability should only be enabled if OF is.
[Suravee]
We are also planning to support ACPI in the future also, w
On Wed, Aug 27, 2014 at 02:31:24PM -0700, Randy Dunlap wrote:
> From: Randy Dunlap
>
> Fix kernel-doc warnings in regulator header files:
Applied, thanks.
signature.asc
Description: Digital signature
On 08/14/2014 12:55 PM, Mark Rutland wrote:
On Wed, Aug 13, 2014 at 04:00:40PM +0100, suravee.suthikulpa...@amd.com wrote:
From: Suravee Suthikulpanit
ARM GICv2m specification extends GICv2 to support MSI(-X) with
a new set of register frame. This patch introduces support for
the non-secure
This patchset clean up codes to improve readability as following and support
the RTC of Exynos3250 SoC.
- Remove global variables and then use new s3c_rtc structure
- Remove warn message with checking checkpatch script
- Use variant structure according to SoC type instead of legacy enum
variable(s
With some versions of gcc (e.g. 4.1.2):
drivers/pwm/core.c: In function ‘pwm_get’:
drivers/pwm/core.c:610: warning: ‘polarity’ may be used uninitialized in this
function
drivers/pwm/core.c:609: warning: ‘period’ may be used uninitialized in this
function
While these are false positives, we can
This patch add s3c_rtc_data structure to variant data according to SoC type.
The s3c_rtc_data structure includes some functions to control RTC operation
and specific data dependent on SoC type.
Signed-off-by: Chanwoo Choi
Acked-by: Kyungmin Park
Cc: Alessandro Zummo
Cc: Kukjin Kim
Cc: Andrew M
On 08/28/2014 09:06 AM, Vinod Koul wrote:
> On Thu, Aug 21, 2014 at 03:09:12PM +0200, Sebastian Andrzej Siewior wrote:
>> On 08/19/2014 05:12 PM, Vinod Koul wrote:
desc = dmaengine_prep_slave_single(rxchan, …);
rx_cookie = dmaengine_submit(desc);
dma_async_issue_pend
This patch define s3c_rtc structure including necessary variables for S3C RTC
device instead of global variables. This patch improves the readability by
removing global variables.
Signed-off-by: Chanwoo Choi
Acked-by: Kyungmin Park
Cc: Alessandro Zummo
Cc: Andrew Morton
Cc: Kukjin Kim
---
dr
This patch add support for RTC of Exynos3250 SoC. The Exynos3250 needs source
clock(32.768KHz) for RTC block. If source clock of RTC is registerd on clock
list of common clk framework, Exynos RTC drvier have to control this clock.
Clock list for s3c-rtc device:
- rtc : CLK_RTC of CLK_GATE_IP_PERIR
This patch fix wrong compatible string of Exynos3250 RTC (Real-Time Clock) dt
node. The RTC of Exynos3250 must need additional source clock (XrtcXTI).
Signed-off-by: Chanwoo Choi
Acked-by: Kyungmin Park
Cc: Alessandro Zummo
Cc: Kukjin Kim
Cc: Andrew Morton
---
arch/arm/boot/dts/exynos3250.dt
This patch remove warning message when checking codeing style with checkpatch
script and reduce un-necessary i2c read operation on s3c_rtc_enable.
WARNING: line over 80 characters
#406: FILE: drivers/rtc/rtc-s3c.c:406:
+ if ((readw(info->base + S3C2410_RTCCON)
This set of patches contains various improvement and fixes
for exynos_drm ipp framework.
The patchset is based on exynos-drm-next branch.
IPP framework was tested for regressions on exynos4210-trats target.
In the 2nd version of the series I have included changes proposed by Joonyoung
Shim.
I ha
Events were removed only during stop command, as a result
there were memory leaks if program prematurely exited.
This patch fixes it.
Signed-off-by: Andrzej Hajda
Reviewed-by: Joonyoung Shim
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 155
1 file changed, 78 i
On file close driver should remove only command nodes created
via this file.
Signed-off-by: Andrzej Hajda
Reviewed-by: Joonyoung Shim
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
b/dr
FIMC in default mode of operation uses only one input buffer,
but the driver used also second buffer, as a result only the
first frame was processed correctly. The patch fixes it.
Signed-off-by: Andrzej Hajda
Reviewed-by: Joonyoung Shim
---
drivers/gpu/drm/exynos/exynos_drm_fimc.c | 16
Since file pointer is preserved in c_node passing it
as argument in node functions is redundant.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
b/
Memory shouldn't be freed when hardware is still running.
Signed-off-by: Andrzej Hajda
Reviewed-by: Joonyoung Shim
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
b/drivers/g
Command node should contain file reference to distinguish commands
created by different processes.
Signed-off-by: Andrzej Hajda
Reviewed-by: Joonyoung Shim
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 5 ++---
drivers/gpu/drm/exynos/exynos_drm_ipp.h | 2 ++
2 files changed, 4 insertions(+), 3
Process should not have access to ipp nodes created by another
process. The patch adds necessary checks.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm
Overflow bits shall be cleared by H/W.
Signed-off-by: Andrzej Hajda
Reviewed-by: Joonyoung Shim
---
drivers/gpu/drm/exynos/exynos_drm_fimc.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimc.c
b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
index 34367ff..
All pending works should be canceled prior to its removal.
Signed-off-by: Andrzej Hajda
Reviewed-by: Joonyoung Shim
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
b/drivers/gpu/drm/exynos/exynos_drm_i
PM callbacks in ipp core do nothing, so the patch removes it.
Signed-off-by: Andrzej Hajda
Reviewed-by: Joonyoung Shim
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 51 -
1 file changed, 51 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
b/dri
Type casting should be avoided if possible. In case of
work_struct it can be simply replaced by reference to member field.
Signed-off-by: Andrzej Hajda
Reviewed-by: Joonyoung Shim
---
drivers/gpu/drm/exynos/exynos_drm_fimc.c| 2 +-
drivers/gpu/drm/exynos/exynos_drm_gsc.c | 3 +--
driver
The patch introduces ipp_clean_mem_nodes function which replaces
redundant code. Additionally memory node function definitions
are moved up to increase its visibility.
Signed-off-by: Andrzej Hajda
Reviewed-by: Joonyoung Shim
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 229 +++-
In case of allocation errors some already allocated buffers
were not freed. The patch fixes it.
Signed-off-by: Andrzej Hajda
Reviewed-by: Joonyoung Shim
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 67 -
1 file changed, 32 insertions(+), 35 deletions(-)
diff --
The patch removes redundant H/W activation.
Signed-off-by: Andrzej Hajda
Reviewed-by: Joonyoung Shim
---
drivers/gpu/drm/exynos/exynos_drm_fimc.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimc.c
b/drivers/gpu/drm/exynos/exynos_drm
The nodes should be removed before removing command node.
Signed-off-by: Andrzej Hajda
Reviewed-by: Joonyoung Shim
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
b/drivers/gpu/drm/exynos/exynos_drm_ip
The patch removes redundant checks, redundant HW reads
and simplifies code.
Signed-off-by: Andrzej Hajda
Reviewed-by: Joonyoung Shim
---
v2:
- fixed bit cleaning operation
---
drivers/gpu/drm/exynos/exynos_drm_fimc.c | 64
1 file changed, 15 insertions(+), 49 de
Since command node have file pointer dev field became useless.
Signed-off-by: Andrzej Hajda
Reviewed-by: Joonyoung Shim
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 1 -
drivers/gpu/drm/exynos/exynos_drm_ipp.h | 2 --
2 files changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_
Hi Kever,
On Thu, Aug 28, 2014 at 02:40:17AM +0100, Kever Yang wrote:
> We need use the hrtimer, which need the arch-timer to be 'always-on'
I asked a question on the last posting [1]. Can you please confirm
either way?
Thanks,
Mark.
[1] lists.infradead.org/pipermail/linux-arm-kernel/2014-Augus
On 08/13/2014 09:56 PM, Jingoo Han wrote:
On Thursday, August 14, 2014 12:01 AM, Suravee Suthikulpanit wrote:
From: Suravee Suthikulpanit
ARM GICv2m specification extends GICv2 to support MSI(-X) with
a new set of register frame. This patch introduces support for
the non-secure GICv2m regis
On pon, 2014-08-18 at 10:34 +0200, Javier Martinez Canillas wrote:
> The max77686 mfd driver adds a regmap IRQ chip which creates an
> IRQ domain that is used to map the virtual RTC alarm1 interrupt.
>
> The RTC driver assumes that this will always be true since the
> PMIC IRQ is a required proper
Sorry for top-posting but it looks like I have to improve my copy-pasting
techniques. :) The sensitivity value computed in the first patch, 76590, turned
into 75590 in the last... :/
Please, go ahead and review the patch and I'll fix this in a subsequent
revision.
thanks,
laurentiu
On Thu, Aug 2
On Thu, Aug 28, 2014 at 07:50:36AM +0100, Alexander Holler wrote:
> Am 27.08.2014 18:37, schrieb Stephen Warren:
> > Of course, there are probably cases where we could/should add some more
> > phandles/... and likewise cases where we shouldn't. That's why detailed
> > research is needed.
>
> Just
On Thu, 28 Aug 2014, Rafael J. Wysocki wrote:
> On Wednesday, August 27, 2014 10:32:23 PM Thomas Gleixner wrote:
> > void suspend_device_irqs(void)
> > {
> > for_each_irq_desc(irq, desc) {
> > /* Disable the interrupt unconditionally */
> > disable_irq(irq);
[cc-ing Will for the VDSO bits]
Hi Sonny,
On 27/08/14 22:03, Sonny Rao wrote:
> This is a bug fix for using physical arch timers when
> the arch_timer_use_virtual boolean is false. It restores the
> arch_counter_get_cntpct() function after removal in
>
> 0d651e4e "clocksource: arch_timer: use v
> The following chips are either similar or have only the resolution
> different. Hence, change this driver to support these chips too:
> BMI055 - combo chip (accelerometer part is identical to BMC150's)
> BMA255 - identical to BMC150's accelerometer
> BMA222 - 8 bit resolution
> BMA250 - 10 bit r
On Thu, Aug 28, 2014 at 04:33:31AM +0100, Doug Anderson wrote:
> Hi,
>
> On Wed, Aug 27, 2014 at 7:58 PM, Olof Johansson wrote:
> > On Wed, Aug 27, 2014 at 5:56 PM, Stephen Boyd wrote:
> >> On 08/27/14 15:33, Olof Johansson wrote:
> >>> On Wed, Aug 27, 2014 at 3:26 PM, Stephen Boyd
> >>> wrote
On Wed, Aug 27, 2014 at 10:30:06AM +0100, byungchul.p...@lge.com wrote:
> From: Byungchul Park
>
> This reverts commit 601c942176d8ad8334118bddb747e3720bed24f8.
>
> This patch is designed to ensure that the cpu being offlined is not
> present in the affinity mask. But it is a bad idea to overwri
(2014/08/27 22:02), Wang Nan wrote:
> Copy old kprobe to newly alloced optimized_kprobe before
> arch_prepare_optimized_kprobe(). Original kprove can brings more
> information to optimizer.
>
> Signed-off-by: Wang Nan
> Cc: Russell King
> Cc: "David A. Long"
> Cc: Jon Medhurst
> Cc: Taras Kon
On 28/08/14 10:38, Will Deacon wrote:
On Wed, Aug 27, 2014 at 10:30:06AM +0100, byungchul.p...@lge.com wrote:
From: Byungchul Park
This reverts commit 601c942176d8ad8334118bddb747e3720bed24f8.
This patch is designed to ensure that the cpu being offlined is not
present in the affinity mask.
On Thu, Aug 28, 2014 at 10:49:54AM +0100, Sudeep Holla wrote:
>
>
> On 28/08/14 10:38, Will Deacon wrote:
> > On Wed, Aug 27, 2014 at 10:30:06AM +0100, byungchul.p...@lge.com wrote:
> >> From: Byungchul Park
> >>
> >> This reverts commit 601c942176d8ad8334118bddb747e3720bed24f8.
> >>
> >> This p
(2014/08/27 22:02), Wang Nan wrote:
> This patch improves arm instruction decoder, allows it check whether an
> instruction is a stack store operation. This information is important
> for kprobe optimization.
>
> For normal str instruction, this patch add a series of _SP_STACK
> register indicator
On 08/28/2014 12:02 AM, Greg KH wrote:
> On Wed, Aug 27, 2014 at 12:23:39PM -0700, Greg KH wrote:
>> On Wed, Aug 27, 2014 at 03:11:10PM +0300, Roger Quadros wrote:
>>> If user specifies that USB autosuspend must be disabled by module
>>> parameter "usbcore.autosuspend=-1" then we must prevent
>>> a
On 28/08/14 10:50, Will Deacon wrote:
On Thu, Aug 28, 2014 at 10:49:54AM +0100, Sudeep Holla wrote:
On 28/08/14 10:38, Will Deacon wrote:
On Wed, Aug 27, 2014 at 10:30:06AM +0100, byungchul.p...@lge.com wrote:
From: Byungchul Park
This reverts commit 601c942176d8ad8334118bddb747e3720bed2
From: Todd Poynor
USB: OTG: Hold wakeupsource when VBUS present
Purpose of this is to prevent the system to enter into
suspend state from USB peripheral traffic by hodling a
wakeupsource when USB(otg) is connected and enumerated
in peripheral mode(say adb).
Disabled by default, can enable with:
From: Todd Poynor
usb: otg: Temporarily hold wakeupsource on charger and disconnect events
Allow other parts of the system to react to the charger connect/disconnect
event without allowing the system to suspend before the other parts can process
the event. This wakeup_source times out after 2 se
Hello Mark,
> On 28/08/2014, at 10:28, Mark Brown wrote:
>> Yes, AFAIK the bootloader (none of them because Chromebooks use two
>> chained U-boots) change the regulators default opmode so once is set
>> to OFF on .disable, that value is preserved on warm reboot. This made
>> sense with the Chrome
From: Todd Poynor
usb: otg: Temporarily hold wakeupsource on charger and disconnect events
Allow other parts of the system to react to the charger connect/disconnect
event without allowing the system to suspend before the other parts can process
the event. This wakeup_source times out after 2 se
Add an appendix briefly describing tools that can be used to test SCHED_DEADLINE
(and the scheduler in general). Links to where source code of the tools is
hosted
are also provided.
Signed-off-by: Juri Lelli
Cc: Randy Dunlap
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Henrik Austad
Cc: Dario Fagg
Hello everyone,
This is version 3 of a small patchset that fixes and improves SCHED_DEADLINE
documentation.
Patch 1/4 fixes and clarifies terminology; patch 2/4 aligns Section 4 to
the current interface; patch 3/4 improves and clarifies what admission
control means on UP an SMP systems; patch 4/4
From: Luca Abeni
Admission control is of key importance for SCHED_DEADLINE, since it guarantees
system schedulability (or tells us something about the degree of guarantees
we can provide to the user).
This patch improves and clarifies bits and pieces regarding AC, both for UP
and SMP systems.
S
From: Luca Abeni
Several small changes regarding SCHED_DEADLINE documentation that fix
terminology and improve clarity and readability:
- "current runtime" becomes "remaining runtime"
- readablity of an equation is improved by introducing more spacing
- clarify when admission control will c
Section 4 intro was still describing the old interface. Rewrite it.
Signed-off-by: Juri Lelli
Signed-off-by: Luca Abeni
Cc: Randy Dunlap
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Henrik Austad
Cc: Dario Faggioli
Cc: Juri Lelli
Cc: linux-...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
On Thu, Aug 28, 2014 at 11:59:16AM +0200, Javier Martinez Canillas wrote:
> > On 28/08/2014, at 10:28, Mark Brown wrote:
> >> Yes, AFAIK the bootloader (none of them because Chromebooks use two
> >> chained U-boots) change the regulators default opmode so once is set
> >> to OFF on .disable, that
>-Original Message-
>From: Wood Scott-B07421
>Sent: Thursday, August 28, 2014 7:34 AM
>To: Lu Jingchang-B35083
>Cc: mturque...@linaro.org; linuxppc-...@lists.ozlabs.org; linux-
>ker...@vger.kernel.org; linux-arm-ker...@lists.infradead.org
>Subject: Re: [RESEND] clk: ppc-corenet: Add Freesca
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