From: "Suzuki K. Poulose"
At the moment we run through the arm64_features capability list for
each CPU and set the capability if one of the CPU supports it. This
could be problematic in a heterogeneous system with differing capabilities.
Delay the CPU feature checks until all the enabled CPUs are
From: "Suzuki K. Poulose"
Documentation of the infrastructure
Signed-off-by: Suzuki K. Poulose
---
Documentation/arm64/cpu-feature-registers.txt | 209 +
1 file changed, 209 insertions(+)
create mode 100644 Documentation/arm64/cpu-feature-registers.txt
diff --git a/D
Hello.
On 9/16/2015 5:08 PM, Sudip Mukherjee wrote:
On error find_tt() returns either a NULL pointer or the error value in
ERR_PTR. But we were dereferencing it directly without even checking if
find_tt() returned a valid pointer or not.
Signed-off-by: Sudip Mukherjee
---
drivers/usb/host/e
From: "Suzuki K. Poulose"
The FP/ASIMD is detected in fpsimd_init(), which is built-in
unconditionally. Lets move the hwcap handling to the central place.
Signed-off-by: Suzuki K. Poulose
---
arch/arm64/kernel/cpufeature.c |2 ++
arch/arm64/kernel/fpsimd.c | 16 +---
2 fi
From: "Suzuki K. Poulose"
Extend struct arm64_cpu_capabilities to handle the HWCAP detection
and make use of the system wide value for the feature register.
Signed-off-by: Suzuki K. Poulose
---
arch/arm64/include/asm/cpufeature.h |2 +
arch/arm64/include/asm/hwcap.h |8 ++
arch/ar
From: "Suzuki K. Poulose"
Use the system wide value of ID_AA64DFR0 to make safer decisions
Signed-off-by: Suzuki K. Poulose
---
arch/arm64/include/asm/hw_breakpoint.h | 14 ++
arch/arm64/kernel/debug-monitors.c |6 --
arch/arm64/kernel/hw_breakpoint.c | 19
From: "Suzuki K. Poulose"
Add a helper to extract the register field from a given
instruction.
Signed-off-by: Suzuki K. Poulose
---
arch/arm64/include/asm/insn.h |2 ++
arch/arm64/kernel/insn.c | 29 +
2 files changed, 31 insertions(+)
diff --git a/arch/
From: "Suzuki K. Poulose"
Now that we can reliably read the system wide safe value for a
feature register, use that to compute the system capability.
This patch also replaces the 'feature-register-specific'
methods with a generic routine to check the capability.
Signed-off-by: Suzuki K. Poulose
From: "Suzuki K. Poulose"
This patch delays populating the cpuinfo for a new (hotplugged)
CPU until the notifiers have executed. This will enable us to verify
if the new (hotplugged) CPU has all the capabilities which the system
already has. If it doesn't, we could prevent it from turning online
From: "Suzuki K. Poulose"
Make use of the system wide safe register to decide the support
for mixed endian.
Signed-off-by: Suzuki K. Poulose
---
arch/arm64/kernel/cpufeature.c | 32 ++--
1 file changed, 10 insertions(+), 22 deletions(-)
diff --git a/arch/arm64/ke
Currently, if cpuidle is disabled or not supported, powertop reports
zero wakeups and zero events. This is due to the cpu_idle tracepoints
are missing.
This patch is to make cpu_idle tracepoints always available even if
cpuidle is disabled or not supported.
Signed-off-by: Jisheng Zhang
---
arch
From: "Suzuki K. Poulose"
This patch adds an infrastructure to keep track of the CPU feature
registers on the system. For each register, the infrastructure keeps
track of the system wide safe value of the feature bits. Also, tracks
the which fields of a register should be matched strictly across
From: "Suzuki K. Poulose"
Add an API for reading the safe CPUID value across the
system from the new infrastructure.
Signed-off-by: Suzuki K. Poulose
---
arch/arm64/include/asm/cpufeature.h |2 ++
arch/arm64/kernel/cpufeature.c |9 +
2 files changed, 11 insertions(+)
diff
From: "Suzuki K. Poulose"
This patch consolidates the CPU Sanity check to the new infrastructure.
Signed-off-by: Suzuki K. Poulose
---
arch/arm64/include/asm/cpufeature.h |3 +-
arch/arm64/kernel/cpufeature.c | 163 ---
arch/arm64/kernel/cpuinfo.c
From: "Suzuki K. Poulose"
Delay the ELF HWCAP initialisation untill all the (enabled) CPUs are
up, i.e, smp_cpus_done(). This is in preparation for detecting the
common features across the CPUS and creating a consistent ELF HWCAP
for the system.
Signed-off-by: Suzuki K. Poulose
---
arch/arm64/
From: "Suzuki K. Poulose"
This patch moves the CPU feature detection code from
arch/arm64/kernel/{setup.c to cpufeature.c}
The plan is to consolidate all the CPU feature handling
in cpufeature.c.
Changes pr_fmt from "alternatives" to "cpu features"
Signed-off-by: Suzuki K. Poulose
---
arch/
From: "Suzuki K. Poulose"
sys_reg defines the encoding of a system register as usable
in the mrs/msr instructions. i.e, the encoding is shifted to the left
by 5bits. Change it to the actual encoding of the register and
use shifted encoding in the mrs_s/msr_s macros. Also cleans up
some white spac
From: "Suzuki K. Poulose"
This patch moves the /proc/cpuinfo handling code:
arch/arm64/kernel/{setup.c to cpuinfo.c}
No functional changes
Signed-off-by: Suzuki K. Poulose
---
arch/arm64/kernel/cpuinfo.c | 124 +++
arch/arm64/kernel/setup.c | 123 -
From: "Suzuki K. Poulose"
Move the mixed endian support detection code to cpufeature.c
from cpuinfo.c. This also moves the update_cpu_features()
used by mixed endian detection code, which will get more
functionality.
Also moves the ID register field shifts to asm/sysreg.h,
where all the useful d
Hello.
On 9/15/2015 6:18 PM, Ondrej Zary wrote:
Add calls to netif_carrier_on and netif_carrier_off
Signed-off-by: Ondrej Zary
---
drivers/net/wireless/airo.c |6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/net/wireless/airo.c b/drivers/net/wireless/airo
Currently, if cpuidle is disabled or not supported, powertop reports
zero wakeups and zero events. This is due to the cpu_idle tracepoints
are missing.
This patch is to make cpu_idle tracepoints always available even if
cpuidle is disabled or not supported.
Signed-off-by: Jisheng Zhang
---
arch
Hi Linus,
Please pull hwmon fixes for Linux v4.3-rc2 from signed tag:
git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging.git
hwmon-for-linus-v4.3-rc2
Thanks,
Guenter
--
The following changes since commit 6ff33f3902c3b1c5d0db6b1e2c70b6d76fba357f:
Linux 4.3-rc1 (2015-0
In order to match the panel power sequence, disable the enable_gpio
in the probe function. Also, reorder the code in the power_on and
power_off function to match the timing.
Signed-off-by: YH Huang
---
drivers/video/backlight/pwm_bl.c | 15 +--
1 file changed, 9 insertions(+), 6 de
On Wed, Sep 16, 2015 at 10:37:33AM +0300, Konstantin Khlebnikov wrote:
> On 15.09.2015 20:41, Serge Hallyn wrote:
> >Quoting Stéphane Graber (stgra...@ubuntu.com):
> >>On Tue, Sep 15, 2015 at 06:01:38PM +0300, Konstantin Khlebnikov wrote:
> >>>On 15.09.2015 17:27, Eric W. Biederman wrote:
> Kon
On 16/09/2015 16:34, Christian Borntraeger wrote:
> Am 16.09.2015 um 15:13 schrieb Jason J. Herne:
>> The offending commit accidentally replaces an atomic_clear with an
>> atomic_or instead of an atomic_andnot in kvm_s390_vcpu_request_handled.
>> The symptom is that kvm guests on s390 hang on sta
Am 16.09.2015 um 15:13 schrieb Jason J. Herne:
> The offending commit accidentally replaces an atomic_clear with an
> atomic_or instead of an atomic_andnot in kvm_s390_vcpu_request_handled.
> The symptom is that kvm guests on s390 hang on startup.
> This patch simply replaces the incorrect atomic_o
On Wed, Sep 16, 2015 at 09:13:50AM -0400, Jason J. Herne wrote:
> The offending commit accidentally replaces an atomic_clear with an
> atomic_or instead of an atomic_andnot in kvm_s390_vcpu_request_handled.
> The symptom is that kvm guests on s390 hang on startup.
> This patch simply replaces the i
On Wed, 16 Sep 2015 09:13:50 -0400
"Jason J. Herne" wrote:
> The offending commit accidentally replaces an atomic_clear with an
> atomic_or instead of an atomic_andnot in kvm_s390_vcpu_request_handled.
> The symptom is that kvm guests on s390 hang on startup.
> This patch simply replaces the incor
On Wed, Sep 16, 2015 at 03:23:21PM +0100, Jisheng Zhang wrote:
> Currently, if cpuidle is disabled or not supported, powertop reports
> zero wakeups and zero events. This is due to the cpu_idle tracepoints
> are missing.
>
> This patch is to make cpu_idle tracepoints always available even if
> cpu
On 04/09/15 13:19, Alexander Kuleshov wrote:
2015-09-04 18:00 GMT+06:00 Suzuki K. Poulose :
There is generic CPUID feature helper queued for 4.3, which can extract
the feature bits
cpuid_feature_extract_field(feature, shift)
You might want to use it instead. Btw, I have a patch series(waitin
On 04/09/15 20:52, Yury Norov wrote:
On Fri, Sep 04, 2015 at 05:40:57PM +0100, Suzuki K. Poulose wrote:
On 04/09/15 17:04, Yury Norov wrote:
This patch is on top of https://lkml.org/lkml/2015/9/2/413
In master, there's only a single function -
update_mixed_endian_el0_support
And simila
at virtual address 0007
pgd = c0004000
[0007] *pgd=
Internal error: Oops: 1 [#1] PREEMPT ARM
Modules linked in:
CPU: 0 PID: 0 Comm: swapper Not tainted 4.3.0-rc1-next-20150916-dirty #96
Hardware name: Freescale i.MX25 (Device Tree Support)
task: c06ac1d0 ti: c06a8000 task.ti:
"Serge E. Hallyn" writes:
> On Wed, Sep 16, 2015 at 10:37:33AM +0300, Konstantin Khlebnikov wrote:
>> On 15.09.2015 20:41, Serge Hallyn wrote:
>> >Quoting Stéphane Graber (stgra...@ubuntu.com):
>> >>On Tue, Sep 15, 2015 at 06:01:38PM +0300, Konstantin Khlebnikov wrote:
>> >>>On 15.09.2015 17:27,
On 09/16/2015 08:06 AM, Sudip Mukherjee wrote:
We have been getting a warning about non ANSI function.
warning: non-ANSI function declaration of function 'FPT_SccbMgrTableInitAll'
Signed-off-by: Sudip Mukherjee
---
drivers/scsi/FlashPoint.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(
Hi,
Am Mittwoch, 16. September 2015, 11:30:26 schrieb Jaehoon Chung:
> On 09/16/2015 07:09 AM, Heiko Stübner wrote:
> > Am Dienstag, 15. September 2015, 17:25:38 schrieb Jaehoon Chung:
> >> On 09/01/2015 03:24 AM, Heiko Stuebner wrote:
> >>> From: Alexandru M Stan
> >>>
> >>> This algorithm will
Dear Lorenzo,
On Wed, 16 Sep 2015 15:47:38 +0100
Lorenzo Pieralisi wrote:
> On Wed, Sep 16, 2015 at 03:23:21PM +0100, Jisheng Zhang wrote:
> > Currently, if cpuidle is disabled or not supported, powertop reports
> > zero wakeups and zero events. This is due to the cpu_idle tracepoints
> > are mi
Move dereference of sdesc after NULL pointer checker.
Signed-off-by: Wang YanQing
---
drivers/media/platform/soc_camera/soc_camera.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/media/platform/soc_camera/soc_camera.c
b/drivers/media/platform/soc_camera/soc_camer
On 9/16/15 9:00 AM, Fabio Estevam wrote:
On Wed, Sep 16, 2015 at 6:24 AM, Sergey Senozhatsky
wrote:
added by b7503e0cdb5dbec5d201aa69dc14679b5ae8
net: Add FIB table id to rtable
Add the FIB table id to rtable to make the information available for
IPv4 as it is for IPv6.
- On Sep 7, 2015, at 12:15 PM, Mathieu Desnoyers
mathieu.desnoy...@efficios.com wrote:
> Signed-off-by: Mathieu Desnoyers
> Acked-by: Ralf Baechle
> CC: Andrew Morton
> CC: linux-...@vger.kernel.org
> CC: linux-m...@linux-mips.org
Hi,
FYI, sys_membarrier has been merged upstream in Linux
Hi Marc,
On 09/13/2015 10:02 PM, Marc Zyngier wrote:
[...]
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index e6b7ed5..8a0b9c3 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -41,7 +41,6 @@
#include
#include
#include
-#include
#include
- On Sep 7, 2015, at 12:15 PM, Mathieu Desnoyers
mathieu.desnoy...@efficios.com wrote:
> Signed-off-by: Mathieu Desnoyers
> Acked-by: "David S. Miller"
> CC: Andrew Morton
> CC: linux-...@vger.kernel.org
> CC: sparcli...@vger.kernel.org
Hi,
FYI, sys_membarrier has been merged upstream in
- On Sep 7, 2015, at 12:15 PM, Mathieu Desnoyers
mathieu.desnoy...@efficios.com wrote:
> Signed-off-by: Mathieu Desnoyers
> Tested-by: Helge Deller
> CC: Andrew Morton
> CC: linux-...@vger.kernel.org
> CC: "James E.J. Bottomley"
> CC: linux-par...@vger.kernel.org
Hi,
FYI, sys_membarrier
On Tue, Sep 15, 2015 at 11:29:14AM -0400, Waiman Long wrote:
> Only the queue head vCPU will be in pv_wait_head() spinning to acquire the
> lock.
But what will guarantee fwd progress for the lock that is the head?
Suppose CPU0 becomes head and enters the /* claim the lock */ loop.
Then CPU1 com
Hi Tony,
On 09/03/2015 02:23 PM, Nishanth Menon wrote:
> Originally, all the SoC PHY rails were supplied by LDO3. However, as a
> result of characterization, it was determined that this posed a risk in
> extreme load conditions. Hence the PHY rails are split between two
> different LDOs. Update t
Hi Marc,
On 09/13/2015 10:02 PM, Marc Zyngier wrote:
[...]
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index e6b7ed5..8a0b9c3 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -41,7 +41,6 @@
#include
#include
#include
-#include
#include
On Wed, 16 Sep 2015, Wang YanQing wrote:
> Move dereference of sdesc after NULL pointer checker.
>
> Signed-off-by: Wang YanQing
> ---
> drivers/media/platform/soc_camera/soc_camera.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/media/platform/soc_camera/s
On Sep 16, 2015, at 1:35 AM, Sudip Mukherjee wrote:
> On Tue, Sep 15, 2015 at 08:30:41PM -0400, gr...@linuxhacker.ru wrote:
>> From: Oleg Drokin
>>
>> Since the client can never be server, this is all dead code.
>>
>> Signed-off-by: Oleg Drokin
>> ---
> OOPS.. build fails with error:
> error:
Is the current top of main branch free of the problem described (put in other
words: is wait_event_timeout race condition safe)?
If to have a look at Git there were made several improvements in
wait_event_timeout & Co (include/linux).
to avoid race conditions yet prior to 3.10 .
A problem being
On Tue, Sep 15, 2015 at 11:32:14AM -0400, Waiman Long wrote:
> On 09/15/2015 04:38 AM, Peter Zijlstra wrote:
> >On Mon, Sep 14, 2015 at 03:37:32PM -0400, Waiman Long wrote:
> >>BTW, the queue head vCPU at pv_wait_head_and_lock() doesn't wait early, it
> >>will spin the full threshold as there is no
Dear Lorenzo,
On Wed, 16 Sep 2015 22:53:12 +0800
Jisheng Zhang wrote:
> Dear Lorenzo,
>
> On Wed, 16 Sep 2015 15:47:38 +0100
> Lorenzo Pieralisi wrote:
>
> > On Wed, Sep 16, 2015 at 03:23:21PM +0100, Jisheng Zhang wrote:
> > > Currently, if cpuidle is disabled or not supported, powertop repor
On Mon, Sep 14, 2015 at 01:06:25PM -0700, Linus Torvalds wrote:
> On Sun, Sep 13, 2015 at 4:12 PM, Dave Chinner wrote:
> >
> > Really need to run these numbers on slower disks where block layer
> > merging makes a difference to performance.
>
> Yeah. We've seen plugging and io schedulers not make
- On Sep 7, 2015, at 12:15 PM, Mathieu Desnoyers
mathieu.desnoy...@efficios.com wrote:
> [ Untested on this architecture. To try it out: fetch linux-next/akpm,
> apply this patch, build/run a membarrier-enabled kernel, and do make
> kselftest. ]
Hi,
sys_membarrier has been merged into Lin
- On Sep 7, 2015, at 12:15 PM, Mathieu Desnoyers
mathieu.desnoy...@efficios.com wrote:
> [ Untested on this architecture. To try it out: fetch linux-next/akpm,
> apply this patch, build/run a membarrier-enabled kernel, and do make
> kselftest. ]
Hi,
sys_membarrier has been merged into Lin
- On Sep 7, 2015, at 12:15 PM, Mathieu Desnoyers
mathieu.desnoy...@efficios.com wrote:
> arm64 sys_membarrier number is already wired for arm64 through
> asm-generic/unistd.h, but needs to be allocated separately for
> the 32-bit compability layer of arm64.
>
> [ Untested on this architectur
- On Sep 7, 2015, at 12:15 PM, Mathieu Desnoyers
mathieu.desnoy...@efficios.com wrote:
> [ Untested on this architecture. To try it out: fetch linux-next/akpm,
> apply this patch, build/run a membarrier-enabled kernel, and do make
> kselftest. ]
Hi,
sys_membarrier has been merged into Lin
Hi Xinwei,
Thanks for this contribution! We look forward to seeing support for
these devices.
This isn't an exhaustive review, but two very high-level comments
which should result in a lot of changes ...
On 15 September 2015 at 10:37, Xinwei Kong
wrote:
> 1. Hardware Detail
> The display subsy
On Wed, Sep 16, 2015 at 06:16:55PM +0530, Jagan Teki wrote:
> On 15 September 2015 at 00:05, Mark Brown wrote:
> > There seem to be a reasonable number of SPI controllers out there which
> > have as an extension the ability to do memory mapped reads but are
> > otherwise perfectly normal SPI cont
On 16 September 2015 at 14:46, Jagan Teki wrote:
> On 15 September 2015 at 00:05, Mark Brown wrote:
>> On Fri, Sep 04, 2015 at 04:55:33PM +0530, Jagan Teki wrote:
>>> On 4 September 2015 at 13:59, Vignesh R wrote:
>>
>>> > + * @spi_mtd_mmap_read: some spi-controller hardwares provide memory
>>>
This patch add minimum and maximum value of module parameter
max_ccb in hpilo.c.
Signed-off-by: Masanari Iida
---
drivers/misc/hpilo.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/misc/hpilo.c b/drivers/misc/hpilo.c
index b83e3ca..d45cff0 100644
--- a/drivers/misc/
Hi,
The Atmel PIO4 controller has been introduced with SAMA5D2 chip family. This
drivers manages both pinmux/pinconf and gpio stuff. It is inspired by Mediatek
pinctrl driver.
Changes from v1:
- remove some unneeded gpio specific ops (gpio_request, gpio_free,
gpio_request_enable, gpio_disable_f
Add a pinctrl/gpio driver for Atmel PIO4 controller available on SAMA5D2
chip family.
Signed-off-by: Ludovic Desroches
---
drivers/pinctrl/Kconfig | 13 +
drivers/pinctrl/Makefile|1 +
drivers/pinctrl/pinctrl-at91-pio4.c | 1017 +++
3
Add documentation for the Atmel PIO4 controller introduced with SAMA5D2
chip family.
Signed-off-by: Ludovic Desroches
Acked-by: Sascha Hauer
---
.../bindings/pinctrl/atmel,at91-pio4-pinctrl.txt | 90 ++
1 file changed, 90 insertions(+)
create mode 100644
Documentation/de
Add an entry for the Atmel PIO4 controller driver.
Signed-off-by: Ludovic Desroches
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 169ad39..ec41bfe 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8166,6 +8166,13 @@ L: linux-arm-ker
Add pio4 controller node to enable pinmux and gpio.
Signed-off-by: Ludovic Desroches
---
arch/arm/boot/dts/sama5d2.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 034cd48..cc05cde 100644
--- a/arch/arm
SAMA5D2 chip family has a new PIO controller.
Signed-off-by: Ludovic Desroches
---
arch/arm/mach-at91/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 89a755b..9e4067c 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/
> On 05 Aug 2015, at 16:12, Greg Kroah-Hartman
> wrote:
>
> On Mon, Jul 06, 2015 at 01:31:47PM +0100, Martyn Welch wrote:
>> Hi Dmitry,
>>
>> These are looking good to me.
>
> Can I get an "Acked-by:" or something so that I know it's ok to apply
> these?
>
> thanks,
>
> greg k-h-
Now that
Add sama5d2 pin descriptions.
Signed-off-by: Ludovic Desroches
---
arch/arm/boot/dts/sama5d2-pinfunc.h | 880
1 file changed, 880 insertions(+)
create mode 100644 arch/arm/boot/dts/sama5d2-pinfunc.h
diff --git a/arch/arm/boot/dts/sama5d2-pinfunc.h
b/arch/a
Add device pin muxing for the sama5d2 Xplained board.
Signed-off-by: Ludovic Desroches
---
arch/arm/boot/dts/at91-sama5d2_xplained.dts | 61 +
1 file changed, 61 insertions(+)
diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
b/arch/arm/boot/dts/at91-sama5d2_
On Mon, Sep 14, 2015 at 10:34:00AM -0700, bseg...@google.com wrote:
> It has never been clear to me what
> SCHED_LOAD_SCALE/SCHED_LOAD_SHIFT were for as opposed to NICE_0_LOAD,
SCHED_LOAD_SCALE/SHIFT are the fixed point mult/shift, and NICE_0_LOAD
is the load of a nice-0 task. They happen to be t
Unlike other atomic operation variants, cmpxchg{,64}_acquire and
atomic{,64}_cmpxchg_acquire don't have acquire semantics if the cmp part
fails, so we need to implement these using assembly.
Note cmpxchg{,64}_relaxed and atomic{,64}_cmpxchg_relaxed are not
compiler barriers.
Signed-off-by: Boqun
On powerpc, we don't need a general memory barrier to achieve acquire and
release semantics, so __atomic_op_{acquire,release} can be implemented
using "lwsync" and "isync".
For release semantics, since we only need to ensure all memory accesses
that issue before must take effects before the -store
Link for v1: https://lkml.org/lkml/2015/8/27/798
Changes since v1:
* avoid to introduce macro arch_atomic_op_*()
* also fix the problem that cmpxchg, xchg and their atomic_
versions are not full barriers in PPC implementation.
* rebase on v4.3-rc1
Relaxed/acquire/re
According to memory-barriers.txt, xchg and its atomic{,64}_ versions
need to imply a full barrier, however they are now just RELEASE+ACQUIRE,
which is not a full barrier.
So remove the definition of xchg(), and let __atomic_op_fence() build
the full-barrier versions of these operations.
Signed-of
According to memory-barriers.txt, cmpxchg and its atomic{,64}_ versions
need to imply a full barrier, however they are now just RELEASE+ACQUIRE,
which is not a full barrier.
So replace PPC_RELEASE_BARRIER and PPC_ACQUIRE_BARRIER with
PPC_ATOMIC_ENTRY_BARRIER and PPC_ATOMIC_EXIT_BARRIER in
__cmpxch
On Wed, Sep 16, 2015 at 11:39:22AM -0400, Dmitry Kalinkin wrote:
>
> > On 05 Aug 2015, at 16:12, Greg Kroah-Hartman
> > wrote:
> >
> > On Mon, Jul 06, 2015 at 01:31:47PM +0100, Martyn Welch wrote:
> >> Hi Dmitry,
> >>
> >> These are looking good to me.
> >
> > Can I get an "Acked-by:" or some
>From f9f9e7b776142fb1c0782cade004cc8e0147a199 Mon Sep 17 00:00:00 2001
From: Tejun Heo
Date: Wed, 16 Sep 2015 11:51:12 -0400
This reverts commit b5ba75b5fc0e8404e2c50cb68f39bb6a53fc916f.
d59cfc09c32a ("sched, cgroup: replace signal_struct->group_rwsem with
a global percpu_rwsem") and b5ba75b5fc
This patch fix spelling typos in Documentation/misc-devices.
Signed-off-by: Masanari Iida
---
Documentation/misc-devices/apds990x.txt | 2 +-
Documentation/misc-devices/isl29003 | 2 +-
Documentation/misc-devices/max6875 | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --g
>From 0c986253b939cc14c69d4adbe2b4121bdf4aa220 Mon Sep 17 00:00:00 2001
From: Tejun Heo
Date: Wed, 16 Sep 2015 11:51:12 -0400
This reverts commit d59cfc09c32a2ae31f1c3bc2983a0cd79afb3f14.
d59cfc09c32a ("sched, cgroup: replace signal_struct->group_rwsem with
a global percpu_rwsem") and b5ba75b5fc
> On 16 Sep 2015, at 11:53, Greg Kroah-Hartman
> wrote:
>
> On Wed, Sep 16, 2015 at 11:39:22AM -0400, Dmitry Kalinkin wrote:
>>
>>> On 05 Aug 2015, at 16:12, Greg Kroah-Hartman
>>> wrote:
>>>
>>> On Mon, Jul 06, 2015 at 01:31:47PM +0100, Martyn Welch wrote:
Hi Dmitry,
These
On 16/09/15 14:05, Will Deacon wrote:
On Mon, Sep 14, 2015 at 02:26:17PM +0100, Daniel Thompson wrote:
Currently alternatives are applied very late in the boot process (and
a long time after we enable scheduling). Some alternative sequences,
such as those that alter the way CPU context is stored
On Mon, Aug 03, 2015 at 11:21:16AM +0100, Yong Wu wrote:
> This patch is for ARM Short Descriptor Format.
>
> Signed-off-by: Yong Wu
> ---
> drivers/iommu/Kconfig| 18 +
> drivers/iommu/Makefile | 1 +
> drivers/iommu/io-pgtable-arm-short.c | 813
> +
Some architectures may have their special barriers for acquire, release
and fence semantics, so that general memory barriers(smp_mb__*_atomic())
in the default __atomic_op_*() may be too strong, so allow architectures
to define their own helpers which can overwrite the default helpers.
Signed-off-
Some atomic operations now have _{relaxed, acquire, release} variants,
this patch then adds some trivial tests for two purpose:
1. test the behavior of these new operations in single-CPU
environment.
2. make their code generated before we actually use them somewhere,
so t
Commit b08cc79155fc26d0d112b1470d1ece5034651a4b ("hv_netvsc: Eliminate
memory allocation in the packet send path") introduced skb headroom
request for Hyper-V netvsc driver:
max_needed_headroom = sizeof(struct hv_netvsc_packet) +
sizeof(struct rndis_message)
Implement xchg_relaxed and define atomic{,64}_xchg_* as xchg_relaxed,
based on these _relaxed variants, release/acquire variants can be built.
Note that xchg_relaxed and atomic_{,64}_xchg_relaxed are not compiler
barriers.
Signed-off-by: Boqun Feng
---
arch/powerpc/include/asm/atomic.h | 2 ++
On 16/09/15 12:08, Ulf Hansson wrote:
> On 14 September 2015 at 17:00, Jon Hunter wrote:
>> From: Seshagiri Holi
>>
>> Certain eMMC devices allow vendor specific device information to be read
>> via a sequence of vendor commands. These vendor commands must be issued
>> in sequence and an atomic
Hi Greg,
As I said in the subject of the mail (which I have been since told I
shouldn't have done this), I'm a noob to kernel code. I tried to pick
off something super simple to just see what the process of getting a
patch in is. Youtube videos and documentation only get you so far.
>From reading
> -Original Message-
> From: Vitaly Kuznetsov [mailto:vkuzn...@redhat.com]
> Sent: Wednesday, September 16, 2015 11:50 AM
> To: net...@vger.kernel.org
> Cc: David S. Miller ; linux-kernel@vger.kernel.org;
> KY Srinivasan ; Haiyang Zhang
> ; Jason Wang
> Subject: [PATCH net-next RFC] net:
The first patch puts the overlays as objects in the sysfs in
/sys/firmware/devicetree/overlays.
The next adds a master overlay enable switch (that once is set to
disabled can't be re-enabled), while the one after that
introduces a number of default per overlay attributes.
The patchset is against
Documentation ABI entry for overlays sysfs entries.
Signed-off-by: Pantelis Antoniou
---
.../ABI/testing/sysfs-firmware-devicetree-overlays | 35 ++
1 file changed, 35 insertions(+)
create mode 100644 Documentation/ABI/testing/sysfs-firmware-devicetree-overlays
diff --git a
We are going to need the overlays to appear on sysfs with runtime
global properties (like master enable) so turn them into kobjects.
Signed-off-by: Pantelis Antoniou
---
drivers/of/base.c | 7 +++
drivers/of/of_private.h | 9 +
drivers/of/overlay.c| 52 +++
The two default overlay attributes are:
* A targets sysfs attribute listing the targets of the installed
overlay. The targets list the path on the kernel's device tree
where each overlay fragment is applied to
* A per overlay can_remove sysfs attribute that reports whether
the overlay can be remo
ConfigFS lacked binary attributes up until now. This patch
introduces support for binary attributes in a somewhat similar
manner of sysfs binary attributes albeit with changes that
fit the configfs usage model.
Problems that configfs binary attributes fix are everything that
requires a binary blob
For DT and in-kernel users there is no interface to the
at24 EEPROMs so provide an NVMEM framework interface.
This allows us to use AT24 based EEPROMs and reference them
from within the DT tree.
Signed-off-by: Pantelis Antoniou
---
drivers/misc/eeprom/at24.c | 219 ++
The two patches add a new API for using changeset which
makes things considerably easier.
This patchset applies against Linus's tree as of today and
is dependent on the previous patchset I've send out earlier.
"of: overlay: kobject & sysfs'ation"
Changes since v1:
* Dropped the indirect and targe
A throw once master enable switch to protect against any
further overlay applications if the administrator desires so.
Signed-off-by: Pantelis Antoniou
---
drivers/of/overlay.c | 43 ++-
1 file changed, 42 insertions(+), 1 deletion(-)
diff --git a/drivers
Add an __of_node_dupv() private method and make __of_node_dup() use it.
This is required for the subsequent changeset accessors which will
make use of it.
Signed-off-by: Pantelis Antoniou
---
drivers/of/dynamic.c | 29 +++--
1 file changed, 23 insertions(+), 6 deletions(-
Changesets are very powerful, but the lack of a helper API
makes using them cumbersome. Introduce a simple copy based
API that makes things considerably easier.
To wit, adding a property using the raw API.
struct property *prop;
prop = kzalloc(sizeof(*prop)), GFP_KERNEL);
On Wed, Sep 16, 2015 at 04:11:05PM +0100, Jisheng Zhang wrote:
> Dear Lorenzo,
>
> On Wed, 16 Sep 2015 22:53:12 +0800
> Jisheng Zhang wrote:
>
> > Dear Lorenzo,
> >
> > On Wed, 16 Sep 2015 15:47:38 +0100
> > Lorenzo Pieralisi wrote:
> >
> > > On Wed, Sep 16, 2015 at 03:23:21PM +0100, Jisheng
Now, ftrace only calculate the dyn_ftrace number in the adding
breakpoint loop, not in adding update and finish update loop.
Calculate the correct dyn_ftrace, once ftrace reports the failure message
to the userspace.
Signed-off-by: Minfei Huang
---
arch/x86/kernel/ftrace.c | 4
1 file chan
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