On 03/07/2016 09:45 AM, David Miller wrote:
From: Khalid Aziz
Date: Mon, 7 Mar 2016 08:07:53 -0700
I can remove CONFIG_SPARC_ADI. It does mean this code will be built
into 32-bit kernels as well but it will be inactive code.
The code should be built only into
On Mon, Mar 7, 2016 at 9:46 AM, Dave Hansen wrote:
> On 03/07/2016 08:06 AM, Khalid Aziz wrote:
>> Top 4-bits of sparc64 virtual address are used for version tag only when
>> a process has its PSTATE.mcde bit set and it is accessing a memory
>> region that has ADI
On Mon, Mar 7, 2016 at 10:36 AM, Jesper Dangaard Brouer
wrote:
> Hi Google,
>
> While playing with RPS, I needed to read stats from
> /proc/net/softnet_stat and the tools I could find [1] and [2] was not
> very good.
>
> I lack of better, I coded up my own tool softnet_stat.pl
* Yang Shi | 2016-02-23 13:23:23 [-0800]:
>I recall the rcuidle version is used by 4.1-rt, but not sure why it is dropped
>in 4.4-rt. It looks such fix is still needed.
I don't recall while I removed it. It was durring v4.1 -> v4.4 port. In
v4.1 we had the idle version only in
On 03/05/2016 07:54 AM, Yury Norov wrote:
[...]
+static u32 thunder_pem_bridge_w1c_bits(int where)
+{
+ u32 w1c_bits = 0;
+
+ switch (where & ~3) {
+ case 0x04: /* Command/Status */
+ case 0x1c: /* Base and I/O Limit/Secondary Status */
+ w1c_bits =
On Mon, 2016-03-07 at 09:18 -0800, Dan Williams wrote:
> On Mon, Mar 7, 2016 at 9:56 AM, Toshi Kani wrote:
> > On Fri, 2016-03-04 at 18:23 -0800, Dan Williams wrote:
> > > On Fri, Mar 4, 2016 at 6:48 PM, Toshi Kani
> > > wrote:
> [..]
> > > As far as I can
On 03/07/2016 09:56 AM, David Miller wrote:
From: Khalid Aziz
Date: Mon, 7 Mar 2016 08:07:53 -0700
PR_GET_SPARC_ADICAPS
Put this into a new ELF auxiliary vector entry via ARCH_DLINFO.
So now all that's left is supposedly the TAG stuff, please explain
that to me so I
Am Sonntag, 6. März 2016, 20:53:53 schrieb Andreas Färber:
> Drop #address-cells and #size-cells, which are not required by the
> gpio-keys binding documentation, as button sub-nodes are not devices.
>
> Reported-by: Julien Chauveau
> Signed-off-by: Andreas Färber
Em Mon, Mar 07, 2016 at 03:06:04PM -0300, Arnaldo Carvalho de Melo escreveu:
> Em Mon, Mar 07, 2016 at 11:35:06PM +0900, Namhyung Kim escreveu:
> > Now hpp formats are linked using perf_hpp_list_node when hierarchy is
> > enabled. Use this info to print entries with multiple sort keys in a
> >
On Mon, Mar 7, 2016 at 10:04 AM, Khalid Aziz wrote:
> On 03/07/2016 09:56 AM, David Miller wrote:
>>
>> From: Khalid Aziz
>> Date: Mon, 7 Mar 2016 08:07:53 -0700
>>
>>> PR_GET_SPARC_ADICAPS
>>
>>
>> Put this into a new ELF auxiliary vector entry
On 2016-03-07 01:47, Boris Brezillon wrote:
> Implementing the mtd_ooblayout_ops interface is the new way of exposing
> ECC/OOB layout to MTD users.
Hi Boris,
Tested this revision, works out of the box now!
Thanks!
Tested-by: Stefan Agner
Acked-by: Stefan Agner
On 03/07/2016 10:04 AM, Khalid Aziz wrote:
On 03/07/2016 09:56 AM, David Miller wrote:
From: Khalid Aziz
Date: Mon, 7 Mar 2016 08:07:53 -0700
PR_GET_SPARC_ADICAPS
Put this into a new ELF auxiliary vector entry via ARCH_DLINFO.
So now all that's left is supposedly
[ adding Linus for the implications of exporting insert_resource() ]
On Fri, Mar 4, 2016 at 8:14 AM, Toshi Kani wrote:
> insert_resource() and remove_resouce() are called by producers
> of resources, such as FW modules and bus drivers. These modules
> may be implemented as
Deucher, Alexander wrote on 03/07/16 19:07:
>> -Original Message-
>> From: Jörg-Volker Peetz [mailto:jvpe...@web.de]
>> Sent: Monday, March 07, 2016 12:40 PM
>> To: Deucher, Alexander; 'Linus Torvalds'; Dave Airlie; DRI mailing list
>> Cc: Greg KH; Linux Kernel Mailing List; stable;
On 03/07/2016 11:08 AM, Andy Lutomirski wrote:
On Mon, Mar 7, 2016 at 10:04 AM, Khalid Aziz wrote:
On 03/07/2016 09:56 AM, David Miller wrote:
From: Khalid Aziz
Date: Mon, 7 Mar 2016 08:07:53 -0700
PR_GET_SPARC_ADICAPS
Put this into a new
On Fri, 4 Mar 2016, Waiman Long wrote:
> This patch provides a mechanism to selectively degenerate per-cpu
> counters to global counters at per-cpu counter initialization time. The
> following new API is added:
>
> percpu_counter_set_limit(struct percpu_counter *fbc,
>
Drop #address-cells and #size-cells, which are not required by the
gpio-keys binding documentation, as button sub-nodes are not devices.
Reported-by: Julien Chauveau
Signed-off-by: Andreas Färber
---
On 3/7/16 2:33 AM, Daniel Borkmann wrote:
On 03/07/2016 02:58 AM, Alexei Starovoitov wrote:
Introduce simple percpu_freelist to keep single list of elements
spread across per-cpu singly linked lists.
/* push element into the list */
void pcpu_freelist_push(struct pcpu_freelist *, struct
Am 07.03.2016 um 19:05 schrieb Heiko Stübner:
> Am Sonntag, 6. März 2016, 20:53:53 schrieb Andreas Färber:
>> Drop #address-cells and #size-cells, which are not required by the
>> gpio-keys binding documentation, as button sub-nodes are not devices.
>>
>> Reported-by: Julien Chauveau
On Mon, Mar 07, 2016 at 01:18:40PM +0100, Peter Zijlstra wrote:
> On Mon, Mar 07, 2016 at 11:24:13AM +0100, Peter Zijlstra wrote:
>
> > I suspect Andi is having something along:
> >
> > lkml.kernel.org/r/1445458568-16956-1-git-send-email-a...@firstfloor.org
> >
> > applied to his tree.
>
>
On Mon, Mar 7, 2016 at 10:07 AM, Alan Stern wrote:
>
> Of course, there are other ways to save a single flag value (such as
> setz). It's up to the compiler developers to decide what they think is
> best.
Using 'setcc' to save eflags somewhere is definitely the right
On Fri, Mar 4, 2016 at 8:05 PM, Nishanth Menon wrote:
> Hi Jassi,
>
> Thanks for reviewing the patch.
> On 03/03/2016 11:18 PM, Jassi Brar wrote:
>
> [...]
>
>>>
>>> drivers/mailbox/Kconfig | 11 +
>>> drivers/mailbox/Makefile| 2 +
>>> drivers/mailbox/ti-msgmgr.c | 657
>
Hello Andreas,
On Mon, Mar 7, 2016 at 3:24 PM, Andreas Färber wrote:
> Drop #address-cells and #size-cells, which are not required by the
> gpio-keys binding documentation, as button sub-nodes are not devices.
>
> Reported-by: Julien Chauveau
>
[ adding Haozhong and Xiao for the alignment concerns below ]
On Mon, Mar 7, 2016 at 10:58 AM, Toshi Kani wrote:
> On Mon, 2016-03-07 at 09:18 -0800, Dan Williams wrote:
>> On Mon, Mar 7, 2016 at 9:56 AM, Toshi Kani wrote:
>> > On Fri, 2016-03-04 at 18:23
On Mon, Mar 7, 2016 at 10:22 AM, Khalid Aziz wrote:
> On 03/07/2016 11:08 AM, Andy Lutomirski wrote:
>>
>> On Mon, Mar 7, 2016 at 10:04 AM, Khalid Aziz
>> wrote:
>>>
>>> On 03/07/2016 09:56 AM, David Miller wrote:
From: Khalid Aziz
Hi Guenter,
> Hi Wim,
>
> On Sun, Mar 06, 2016 at 11:49:56AM +0100, Wim Van Sebroeck wrote:
> > Hi Guenter,
> >
> > > The watchdog infrastructure is currently purely passive, meaning
> > > it only passes information from user space to drivers and vice versa.
> > >
> [ ... ]
> >
> > Patches 1
From: Khalid Aziz
Date: Mon, 7 Mar 2016 11:04:38 -0700
> On 03/07/2016 09:56 AM, David Miller wrote:
>> From: Khalid Aziz
>> Date: Mon, 7 Mar 2016 08:07:53 -0700
>>
>>> PR_GET_SPARC_ADICAPS
>>
>> Put this into a new ELF auxiliary vector entry via
On 03/07/2016 12:31 PM, Jassi Brar wrote:
> On Fri, Mar 4, 2016 at 8:05 PM, Nishanth Menon wrote:
>> Hi Jassi,
>>
>> Thanks for reviewing the patch.
>> On 03/03/2016 11:18 PM, Jassi Brar wrote:
>>
>> [...]
>>
drivers/mailbox/Kconfig | 11 +
On 03.03.16 15:55:35, David Daney wrote:
> From: Ganapatrao Kulkarni
>
> Add DT bindings for numa mapping of memory, CPUs and IOs.
>
> Reviewed-by: Robert Richter
> Signed-off-by: Ganapatrao Kulkarni
>
From: Krzysztof Kozlowski
Date: Fri, 04 Mar 2016 10:04:52 +0900
> The MFD_SYSCON depends on HAS_IOMEM so when selecting it avoid unmet
> direct dependencies.
>
> Signed-off-by: Krzysztof Kozlowski
Applied.
Hi Joe, David,
On Mon, Mar 7, 2016 at 10:49 AM, David Miller wrote:
> From: Moritz Fischer
> Date: Mon, 7 Mar 2016 08:17:38 -0800
>
>> @@ -945,6 +943,7 @@ static int macb_rx_frame(struct macb *bp, unsigned int
>> first_frag,
>> static int
From: Michal Kubecek
Date: Fri, 4 Mar 2016 11:59:25 +0100 (CET)
> @@ -1978,6 +1980,12 @@ static int ipv6_route_yield(struct fib6_walker *w)
>
> static void ipv6_route_seq_setup_walk(struct ipv6_route_iter *iter)
> {
> +#ifdef CONFIG_NET_NS
> + struct net *net =
From: Adrian Hunter
Commit b9511cd761fa ("perf/x86: Fix time_shift in perf_event_mmap_page")
altered the time conversion algorithms documented in the perf_event.h
header file, to use 64-bit shifts. That was done to make the code more
future-proof (i.e. some time in the
On 03/07/2016 11:49 AM, Andy Lutomirski wrote:
On Mon, Mar 7, 2016 at 10:22 AM, Khalid Aziz wrote:
No, it changes the tag associated with the virtual address for the caller.
Physical page backing this virtual address is unaffected. Tag checking is
done for virtual
On 03/07/2016 12:22 PM, David Miller wrote:
Khalid, maybe you should share notes with the folks working on x86
protection keys.
Good idea. Sparc ADI feature is indeed similar to x86 protection keys
sounds like.
Thanks,
Khalid
From: Namhyung Kim
This implements having multiple sort keys in a single hierarchy level.
Originally only single sort key is supported for each level, but now
using the group syntax with '{ }', it can set more than one sort key in
one level. Note that now it needs to quote
Now that the node name has been changed from ehrpwm to pwm the document
should show this proper usage. Also change the unit address in the example
from 0 to the proper physical address value that should be used.
Signed-off-by: Franklin S Cooper Jr
---
Add tblck to the pwm nodes. This insures that the ehrpwm driver has access
to the time-based clk.
Do not remove similar entries for ehrpwm node. Later patches will switch
from using ehrpwm node name to pwm. But to maintain ABI compatibility we
shouldn't remove the old entries.
Signed-off-by:
Since the PWMSS and its subdevices (eCAP and ePWM) use the same address
space then the range property should be empty. Update the documentation
to show the correct usage.
Signed-off-by: Franklin S Cooper Jr
---
Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt | 12
From: Ian Munsie
This adds an afu_driver_ops structure with event_pending and
deliver_event callbacks. An AFU driver such as cxlflash can fill these
out and associate it with a context to enable passing custom AFU
specific events to userspace.
The cxl driver will call
On Mon, Mar 7, 2016 at 10:54 AM, Wim Van Sebroeck wrote:
> Hi All,
>
>> It's much easier for us if all DTS changes go in through the arm-soc
>> trees, to avoid these kind of conflicts. Is this on a branch where you
>> can easily drop it and we pick it up instead, or is it on a
From: Andy Lutomirski
Date: Mon, 7 Mar 2016 10:53:23 -0800
> x86 has an upcoming feature called protection keys. A page of virtual
> memory has a protection key, which is a number from 0 through 16. The
> master copy is in the PTE, i.e. page table entry, which is a
>
From: Thor Thayer
In preparation for the Arria10 peripheral ECCs, the IRQ
status needs to be determined because the IRQs are shared.
The IRQ status register is read to determine if the IRQ
was for this ECC peripheral. Cyclone5 and Arria5 have
dedicated IRQs so the
From: Thor Thayer
Add the device tree entries needed to support the Altera L2
cache EDAC on the Arria10 chip.
Signed-off-by: Thor Thayer
---
v2 Match register value (l2-ecc@ffd06010)
---
arch/arm/boot/dts/socfpga_arria10.dtsi |
From: Thor Thayer
In preparation for the Arria10 peripheral ECCs, a register
offset from the ECC base was added to the private data
structure to index into the ECC enable register.
Signed-off-by: Thor Thayer
---
v2: Split large
From: Thor Thayer
Add the device tree binding string needed to support the Altera L2
cache on the Arria10 chip.
Signed-off-by: Thor Thayer
Acked-by: Rob Herring
---
v2 Correct spelling of Arria10 in patch title.
Yes, it is. I never saw this bug again. Forgot to update this thread. Sorry.
On Mon, Mar 7, 2016 at 8:44 PM, Marcelo Ricardo Leitner
wrote:
> On Tue, Jan 26, 2016 at 02:28:48PM +0100, Dmitry Vyukov wrote:
>> On Mon, Jan 25, 2016 at 6:52 PM, Marcelo Ricardo Leitner
>>
From: Adrian Hunter
In preparation for moving clockid validation into jit_process().
Previously a return value of zero meant the processing had been done and
non-zero meant either the processing was not done (i.e. not the jitdump
file mmap event) or an error occurred.
From: Namhyung Kim
The level field is to distinguish levels in the hierarchy mode.
Currently each column (perf_hpp_fmt) has a different level.
Signed-off-by: Namhyung Kim
Cc: Andi Kleen
Cc: David Ahern
Cc: Jiri
From: Namhyung Kim
Now hpp formats are linked using perf_hpp_list_node when hierarchy is
enabled. Like in stdio, use this info to print entries with multiple
sort keys in a single hierarchy properly.
Signed-off-by: Namhyung Kim
Tested-by: Arnaldo
From: Namhyung Kim
Now each hists has its own hpp lists in hierarchy. So instead of having
a pointer to a single perf_hpp_fmt in a hist entry, make it point the
hpp_list for its level. This will be used to support multiple sort keys
in a single hierarchy level.
From: Namhyung Kim
The perf_hpp__setup_hists_formats() is to build hists-specific output
formats (and sort keys). Currently it's only used in order to build the
output format in a hierarchy with same sort keys, but it could be used
with different sort keys in non-hierarchy
From: Namhyung Kim
Now hpp formats are linked using perf_hpp_list_node when hierarchy is
enabled. Like in stdio, use this info to print entries with multiple
sort keys in a single hierarchy properly.
Signed-off-by: Namhyung Kim
Cc: Andi Kleen
From: Adrian Hunter
Some of the stubs are identical so just have one function for them.
Signed-off-by: Adrian Hunter
Cc: Jiri Olsa
Cc: Stephane Eranian
Link:
From: Namhyung Kim
When multiple sort keys are used in a single hierarchy, it should indent
using number of hierarchy levels instead of number of sort keys.
Signed-off-by: Namhyung Kim
Cc: Andi Kleen
Cc: David Ahern
On Mon, Mar 7, 2016 at 11:44 AM, Khalid Aziz wrote:
> On 03/07/2016 11:49 AM, Andy Lutomirski wrote:
>>
>> On Mon, Mar 7, 2016 at 10:22 AM, Khalid Aziz
>> wrote:
>>>
>>> No, it changes the tag associated with the virtual address for the
>>> caller.
On 03/07/2016 12:16 AM, Leizhen (ThunderTown) wrote:
On 2016/3/7 12:34, Joonsoo Kim wrote:
On Fri, Mar 04, 2016 at 03:35:26PM +0800, Hanjun Guo wrote:
On 2016/3/4 14:38, Joonsoo Kim wrote:
On Fri, Mar 04, 2016 at 02:05:09PM +0800, Hanjun Guo wrote:
On 2016/3/4 12:32, Joonsoo Kim wrote:
On
From: David Howells
Date: Mon, 07 Mar 2016 14:38:06 +
> Add a common object cache implementation for RxRPC. This will be used to
> cache objects of various types (calls, connections, local and remote
> endpoint records). Each object that would be cached must contain an
On Mon, Mar 7, 2016 at 1:03 PM, Andy Lutomirski wrote:
> On Mon, Mar 7, 2016 at 9:17 AM, Brian Gerst wrote:
>> On Sun, Mar 6, 2016 at 12:52 AM, Andy Lutomirski wrote:
>>> Due to a blatant design error, SYSENTER doesn't clear TF. As a
On Mon, Mar 7, 2016 at 10:41 AM, Brian Gerst wrote:
> On Mon, Mar 7, 2016 at 1:03 PM, Andy Lutomirski wrote:
>> On Mon, Mar 7, 2016 at 9:17 AM, Brian Gerst wrote:
>>> On Sun, Mar 6, 2016 at 12:52 AM, Andy Lutomirski
Am Montag, 7. März 2016, 19:18:13 schrieb Andreas Färber:
> To avoid changes to input bindings not reaching linux-input reviewers
> add an appropriate file pattern to the MAINTAINERS entry.
>
> Reported-by: Heiko Stübner
> Signed-off-by: Andreas Färber
not
Hi All,
> It's much easier for us if all DTS changes go in through the arm-soc
> trees, to avoid these kind of conflicts. Is this on a branch where you
> can easily drop it and we pick it up instead, or is it on a now-stable
> branch?
>
>
> -Olof
I can always redo the tree once you picked it
On Mon, 7 Mar 2016 10:04:21 -0800
Andy Lutomirski wrote:
> > Exactly. The compiler may get away with this in userspace (maybe), but
> > for the kernel, it is definitely a show stopper. Especially if it knows
> > that an asm() may be called.
>
> It's broken for user code
From: Khalid Aziz
Date: Mon, 7 Mar 2016 11:24:54 -0700
> Tags can be cleared by user by setting tag to 0. Tags are
> automatically cleared by the hardware when the mapping for a virtual
> address is removed from TSB (which is why swappable pages are a
> problem), so
From: Andy Lutomirski
Date: Mon, 7 Mar 2016 10:49:57 -0800
> What data structure or structures changes when this stxa instruction happens?
An internal table, maintained by the CPU and/or hypervisor, and if in physical
addresses then in a region which is only accessible by
On Mon, Feb 22, 2016 at 8:03 AM, Bjorn Helgaas wrote:
>
> On Sat, Feb 20, 2016 at 1:47 PM, Duc Dang wrote:
> > On Tue, Feb 9, 2016 at 5:56 PM, Duc Dang wrote:
> >> This patch makes pci-xgene-msi driver ACPI-aware and provides
> >> MSI
Hi,
Am 07.03.2016 um 19:34 schrieb Javier Martinez Canillas:
> On Mon, Mar 7, 2016 at 3:24 PM, Andreas Färber wrote:
>> Drop #address-cells and #size-cells, which are not required by the
>> gpio-keys binding documentation, as button sub-nodes are not devices.
>>
>> Reported-by:
As discovered by the kbuild test robot, an allmodconfig build on
microblaze bails out with
ERROR: "isa_io_base" [sound/pci/vx222/snd-vx222.ko] undefined!
ERROR: "isa_io_base" [sound/pci/trident/snd-trident.ko] undefined!
ERROR: "isa_io_base" [sound/pci/snd-via82xx.ko] undefined!
ERROR:
From: Thor Thayer
Move the device structs and defines to altera_edac.h in preparation
for adding the Arria10 L2 cache ECC.
Signed-off-by: Thor Thayer
---
v2: Split original patch into smaller patches. Move private data
and
From: Thor Thayer
Force L2 cache dependency instead of forcing selection of
L2 cache.
Signed-off-by: Thor Thayer
---
v2 No change
---
drivers/edac/Kconfig |5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git
From: Thor Thayer
In preparation for the Arria10 peripheral ECCs, irq_flags
was added to the private data structure because Arria10
uses shared IRQs while Cyclone5/Arria5 have exclusive IRQs.
Signed-off-by: Thor Thayer
---
v2: Split
From: Thor Thayer
In preparation for the Arria10 peripheral ECCs, a register
offset from the ECC base was added to the private data
structure to index to the error injection register.
Signed-off-by: Thor Thayer
---
v2: Split large
From: Thor Thayer
In preparation for the Arria10 peripheral ECCs, a register
offset from the ECC base was added to the private data
structure to index to the error clear register. Since
the Arria10 L2 cache ECC registers are not contiguous,
a status base address
The eCAP and ePWM are in the same address space as the PWMSS. Therefore,
no address translation is needed which means the ranges property should be
empty.
This mimics how the PWMSS nodes look in the AM4372.dtsi which is similar
to AM335x.
Signed-off-by: Franklin S Cooper Jr
---
When possible generic node names should be used. So change the node name
from ehrpwm to pwm.
Signed-off-by: Franklin S Cooper Jr
---
arch/arm/boot/dts/am33xx.dtsi | 6 +++---
arch/arm/boot/dts/am4372.dtsi | 12 ++--
arch/arm/boot/dts/da850.dtsi | 4 ++--
3 files
From: Kalle Valo
Date: Fri, 04 Mar 2016 18:26:38 +0200
> three more fixes I would like to get to 4.5 still. It's getting late but
> I think these are still justified and these have been in linux-next
> almost a week. But if you think otherwise please let me know and I'll
>
On 03/07/2016 07:16 AM, Shuah Khan wrote:
> On 03/05/2016 03:00 AM, Mauro Carvalho Chehab wrote:
>> Em Wed, 2 Mar 2016 09:50:31 -0700
>> Shuah Khan escreveu:
>>
>>> Change ALSA driver to use Media Controller API to
>>> share media resources with DVB and V4L2 drivers
>>>
Hi Jassi,
Am Dienstag, 27. Oktober 2015, 15:31:45 schrieb Caesar Wang:
> This driver is found on RK3368 SoCs.
>
> The Mailbox module is a simple APB peripheral that allows both
> the Cortex-A53 MCU system to communicate by writing operation to
> generate interrupt.
> The registers are accessible
On Mon, Mar 07, 2016 at 07:22:27PM +0100, Andi Kleen wrote:
> On Mon, Mar 07, 2016 at 11:08:42AM +0100, Jiri Olsa wrote:
> > On Thu, Mar 03, 2016 at 03:57:31PM -0800, Andi Kleen wrote:
> >
> > SNIP
> >
> > >
> > > % perf stat -x, --metric-only -a -I 1000
> > > 1.001381652,frontend cycles
On Mon, Mar 7, 2016 at 10:39 AM, Khalid Aziz wrote:
> On 03/07/2016 11:12 AM, Dave Hansen wrote:
>>
>> On 03/07/2016 09:53 AM, Andy Lutomirski wrote:
>>>
>>> Also, what am I missing? Tying these tags to the physical page seems
>>> like a poor design to me. This seems
Hi Doug,
Am Montag, 7. März 2016, 10:49:53 schrieb Doug Anderson:
> On Mon, Mar 7, 2016 at 9:57 AM, Heiko Stübner wrote:
> > Am Montag, 7. März 2016, 09:36:07 schrieb Doug Anderson:
> >> Hi,
> >>
> >> On Mon, Mar 7, 2016 at 12:37 AM, Mark yao
wrote:
>
From: Dave Hansen
Date: Mon, 7 Mar 2016 09:35:57 -0800
> On 03/02/2016 12:39 PM, Khalid Aziz wrote:
>> +long enable_sparc_adi(unsigned long addr, unsigned long len)
>> +{
>> +unsigned long end, pagemask;
>> +int error;
>> +struct vm_area_struct *vma, *vma2;
>>
On Mon, Mar 07, 2016 at 07:56:18PM +0100, Heiko Stübner wrote:
> Hi Doug,
>
> Am Montag, 7. März 2016, 10:49:53 schrieb Doug Anderson:
> > On Mon, Mar 7, 2016 at 9:57 AM, Heiko Stübner wrote:
> > > Am Montag, 7. März 2016, 09:36:07 schrieb Doug Anderson:
> > >> Hi,
> > >>
> >
The PWMSS local clock gating registers have no real purpose on OMAP ARM
devices. These registers were left over registers from DSP IP where the
PRCM doesn't exist. There is a silicon bug where gating and ungating clocks
don't function properly. TRMs will be update to indicate that these
registers
This version splits the larger patch in V1 into smaller,
patches.
[PATCHv2 01/11] EDAC: Altera L2 Kconfig change from select to
[PATCHv2 02/11] EDAC, altera: Move Device structs and defines to
[PATCHv2 03/11] EDAC, altera: Add register offset for ECC Enable
[PATCHv2 04/11] EDAC, altera: Add
From: Colin Ian King
The return type is not defined, so it defaults to int, however, the
function is not returning anything, so this is clearly not correct. Make
it a void function.
Signed-off-by: Colin Ian King
Acked-by: Jiri Olsa
From: Namhyung Kim
Now hpp formats are linked using perf_hpp_list_node when hierarchy is
enabled. Use this info to print entries with multiple sort keys in a
single hierarchy properly.
For example, the below example shows using 4 sort keys with 2 levels.
$ perf report
From: Adrian Hunter
Currently, when injecting build ids, if there is AUX data then 'perf
inject' hits all DSOs because it is not known which DSOs the trace data
would hit.
That needs to be done for JIT injection also, and in fact there is no
reason to distinguish what
Unlike the majority of other SOCs the PWM node uses ehrpwm instead of
the generic pwm node name. This patch series switches to the pwm node
name and while at it fix some other minor binding documentation issues.
This patch series also includes a patch to insure ABI compatibility.
This series was
in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git
tags/perf-core-for-mingo-20160307
for you to fetch changes up to b03ae342d9bec460a6c9c327c3f5f758263b0932:
perf report: Use hierarchy hpp list on gtk (2016-03-07 15:10:41 -0300
On Mon, Mar 07, 2016 at 08:45:20PM +0100, Dmitry Vyukov wrote:
> Yes, it is. I never saw this bug again. Forgot to update this thread. Sorry.
Cool, thanks. The patch isn't applied yet, so either some other patch
fixed it and this patch not necessary anymore or you kept the patch
applied. Please
On 03/07/2016 11:22 AM, Robert Richter wrote:
On 03.03.16 15:55:35, David Daney wrote:
From: Ganapatrao Kulkarni
Add DT bindings for numa mapping of memory, CPUs and IOs.
Reviewed-by: Robert Richter
Signed-off-by: Ganapatrao Kulkarni
On Mon, Mar 07, 2016 at 04:02:14PM +0800, Yao Dongdong wrote:
> In the chapter 'analogy with reader-writer locking', the sample
> code uses spinlock_t in reader-writer case. Just correct it so
> that we can read the document easily.
>
> Signed-off-by: Yao Dongdong
Good
09.01.2016 04:48, Andy Lutomirski пишет:
On Fri, Jan 8, 2016 at 5:43 PM, Stas Sergeev wrote:
09.01.2016 02:24, Andy Lutomirski пишет:
It's not sigaltstack that I'm thinking about. It's signal delivery.
If you end up in DOS mode with SP coincidentally pointing to the
sigaltstack
Hi,
On Mon, Mar 7, 2016 at 9:57 AM, Heiko Stübner wrote:
> Am Montag, 7. März 2016, 09:36:07 schrieb Doug Anderson:
>> Hi,
>>
>> On Mon, Mar 7, 2016 at 12:37 AM, Mark yao wrote:
>> > On 2016年03月05日 20:39, Russell King - ARM Linux wrote:
>> >> On Sat,
From: Moritz Fischer
Date: Mon, 7 Mar 2016 08:17:38 -0800
> @@ -945,6 +943,7 @@ static int macb_rx_frame(struct macb *bp, unsigned int
> first_frag,
> static int macb_rx(struct macb *bp, int budget)
> {
> int received = 0;
> + int dropped;
> unsigned
From: Michael Neuling
This provides AFU drivers a means to associate private data with a cxl
context. This is particularly intended for make the new callbacks for
driver specific events easier for AFU drivers to use, as they can easily
get back to any private data structures
On Mon, Mar 7, 2016 at 4:19 AM, Sudeep Holla wrote:
> Hi Olof,
>
> On 07/03/16 05:41, Olof Johansson wrote:
>>
>> Hi Wim,
>>
>> It's much easier for us if all DTS changes go in through the arm-soc
>> trees, to avoid these kind of conflicts. Is this on a branch where you
>>
On Fri, 04 Mar 2016 05:04:06 +0100
Mike Galbraith wrote:
> Drop 'success' arg from probe_wakeup_latency_hist_start().
>
> Fixes: cf1dd658 sched: Introduce the trace_sched_waking tracepoint
> Signed-off-by: Mike Galbraith
Thanks, I applied
On Tue, Jan 26, 2016 at 02:28:48PM +0100, Dmitry Vyukov wrote:
> On Mon, Jan 25, 2016 at 6:52 PM, Marcelo Ricardo Leitner
> wrote:
> > Great. Dmitry, please give this a run. Local tests looked good but who
> > knows what syzkaller may find.
>
> Now running with this
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