From: Matthew Wilcox
Because there's no 'struct page' for DAX THPs, a lot of this code is
simpler than the PMD code it mimics. Extra code would need to be added
to support PUDs of anonymous or page-cache THPs.
Signed-off-by: Matthew Wilcox
---
fs/proc/task_mmu.c | 109
From: Matthew Wilcox
The current transparent hugepage code only supports PMDs. This patch
adds support for transparent use of PUDs with DAX. It does not include
support for anonymous pages.
Most of this patch simply parallels the work that was done for huge PMDs.
The only major difference is h
We were assuming that it was OK to do a GFP_KERNEL allocation in page
fault context. That appears to be largely true, but filesystems are
permitted to override that in their setting of mapping->gfp_flags, which
the VM then massages into vmf->gfp_flags. No practical difference for
now, but there m
From: Matthew Wilcox
We don't actually care about the contents of the PUD, as long as it's
present (which is checked by the pagewalk code), so just set the bits
to indicate presence and return.
Signed-off-by: Matthew Wilcox
---
mm/mincore.c | 13 +
1 file changed, 13 insertions(+)
On Tue, Mar 08, 2016 at 03:53:41PM +0800, Lu Baolu wrote:
> Intel SOC chips are featured with USB dual role. The host role is
> provided by Intel xHCI IP, and the gadget role is provided by IP
> from designware. Tablet platform designs always share a single
> port for both host and gadget controlle
On Tue, Mar 08, 2016 at 03:53:44PM +0800, Lu Baolu wrote:
> Several Intel PCHs and SOCs have an internal mux that is used to
> share one USB port between device controller and host controller.
>
> A usb port mux could be abstracted as the following elements:
> 1) mux state: HOST or PERIPHERAL;
> 2
This patch enables a number of devices currently supported by the Hi6220
and 96boards HiKey. These include
a) Hi655x PMIC and regulator
b) Hi6220 I2C, USB, MMC, mailbox, and reset
c) CONFIG_PINCTRL_SINGLE, and CONFIG_LEDS_GPIO
v2:
- rebase to next-20160310, CONFIG_MMC_BLOCK_MINORS=16 is already
add CONFIG_SPI_SPIDEV as module, for arm64.
Signed-off-by: Guodong Xu
Reviewed-by: Arnd Bergmann
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index dbd6694..2d92343 100644
--- a/arch/arm64/config
network adapters
v2:
- rebase to next-20160310, CONFIG_MMC_BLOCK_MINORS=16 is already in.
- set CONFIG_I2C_DESIGNWARE_PLATFORM to be build as module
- Add general features for arm64
Akira Tsukamoto (1):
ARM64: defconfig: enable several common USB network adapters
Guodong Xu (2):
arm64: defconfig
From: Akira Tsukamoto
The arm64 system is likely to be used as a host computer instead of
embedded devices and adding USB-Ethernet dongles to make it behave as
host PC is mandatory.
Changelog:
v2: Changed drivers to be as modules instead of built-in.
Signed-off-by: Akira Tsukamoto
Signed-off-b
Currently there is no way of disabling CPU features reported by the CPUID
instruction. Which sometimes turn out to be broken [1] or undesired [2].
We can assume we will run into similar situations again sooner or later.
The only way to fix this is to do a microcode update (if it is available),
as t
On 03/10/2016 11:05 AM, Shuah Khan wrote:
> On 03/10/2016 10:53 AM, Mauro Carvalho Chehab wrote:
>> Em Thu, 10 Mar 2016 09:16:30 -0700
>> Shuah Khan escreveu:
>>
>>> On 03/08/2016 08:26 PM, Shuah Khan wrote:
This reverts commit 9822f4173f84cb7c592edb5e1478b7903f69d018.
This commit breaks
* Rich Felker [2016-03-10 18:28:20 -0500]:
> On Thu, Mar 10, 2016 at 07:03:31PM +0100, Ingo Molnar wrote:
> >
> > * Rich Felker wrote:
> >
> > > > So instead of a sticky cancellation flag, we could introduce a sticky
> > > > cancellation signal.
> > > >
> > > > A 'sticky signal' is not cleare
On 03/11/2016 08:03 AM, Greg Kroah-Hartman wrote:
> On Tue, Mar 08, 2016 at 03:53:41PM +0800, Lu Baolu wrote:
>> Intel SOC chips are featured with USB dual role. The host role is
>> provided by Intel xHCI IP, and the gadget role is provided by IP
>> from designware. Tablet platform designs always
[v2 - now with correct cc list. Sorry for the dup, Linus]
Hi Linus,
Can you please pull the XFS fixes from the tag below? This is a fix
for a regression introduced in 4.5-rc1 by the new torn log write
detection code. The regression only affects people moving a clean
filesystem between machines/ke
Hi Piotr,
[auto build test ERROR on next-20160310]
[cannot apply to tip/x86/core xen-tip/linux-next v4.5-rc7 v4.5-rc6 v4.5-rc5
v4.5-rc7]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Piotr
On Sat, 2016-30-01 at 03:07:10 UTC, Sukadev Bhattiprolu wrote:
> >From 9b5848ce1834a4d82fc251022035d36d9e26b500 Mon Sep 17 00:00:00 2001
> From: Sukadev Bhattiprolu
> Date: Sat, 23 Jan 2016 03:58:12 -0500
> Subject: [PATCH 1/2] powerpc/perf/hv-24x7: Fix usage with chip events.
>
> 24x7 counters c
On Tue, 2016-16-02 at 23:24:27 UTC, Sukadev Bhattiprolu wrote:
> >From aff5a822e873522b9a3f355f816547394b452a64 Mon Sep 17 00:00:00 2001
> From: Sukadev Bhattiprolu
> Date: Tue, 16 Feb 2016 20:07:51 -0500
> Subject: [PATCH 1/2] powerpc/perf/hv-24x7: Display domain indices in sysfs
>
> To help use
On Mon, 2016-11-01 at 22:55:25 UTC, Sukadev Bhattiprolu wrote:
> We used the PME_ prefix earlier to avoid some macro/variable name
> collisions. We have since changed the way we define/use the event
> macros so we no longer need the prefix.
>
> By dropping the prefix, we keep the the event macros
On Tue, 2016-03-08 at 14:47 -0800, Dan Williams wrote:
> If a write is directed at a known bad block perform the following:
>
> 1/ write the data
>
> 2/ send a clear poison command
>
> 3/ invalidate the poison out of the cache hierarchy
>
> Cc:
> Cc: Vishal Verma
> Cc: Ross Zwisler
> Signed-
From: Fenghua Yu
A few new AVX-512 instruction groups/features are added in cpufeatures.h
for enuermation: AVX512DQ, AVX512BW, and AVX512VL.
Clear the flags in fpu__xstate_clear_all_cpu_caps().
The specification for latest AVX-512 including the features can be found at
https://software.intel.co
On 03/11/2016 07:57 AM, Greg Kroah-Hartman wrote:
> On Thu, Mar 10, 2016 at 01:39:43PM +0100, Oliver Neukum wrote:
>> On Tue, 2016-03-08 at 15:53 +0800, Lu Baolu wrote:
>>
>>> diff --git a/Documentation/ABI/testing/sysfs-bus-platform
>>> b/Documentation/ABI/testing/sysfs-bus-platform
>>> index 5
Hi,
Trying to run a Docker container on a mainline kernel is failing
intermittently, in interesting and exciting ways, such as:
$ docker run -it --rm --env PACKAGE=sinatra npmtest
operation not permitted
docker: Error response from daemon: Cannot start container
4fc0120a6389f25241f84527a0d318548
在 2016/3/11 3:09, Alan Tull 写道:
> On Fri, Mar 4, 2016 at 1:44 AM, qiujiang wrote:
>> This patch converts device node to fwnode in
>> dwapb_port_property for designware gpio driver,
>> so as to provide a unified data structure for DT
>> and ACPI bindings.
>>
>> Acked-by: Andy Shevchenko
>> Signed-
On Fri, Mar 11, 2016 at 01:18:54AM +0100, Szabolcs Nagy wrote:
> * Rich Felker [2016-03-10 18:28:20 -0500]:
> > On Thu, Mar 10, 2016 at 07:03:31PM +0100, Ingo Molnar wrote:
> > >
> > > * Rich Felker wrote:
> > >
> > > > > So instead of a sticky cancellation flag, we could introduce a sticky
>
On Thu, Mar 10, 2016 at 4:39 PM, Verma, Vishal L
wrote:
> On Tue, 2016-03-08 at 14:47 -0800, Dan Williams wrote:
>> If a write is directed at a known bad block perform the following:
>>
>> 1/ write the data
>>
>> 2/ send a clear poison command
>>
>> 3/ invalidate the poison out of the cache hierar
在 2016/3/11 4:27, Andy Shevchenko 写道:
> On Thu, Mar 10, 2016 at 9:09 PM, Alan Tull wrote:
>> On Fri, Mar 4, 2016 at 1:44 AM, qiujiang wrote:
>>> This patch converts device node to fwnode in
>>> dwapb_port_property for designware gpio driver,
>>> so as to provide a unified data structure for DT
>>
On Thu, 2016-03-10 at 14:04 +0100, Torsten Duwe wrote:
> On Thu, Mar 10, 2016 at 01:51:16PM +0100, Petr Mladek wrote:
> > On Thu 2016-03-10 13:25:08, Petr Mladek wrote:
> > > On Wed 2016-03-09 18:30:17, Torsten Duwe wrote:
> > > > After the mini stack frame is no longer required for TOC storage, it
Hi Piotr,
[auto build test WARNING on next-20160310]
[cannot apply to tip/x86/core xen-tip/linux-next v4.5-rc7 v4.5-rc6 v4.5-rc5
v4.5-rc7]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits
On Thu, 2016-03-10 at 16:15 +0530, Shreyas B Prabhu wrote:
> Hi,
> Any thoughts on this?
Haven't had time to give it a proper review yet.
Will try and get to it.
cheers
On Thu, Mar 10, 2016 at 4:48 PM, Rich Felker wrote:
> On Fri, Mar 11, 2016 at 01:18:54AM +0100, Szabolcs Nagy wrote:
>> * Rich Felker [2016-03-10 18:28:20 -0500]:
>> > On Thu, Mar 10, 2016 at 07:03:31PM +0100, Ingo Molnar wrote:
>> > >
>> > > * Rich Felker wrote:
>> > >
>> > > > > So instead of
On Mon, Mar 07, 2016 at 07:54:16PM +0100, Heiko Stübner wrote:
> Am Montag, 7. März 2016, 19:18:13 schrieb Andreas Färber:
> > To avoid changes to input bindings not reaching linux-input reviewers
> > add an appropriate file pattern to the MAINTAINERS entry.
> >
> > Reported-by: Heiko Stübner
> >
On 2016年03月10日 23:26, Paolo Bonzini wrote:
>
>
> On 10/03/2016 15:40, Xiao Guangrong wrote:
>> long dirty_count = kvm->tlbs_dirty;
>>
>> +/*
>> + * read tlbs_dirty before doing tlb flush to make sure not tlb
>> request is
>> + * lost.
>> + */
>> smp_mb();
On Thu, Mar 10, 2016 at 7:45 AM, Bryan O'Donoghue
wrote:
> On Thu, 2016-03-10 at 17:22 +0200, Andy Shevchenko wrote:
>> On Thu, Mar 10, 2016 at 4:59 PM, Borislav Petkov
>> wrote:
>> > On Thu, Mar 10, 2016 at 03:31:43PM +0200, Andy Shevchenko wrote:
>> > > Looks like it lacks that one.
>> > >
>> >
On Thu, Mar 10, 2016 at 6:59 AM, Borislav Petkov wrote:
> On Thu, Mar 10, 2016 at 03:31:43PM +0200, Andy Shevchenko wrote:
>> Looks like it lacks that one.
>>
>> # grep -i fxsr /proc/cpuinfo; echo $?
>> 1
>
> Ok, so looking at where the warning comes from:
>
> [ 14.714533] WARNING: CPU: 0 PID: 8
* Rich Felker [2016-03-10 19:48:59 -0500]:
> On Fri, Mar 11, 2016 at 01:18:54AM +0100, Szabolcs Nagy wrote:
> > * Rich Felker [2016-03-10 18:28:20 -0500]:
> > > On Thu, Mar 10, 2016 at 07:03:31PM +0100, Ingo Molnar wrote:
> > > >
> > > > The sticky signal is only ever sent when the thread is in
On Fri, Mar 11, 2016 at 08:20:43AM +0800, Lu Baolu wrote:
>
>
> On 03/11/2016 08:03 AM, Greg Kroah-Hartman wrote:
> > On Tue, Mar 08, 2016 at 03:53:41PM +0800, Lu Baolu wrote:
> >> Intel SOC chips are featured with USB dual role. The host role is
> >> provided by Intel xHCI IP, and the gadget rol
> "Arnd" == Arnd Bergmann writes:
Arnd> Looking through what other drivers do, I've found a couple of
Arnd> patterns now. n particular, most use the SG_IO ioctl to pass down
Arnd> commands from user space into a device specific command
Arnd> queue. Have you looked at that interface in the pas
* Szabolcs Nagy [2016-03-11 02:39:47 +0100]:
> * Rich Felker [2016-03-10 19:48:59 -0500]:
> > On Fri, Mar 11, 2016 at 01:18:54AM +0100, Szabolcs Nagy wrote:
> > > * Rich Felker [2016-03-10 18:28:20 -0500]:
> > > > On Thu, Mar 10, 2016 at 07:03:31PM +0100, Ingo Molnar wrote:
> > > > >
> > > > >
On 10/03/16 12:18, Ian Munsie wrote:
On a related matter, we should send a patch to remove some of the
leftover config options that were added to smooth the merging of
cxlflash in the first place (CXL_KERNEL_API, CXL_EEH).
I'm happy to do that after this series is merged.
--
Andrew Donnellan
On Thu, Mar 10, 2016 at 1:56 AM, Ingo Molnar wrote:
>
> * Andy Lutomirski wrote:
>
>> On Fri, Feb 12, 2016 at 11:04 AM, Andy Lutomirski
>> wrote:
>> > On Mon, Sep 21, 2015 at 11:23 PM, Ingo Molnar wrote:
>> >> So when memory hotplug removes a piece of physical memory from pagetable
>> >> mappi
On 2016/3/4 21:37, Sergei Shtylyov wrote:
Hello.
On 3/4/2016 4:09 AM, Daode Huang wrote:
In V2 chip, when sending mamagement packets, the driver should
config the port id to BD descs.
Signed-off-by: Daode Huang
Signed-off-by: Lisheng
---
drivers/net/ethernet/hisilicon/hns/hnae.h
On Fri, Mar 11, 2016 at 02:39:47AM +0100, Szabolcs Nagy wrote:
> * Rich Felker [2016-03-10 19:48:59 -0500]:
> > On Fri, Mar 11, 2016 at 01:18:54AM +0100, Szabolcs Nagy wrote:
> > > * Rich Felker [2016-03-10 18:28:20 -0500]:
> > > > On Thu, Mar 10, 2016 at 07:03:31PM +0100, Ingo Molnar wrote:
> >
job_state: finished
loadavg: 6.31 1.46 0.48 2/1304 2974
start_time: '1457642071'
end_time: '1457642076'
version: "/lkp/lkp/.src-20160310-210128"
2016-03-11 04:34:28 echo performance >
/sys/devices/system/cpu/cpu0/cpufreq/scaling_governor
2016-03-11 04:34:28 echo performan
Hi all,
Today's linux-next merge of the tip tree got a conflict in:
kernel/sched/sched.h
between commit:
adaf9fcd1369 ("cpufreq: Move scheduler-related code to the sched directory")
from the pm tree and commit:
e9532e69b8d1 ("sched/cputime: Fix steal time accounting vs. CPU hotplug")
f
On 2016/3/4 21:39, Sergei Shtylyov wrote:
On 3/4/2016 4:09 AM, Daode Huang wrote:
This patch adds uc match for debug port by:
1)Enables uc match of debug port when initializing gmac
2)Enables uc match of mac address register2
Signed-off-by: Daode Huang
Signed-off-by: lipeng
Lipeng is his
On Thu, Feb 04, 2016 at 11:34:36PM -0500, Sinan Kaya wrote:
> +
> +#define EVRE_SIZE16 /* each EVRE is 16 bytes */
> +
> +#define TRCA_CTRLSTS_OFFSET 0x000
> +#define TRCA_RING_LOW_OFFSET 0x008
> +#define TRCA_RING_HIGH_OFFSET0x00C
> +#defi
015-02-07.cgz-x86_64-rhel-6ab2a4b806ae21b6c3e47c5ff1285ec06d505325-20160310-20183-1dvjl01-0.yaml"
max_uptime: 1208.50002
initrd: "/osimage/debian/debian-x86_64-2015-02-07.cgz"
bootloader_append:
- root=/dev/ram0
- user=lkp
-
job=/lkp/scheduled/lkp-hsx02/bisect_fsmark-performance-1x-64t-8BRD_12G-RAID5-x
On Thu, Feb 04, 2016 at 11:34:32PM -0500, Sinan Kaya wrote:
> Creating a QCOM directory for all QCOM DMA source files.
Applied after fixing subsystem name
--
~Vinod
On Thu, Feb 04, 2016 at 11:34:33PM -0500, Sinan Kaya wrote:
> Add documentation for the Qualcomm Technologies HIDMA binding.
Applied after fixing subsystem name
--
~Vinod
On Thu, Feb 04, 2016 at 11:34:35PM -0500, Sinan Kaya wrote:
> This patch adds support for hidma engine. The driver consists of two
> logical blocks. The DMA engine interface and the low-level interface.
> The hardware only supports memcpy/memset and this driver only support
> memcpy interface. HW a
Hi Dmitry:
Thanks for your response. I'll fixed issues you remarked in the mail.
Best Regards
--
Jeffrey Lin,林義章
瑞鼎科技
Raydium Semiconductor Corporation
Tel:(03)666-1818 Ext.4163
Fax:(03)666-1919
-Original Message-
From: D
On Thu, Feb 04, 2016 at 11:34:34PM -0500, Sinan Kaya wrote:
> The Qualcomm Technologies HIDMA device has been designed to support
> virtualization technology. The driver has been divided into two to follow
> the hardware design.
Applied after fixing subsystem name
--
~Vinod
On Fri, Mar 11, 2016 at 11:44:54AM +1100, Daniel Axtens wrote:
> Hi,
>
> Trying to run a Docker container on a mainline kernel is failing
> intermittently, in interesting and exciting ways, such as:
>
> $ docker run -it --rm --env PACKAGE=sinatra npmtest
> operation not permitted
> docker: Error
Hello:
There shouldn't be any hardware dependencies on these device IDs out there.
I've checked with the author of the specification these IDs are published in,
and he said that they never corresponded to any existing or planned hardware.
(That begs the question of why they appeared in an earli
This patch adds CONFIG_CPU_SUP_AMD as the dependence of fam15h_power
driver. Because the following patch will use the interface from
x86/kernel/cpu/amd.c.
Otherwise, the below error might be encountered:
All errors (new ones prefixed by >>):
drivers/built-in.o: In function `fam15h_power_probe
Hi Guenter,
This serial of patches introduces an accumulated power reporting
algorithm. It will calculate the average power consumption for the
processor. The cpu feature flag is CPUID.8000_0007H:EDX[12].
This algorithm is used to test the comparison of processor power
consumption with between MW
This patch adds a member in fam15h_power_data which specifies the
compute unit accumulated power. It adds do_read_registers_on_cu to do
all the read to all MSRs and run it on one of the online cores on each
compute unit with smp_call_function_many(). This behavior can decrease
IPI numbers.
Suggest
This patch introduces an algorithm that computes the average power by
reading a delta value of “core power accumulator” register during
measurement interval, and then dividing delta value by the length of
the time interval.
User is able to use power1_average entry to measure the processor power
co
This patch adds the description to explain the TDP reporting mechanism
and accumulated power algorithm.
Signed-off-by: Huang Rui
Cc: Borislav Petkov
---
Documentation/hwmon/fam15h_power | 57 +++-
drivers/hwmon/fam15h_power.c | 2 +-
2 files changed, 57
This patch adds a platform check function to make code more readable.
Signed-off-by: Huang Rui
---
drivers/hwmon/fam15h_power.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/hwmon/fam15h_power.c b/drivers/hwmon/fam15h_power.c
index 35800cd..a0bea56 100644
-
PTSC is the performance timestamp counter value in a cpu core and the
cores in one compute unit have the fixed frequency. So it picks up the
performance timestamp counter value of the first core per compute unit
to measure the interval for average power per compute unit.
Signed-off-by: Huang Rui
On 02/27/2016 06:22 PM, Nicholas A. Bellinger wrote:
> On Fri, 2016-02-26 at 13:33 +0100, Christoph Hellwig wrote:
>> Replace the current NULL-terminated array of default groups with a linked
>> list. This gets rid of lots of nasty code to size and/or dynamically
>> allocate the array.
>>
>> While
On Thu, Mar 10, 2016 at 11:20 PM, Rafael J. Wysocki wrote:
> On Thursday, March 10, 2016 04:10:36 PM Richard Cochran wrote:
>> The function, cpufreq_quick_get, accesses the global 'cpufreq_driver' and
>> its fields without taking the associated lock, cpufreq_driver_lock.
>>
>> Without the locking,
On 2016年03月10日 21:46, One Thousand Gnomes wrote:
When userspace get setting with TIOCGSERIAL,
1.On 64bit kernel + 32bit rootfs, compat ioctl code use 0x to
mark invalid conversion.
Start at the beginning. What is being passed back and forth that causes
the problem. What memory address d
> "Yaniv" == Yaniv Gardi writes:
Yaniv> V8: fixed cyclic dependency by removing ufs_quirk.c that was
Yaniv> previously added in V7 06/17, and moving its code into ufshcd.c
Patch 6 is now different yet it retains Reviewed-by: tags from the
previous version. These should have been removed.
Bu
No matter inline data flag is set or not, get_node_page is
going work now. But actually we can avoid it by puting the
check of inline data flag in advance to save this cpu cycle.
Signed-off-by: Shawn Lin
---
fs/f2fs/inline.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --
Remove the f2fs_has_inline_data for f2fs_read_data_page,
and let f2fs_read_inline_data take over gatekeeper of
checking inline data flag.
Signed-off-by: Shawn Lin
---
fs/f2fs/data.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/fs/f2fs/data.c b/fs/f2fs/data.c
index e
>
> Hi,
> I'm just catching back up on this thread; so without reference to any
> particular previous mail in the thread.
>
> 1) How many of the free pages do we tell the host about?
> Your main change is telling the host about all the
> free pages.
Yes, all the guest's free pages.
On Saturday 05 March 2016 11:48 AM, pankaj.dubey wrote:
> Hi
>
> On Wednesday 02 March 2016 11:23 PM, Rob Herring wrote:
>> On Thu, Feb 25, 2016 at 02:03:37PM +0530, Pankaj Dubey wrote:
>>> This patch adds exynos-srom binding information for SROM Controller
>>> driver on Exynos SoCs.
>>>
>>> CC:
No matter inline data flag is set or not, current code is
going to new a dnode. But actually we can avoid it by puting
the check of inline data flag in advance to save this cpu cycle.
Signed-off-by: Shawn Lin
---
fs/f2fs/inline.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
di
Remove the f2fs_has_inline_data for f2fs_write_data_page,
and let f2fs_write_inline_data take over gatekeeper of
checking inline data flag.
Signed-off-by: Shawn Lin
---
fs/f2fs/data.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/fs/f2fs/data.c b/fs/f2fs/data.c
index e5c
On 03/09/2016 05:40 PM, Anshuman Khandual wrote:
> Currently both the ARCH_WANT_GENERAL_HUGETLB functions 'huge_pte_alloc'
> and 'huge_pte_offset' dont take into account huge page implementation
> at the PGD level. With addition of PGD awareness into these functions,
> more architectures like POWER
On 03/09/2016 05:40 PM, Anshuman Khandual wrote:
> This just adds 'follow_huge_pgd' function which is will be used
> later in this series to make 'follow_page_mask' function aware
> of PGD based huge page implementation.
Hugh/Mel/Naoya/Andrew,
Thoughts/inputs/suggestions ? Does this chang
On 03/09/2016 05:40 PM, Anshuman Khandual wrote:
> Currently the function 'follow_page_mask' does not take into account
> PGD based huge page implementation. This change achieves that and
> makes it complete.
Hugh/Mel/Naoya/Andrew,
Thoughts/inputs/suggestions ? Does this change look okay
Both .get_rxfh and .get_rxfh are always return 0, it should return result
from hardware when getting or setting rss. And the rss function should
return the correct data type.
Signed-off-by: Kejian Yan
---
change log:
PATCH v3:
- This patch removes unused variable 'ret' to fix the build warning
If trying to get receive flow hash indirection table by ethtool, it needs
to call .get_rxnfc to get ring number first. So this patch implements the
.get_rxnfc of ethtool. And the data type of rss_indir_table is u32, it has
to be multiply by the width of data type when using memcpy.
Signed-off-by:
When we use ethtool to retrieves or configure the receive flow hash
indirection table, ethtool needs to call .get_rxnfc to get the ring number
so this patchset implements the .get_rxnfc and fixes the bug that we can
not get the tatal table each time.
---
change log:
PATCH v3:
- This patchset fix
Add device HID AMDI0020 to match the AMD ACPI Vendor ID (AMDI) as
registered in http://www.uefi.org/acpi_id_list, and the UART
controller on future AMD paltform will use the HID instead of AMD0020.
Signed-off-by: Wang Hongcheng
---
drivers/acpi/acpi_apd.c | 1 +
drivers/tty/serial/8250
> On Thu, Feb 04, 2016 at 11:34:36PM -0500, Sinan Kaya wrote:
>
>> +
>> +#define EVRE_SIZE 16 /* each EVRE is 16 bytes */
>> +
>> +#define TRCA_CTRLSTS_OFFSET 0x000
>> +#define TRCA_RING_LOW_OFFSET0x008
>> +#define TRCA_RING_HIGH_OFFSET 0
Combine sensor group-related data structures into struct
tegra_tsensor_group. This provides a single location for
sensor group data storage.
More sensor group data will be added in subsequent patches.
Signed-off-by: Wei Ni
---
drivers/thermal/tegra/tegra-soctherm.c | 145 +++
Move Tegra soctherm driver to tegra directory, it's easy to maintain
and add more new function support for Tegra platforms.
This will also help to split soctherm driver into common parts and
chip specific data related parts.
Signed-off-by: Wei Ni
---
drivers/thermal/Kconfig
Get rid of T124-specific PDIV/HOTSPOT hack.
tegra-soctherm.c contained a hack to set the SENSOR_PDIV and
SENSOR_HOTSPOT_OFFSET registers - it just did two writes of
T124-specific opaque values. Convert these into a form that can be
substituted on a per-chip basis, and into structure fields that ha
Split most of the Tegra124 data and code into a Tegra124-specific
file.
Split most of the fuse-related code into a fuse-related source file.
This is in preparation for adding a Tegra210-specific driver in a
future patch.
Beyond the maintainability improvements, this is intended to separate
chip-sp
Add Tegra210 specific SOC_THERM driver.
Signed-off-by: Wei Ni
---
drivers/thermal/tegra/Makefile| 1 +
drivers/thermal/tegra/soctherm-fuse.c | 11 ++
drivers/thermal/tegra/soctherm.c | 6 ++
drivers/thermal/tegra/soctherm.h | 4 +
drivers/thermal/tegra/te
Adds soctherm node for Tegra210, and add cpu,
gpu, mem, pllx as thermal-zones. Set critical
trip temp for cpu and gpu thermal zone.
Signed-off-by: Wei Ni
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 60
1 file changed, 60 insertions(+)
diff --git a/arch/arm64/
Add support for hardware critical thermal limits to the
SOC_THERM driver. It use the Linux thermal framework to
create critical trip temp, and set it to SOC_THERM hardware.
If these limits are breached, the chip will reset, and if
appropriately configured, will turn off the PMIC.
This support is c
Add a debugfs interface to show register contents for debug.
Signed-off-by: Wei Ni
---
drivers/thermal/tegra/soctherm.c | 143 ++-
drivers/thermal/tegra/soctherm.h | 2 +
2 files changed, 142 insertions(+), 3 deletions(-)
diff --git a/drivers/thermal/tegra/
The "critical" type trip in thermal zone can be
set to SOC_THERM hardware, it can trigger shut down
or reset event from hardware.
Signed-off-by: Wei Ni
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/thermal/tegra-soctherm.txt | 12
1 file changed, 12 insertions(+)
dif
In current of-thermal, the .set_trip_temp only support to
set trip_temp for SW. But some sensors support to set
trip_temp on hardware, so that can trigger interrupt,
shutdown or any other events.
This patch adds .set_trip_temp() callback in
thermal_zone_of_device_ops{}, so that the sensor device ca
This patchset adds following functions for tegra_soctherm driver:
1. add T210 support.
2. export debugfs to show some registers.
3. add thermtrip funciton.
4. add suspend/resume function.
The v6 series is in:
https://lkml.org/lkml/2016/2/22/66
The v5 series is in:
http://www.spinics.net/lists/linu
Set "critical" trips for cpu and gpu thermal zones,
which can trigger shut down or reset.
Signed-off-by: Wei Ni
---
arch/arm/boot/dts/tegra124.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index e4eac1
Add suspend/resume function in soctherm driver.
And enable it for Tegra124 and Tegra210.
Signed-off-by: Wei Ni
---
drivers/thermal/tegra/soctherm.c | 175 ---
1 file changed, 125 insertions(+), 50 deletions(-)
diff --git a/drivers/thermal/tegra/soctherm.c b/d
Add device HID AMDI0030 to match the AMD ACPI Vendor ID (AMDI) as
registered in http://www.uefi.org/acpi_id_list, and the GPIO controller
on future AMD paltform will use the HID instead of AMD0030.
Signed-off-by: Wang Hongcheng
---
drivers/pinctrl/pinctrl-amd.c | 1 +
1 file changed, 1 insertion
On Thu, Mar 10, 2016 at 12:39:08PM +0530, nancygoel62 wrote:
> This is a patch to the baseband.c file that fixes the warnings of more than
> 80 characters at a line by the checkpatch.pl tool
>
> Signed-off-by: Nancy Goel
> ---
> drivers/staging/vt6655/baseband.c | 16 ++--
> 1 file
On Thu, Mar 10, 2016 at 07:40:09PM +0530, Tanvi Surana wrote:
> I have modified tab error in the file power.c
>
> Signed-Off-By: Tanvi Surana
> ---
> drivers/staging/vt6656/power.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/staging/vt6656/power.c b/drivers/
On Thu, Mar 10, 2016 at 12:22:06PM +0530, Ravishankar Karkala Mallikarjunayya
wrote:
> This is a patch to the s626.c file that fixes up a type issues
> found by the checkpatch.pl tool.
>
> i.e Prefer kernel type 'u8' over 'uint8_t'
> Prefer kernel type 'u16' over 'uint16_t'
> Prefer kerne
On Thu, Mar 10, 2016 at 12:22:07PM +0530, Ravishankar Karkala Mallikarjunayya
wrote:
> This is a patch to the s626.c file that fixes up a Block comments issues
> found by the checkpatch.pl tool.
>
> i.e. Block comments use a trailing */ on a separate line
>
> Signed-off-by: Ravishankar Karkala
This patchset is going to remove some redunant checking
of inline data flag and also going to avoid some unnecessary
cpu waste when doing inline stuff.
Note:
Sorry for sending previous four patches in separate, let
drop them and make them in this thread for better review.
Shawn Lin (8):
f2fs
Improve the test to allow casts to (unsigned) or (signed) to be
found and fixed if desired.
Signed-off-by: Joe Perches
---
scripts/checkpatch.pl | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 75ce6d0..f59203c 1
601 - 700 of 794 matches
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