On Thu, Apr 07, 2016 at 02:29:47PM +0100, Lee Jones wrote:
> On Mon, 04 Apr 2016, Krzysztof Kozlowski wrote:
>
> > The consumer of max77693 regulators on Trats2 board (samsung-usb2-phy
> > driver) supports deferred probing so the max77693 main MFD driver can be
> > built now as a module. This
On Thu, Apr 07, 2016 at 02:29:47PM +0100, Lee Jones wrote:
> On Mon, 04 Apr 2016, Krzysztof Kozlowski wrote:
>
> > The consumer of max77693 regulators on Trats2 board (samsung-usb2-phy
> > driver) supports deferred probing so the max77693 main MFD driver can be
> > built now as a module. This
This patch fix a spelling typo found in
Documentation/sound/alsa/timestamping.txt
Signed-off-by: Masanari Iida
---
Documentation/sound/alsa/timestamping.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/sound/alsa/timestamping.txt
This patch fix a spelling typo found in
Documentation/sound/alsa/timestamping.txt
Signed-off-by: Masanari Iida
---
Documentation/sound/alsa/timestamping.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/sound/alsa/timestamping.txt
Hi Tomasz,
On 4/7/2016 5:41 PM, Bjorn Helgaas wrote:
>>> You say this is undoing the effect of pci_remap_iospace(), but that's
>>> > > only called by native drivers and the generic (OF) driver, not by
>>> > > pci_root.c.
>> >
>> > See the ACPI root bridge driver above.
> If this is a fix to
Hi Tomasz,
On 4/7/2016 5:41 PM, Bjorn Helgaas wrote:
>>> You say this is undoing the effect of pci_remap_iospace(), but that's
>>> > > only called by native drivers and the generic (OF) driver, not by
>>> > > pci_root.c.
>> >
>> > See the ACPI root bridge driver above.
> If this is a fix to
On 2016/4/8 4:58, Arnaldo Carvalho de Melo wrote:
From: Arnaldo Carvalho de Melo
We used libaudit to map ids to syscall names and vice-versa, but that
imposes a delay in supporting new syscalls, having to wait for libaudit
to get those new syscalls on its tables.
To remove
On 2016/4/8 4:58, Arnaldo Carvalho de Melo wrote:
From: Arnaldo Carvalho de Melo
We used libaudit to map ids to syscall names and vice-versa, but that
imposes a delay in supporting new syscalls, having to wait for libaudit
to get those new syscalls on its tables.
To remove that delay, for
On Thu, 2016-04-07 at 16:23 -0400, Johannes Weiner wrote:
> Mike, is that the one you referred to with one group per customer
> account? If so, would you have a pointer to where you outline it?
The usage I loosely outlined, I did in this thread. All of the gory
details I do not have, do not
On Thu, 2016-04-07 at 16:23 -0400, Johannes Weiner wrote:
> Mike, is that the one you referred to with one group per customer
> account? If so, would you have a pointer to where you outline it?
The usage I loosely outlined, I did in this thread. All of the gory
details I do not have, do not
Hi Dom,
I've just tested your patch quickly, and it generates an error on Python 2.7
On 05/04/16 19:38, Dom Cote wrote:
> When using GDB built with python 2.7,
>
> Inferior.read_memory (address, length)
>
> returns a buffer object. When using GDB built with python 3.X,
> it returns a
Hi Dom,
I've just tested your patch quickly, and it generates an error on Python 2.7
On 05/04/16 19:38, Dom Cote wrote:
> When using GDB built with python 2.7,
>
> Inferior.read_memory (address, length)
>
> returns a buffer object. When using GDB built with python 3.X,
> it returns a
On Thu, Apr 7, 2016 at 11:52 PM, Herbert Xu wrote:
> On Wed, Apr 06, 2016 at 10:56:12AM -0700, Tadeusz Struk wrote:
>>
>> The intend is to enable HW acceleration of the TLS protocol.
>> The way it will work is that the user space will send a packet of data
>> via
On Thu, Apr 7, 2016 at 11:52 PM, Herbert Xu wrote:
> On Wed, Apr 06, 2016 at 10:56:12AM -0700, Tadeusz Struk wrote:
>>
>> The intend is to enable HW acceleration of the TLS protocol.
>> The way it will work is that the user space will send a packet of data
>> via AF_ALG and HW will authenticate
On Wed, Apr 06, 2016 at 10:56:12AM -0700, Tadeusz Struk wrote:
>
> The intend is to enable HW acceleration of the TLS protocol.
> The way it will work is that the user space will send a packet of data
> via AF_ALG and HW will authenticate and encrypt it in one go.
There have been suggestions to
On Wed, Apr 06, 2016 at 10:56:12AM -0700, Tadeusz Struk wrote:
>
> The intend is to enable HW acceleration of the TLS protocol.
> The way it will work is that the user space will send a packet of data
> via AF_ALG and HW will authenticate and encrypt it in one go.
There have been suggestions to
On Thu, Apr 7, 2016 at 5:18 AM, Adam Borowski wrote:
> On Wed, 6 Apr 2016, Geert Uytterhoeven wrote:
>> On Wed, Apr 6, 2016 at 12:08 AM, Yury Norov
>> wrote:
>>> v6:
>>> - time_t, __kenel_off_t and other types turned to be 32-bit
>>>for
On Thu, Apr 7, 2016 at 5:18 AM, Adam Borowski wrote:
> On Wed, 6 Apr 2016, Geert Uytterhoeven wrote:
>> On Wed, Apr 6, 2016 at 12:08 AM, Yury Norov
>> wrote:
>>> v6:
>>> - time_t, __kenel_off_t and other types turned to be 32-bit
>>>for compatibility reasons (after v5 discussion);
>
>
On Thu, Apr 7, 2016 at 2:14 PM, Jesper Dangaard Brouer
wrote:
>
> On Wed, 6 Apr 2016 14:45:30 -0700 Kees Cook wrote:
>
>> On Wed, Apr 6, 2016 at 12:35 PM, Thomas Garnier wrote:
> [...]
>> > re-used on slab creation for performance.
On Thu, Apr 7, 2016 at 2:14 PM, Jesper Dangaard Brouer
wrote:
>
> On Wed, 6 Apr 2016 14:45:30 -0700 Kees Cook wrote:
>
>> On Wed, Apr 6, 2016 at 12:35 PM, Thomas Garnier wrote:
> [...]
>> > re-used on slab creation for performance.
>>
>> I'd like to see some benchmark results for this so the
This command just preprocesses .c files into .i files, so cmd_cpp_i_c
seems more suitable.
Signed-off-by: Masahiro Yamada
---
scripts/Makefile.build | 6 +++---
tools/build/Makefile.build | 8
2 files changed, 7 insertions(+), 7 deletions(-)
diff
This command just preprocesses .c files into .i files, so cmd_cpp_i_c
seems more suitable.
Signed-off-by: Masahiro Yamada
---
scripts/Makefile.build | 6 +++---
tools/build/Makefile.build | 8
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/scripts/Makefile.build
This command just preprocesses .S files into .s files, so cmd_cpp_s_S
seems more suitable.
Signed-off-by: Masahiro Yamada
---
scripts/Makefile.build | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/scripts/Makefile.build
This command just preprocesses .S files into .s files, so cmd_cpp_s_S
seems more suitable.
Signed-off-by: Masahiro Yamada
---
scripts/Makefile.build | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/scripts/Makefile.build b/scripts/Makefile.build
index 7e4df13..e65a3e9
On Fri, 8 Apr 2016 09:51:04 +0800
Zeng Zhaoxiu wrote:
>
>
> 在 2016年04月08日 08:18, Boris Brezillon 写道:
> > Hi Zeng,
> >
> > On Fri, 8 Apr 2016 00:48:17 +0800
> > zengzhao...@163.com wrote:
> >
> >> From: Zeng Zhaoxiu
> >>
> >> If there is only
On Fri, 8 Apr 2016 09:51:04 +0800
Zeng Zhaoxiu wrote:
>
>
> 在 2016年04月08日 08:18, Boris Brezillon 写道:
> > Hi Zeng,
> >
> > On Fri, 8 Apr 2016 00:48:17 +0800
> > zengzhao...@163.com wrote:
> >
> >> From: Zeng Zhaoxiu
> >>
> >> If there is only one bit difference in the ECC, the function should
"PHONY += FORCE" is already cared by scripts/Makefile.build,
which these files are included from.
Signed-off-by: Masahiro Yamada
---
Please apply the following to avoid conflicts.
https://patchwork.kernel.org/patch/8572451/
arch/arm/boot/bootp/Makefile | 2 +-
"PHONY += FORCE" is already cared by scripts/Makefile.build,
which these files are included from.
Signed-off-by: Masahiro Yamada
---
Please apply the following to avoid conflicts.
https://patchwork.kernel.org/patch/8572451/
arch/arm/boot/bootp/Makefile | 2 +-
arch/ia64/Makefile |
> From: Joe Perches [mailto:j...@perches.com]
> Sent: Friday, April 8, 2016 9:15
> On Thu, 2016-04-07 at 18:36 -0700, Dexuan Cui wrote:
> > diff --git a/include/net/af_hvsock.h b/include/net/af_hvsock.h
> []
> > +#define VMBUS_RINGBUFFER_SIZE_HVSOCK_RECV (5 * PAGE_SIZE)
> > +#define
> From: Joe Perches [mailto:j...@perches.com]
> Sent: Friday, April 8, 2016 9:15
> On Thu, 2016-04-07 at 18:36 -0700, Dexuan Cui wrote:
> > diff --git a/include/net/af_hvsock.h b/include/net/af_hvsock.h
> []
> > +#define VMBUS_RINGBUFFER_SIZE_HVSOCK_RECV (5 * PAGE_SIZE)
> > +#define
- On Apr 7, 2016, at 9:21 PM, Andy Lutomirski l...@amacapital.net wrote:
> On Thu, Apr 7, 2016 at 6:11 PM, Mathieu Desnoyers
> wrote:
>> - On Apr 7, 2016, at 6:05 PM, Andy Lutomirski l...@amacapital.net wrote:
>>
>>> On Thu, Apr 7, 2016 at 1:11 PM, Peter
- On Apr 7, 2016, at 9:21 PM, Andy Lutomirski l...@amacapital.net wrote:
> On Thu, Apr 7, 2016 at 6:11 PM, Mathieu Desnoyers
> wrote:
>> - On Apr 7, 2016, at 6:05 PM, Andy Lutomirski l...@amacapital.net wrote:
>>
>>> On Thu, Apr 7, 2016 at 1:11 PM, Peter Zijlstra wrote:
On Thu, Apr
Hi Stephen,
2016-04-08 9:33 GMT+09:00 Stephen Boyd :
> On 04/05, Masahiro Yamada wrote:
>> The clk_disable() in the common clock framework (drivers/clk/clk.c)
>> returns immediately if a given clk is NULL or an error pointer. It
>> allows clock consumers to call
Hi Stephen,
2016-04-08 9:33 GMT+09:00 Stephen Boyd :
> On 04/05, Masahiro Yamada wrote:
>> The clk_disable() in the common clock framework (drivers/clk/clk.c)
>> returns immediately if a given clk is NULL or an error pointer. It
>> allows clock consumers to call clk_disable() without
在 2016年04月08日 08:18, Boris Brezillon 写道:
Hi Zeng,
On Fri, 8 Apr 2016 00:48:17 +0800
zengzhao...@163.com wrote:
From: Zeng Zhaoxiu
If there is only one bit difference in the ECC, the function should return 1.
The result of "diff0 & ~(1<
在 2016年04月08日 08:18, Boris Brezillon 写道:
Hi Zeng,
On Fri, 8 Apr 2016 00:48:17 +0800
zengzhao...@163.com wrote:
From: Zeng Zhaoxiu
If there is only one bit difference in the ECC, the function should return 1.
The result of "diff0 & ~(1<
Missing Signed-off-by here.
---
On 04/07/2016 01:37 PM, Andy Shevchenko wrote:
> Intes SoCs, such as Braswell, have DesignWare UART. Split out to separate
> module which also will be used for Intel Quark later.
What's the rationale?
And this really isn't a split; this patch introduces a number of significant
changes from the
On 04/07/2016 01:37 PM, Andy Shevchenko wrote:
> Intes SoCs, such as Braswell, have DesignWare UART. Split out to separate
> module which also will be used for Intel Quark later.
What's the rationale?
And this really isn't a split; this patch introduces a number of significant
changes from the
Hi Kalle,
On Sat, Jan 2, 2016 at 5:25 AM, SF Markus Elfring
wrote:
> From: Markus Elfring
> Date: Fri, 1 Jan 2016 19:09:32 +0100
>
> Replace an explicit initialisation for one local variable at the beginning
> by a conditional
Hi Kalle,
On Sat, Jan 2, 2016 at 5:25 AM, SF Markus Elfring
wrote:
> From: Markus Elfring
> Date: Fri, 1 Jan 2016 19:09:32 +0100
>
> Replace an explicit initialisation for one local variable at the beginning
> by a conditional assignment.
>
> Signed-off-by: Markus Elfring
This looks sane to
On Thu, Apr 7, 2016 at 5:31 PM, Andy Lutomirski wrote:
> From: Borislav Petkov
>
> Erratum 88 affects old AMD K8s, where a SWAPGS fails to cause an input
> dependency on GS. Therefore, we need to MFENCE before it.
>
> But that MFENCE is expensive and unnecessary on
On Thu, Apr 7, 2016 at 5:31 PM, Andy Lutomirski wrote:
> From: Borislav Petkov
>
> Erratum 88 affects old AMD K8s, where a SWAPGS fails to cause an input
> dependency on GS. Therefore, we need to MFENCE before it.
>
> But that MFENCE is expensive and unnecessary on the remaining x86 CPUs
> out
On Thu, Apr 07, 2016 at 05:20:50PM -0700, Andy Lutomirski wrote:
> > > > I had a trinity process get stuck last overnight.
> > > > The reason for it getting stuck is my bug (I think), but
> > > > there's an odd unrelated thing I noticed while debugging this..
> > > >
> > > > $ strace -p
On Thu, Apr 07, 2016 at 05:20:50PM -0700, Andy Lutomirski wrote:
> > > > I had a trinity process get stuck last overnight.
> > > > The reason for it getting stuck is my bug (I think), but
> > > > there's an odd unrelated thing I noticed while debugging this..
> > > >
> > > > $ strace -p
Andy Shevchenko writes:
> On Fri, 2016-02-26 at 16:11 +0200, Andy Shevchenko wrote:
>> On Thu, 2016-02-18 at 01:03 +0100, Rafael J. Wysocki wrote:
>> >
>> > On Wednesday, February 17, 2016 02:17:24 PM Andy Shevchenko wrote:
>> > >
>> > > Switch to use a
Andy Shevchenko writes:
> On Fri, 2016-02-26 at 16:11 +0200, Andy Shevchenko wrote:
>> On Thu, 2016-02-18 at 01:03 +0100, Rafael J. Wysocki wrote:
>> >
>> > On Wednesday, February 17, 2016 02:17:24 PM Andy Shevchenko wrote:
>> > >
>> > > Switch to use a generic UUID API instead of custom
On Thu, Apr 7, 2016 at 6:11 PM, Mathieu Desnoyers
wrote:
> - On Apr 7, 2016, at 6:05 PM, Andy Lutomirski l...@amacapital.net wrote:
>
>> On Thu, Apr 7, 2016 at 1:11 PM, Peter Zijlstra wrote:
>>> On Thu, Apr 07, 2016 at 09:43:33AM -0700,
On Thu, Apr 7, 2016 at 6:11 PM, Mathieu Desnoyers
wrote:
> - On Apr 7, 2016, at 6:05 PM, Andy Lutomirski l...@amacapital.net wrote:
>
>> On Thu, Apr 7, 2016 at 1:11 PM, Peter Zijlstra wrote:
>>> On Thu, Apr 07, 2016 at 09:43:33AM -0700, Andy Lutomirski wrote:
> [...]
>>>
it's inherently
Now calculate_memsize() and calculate_iosize() is the same.
Change them to calculate_size().
Signed-off-by: Yinghai Lu
---
drivers/pci/setup-bus.c | 25 +
1 file changed, 5 insertions(+), 20 deletions(-)
diff --git a/drivers/pci/setup-bus.c
Now calculate_memsize() and calculate_iosize() is the same.
Change them to calculate_size().
Signed-off-by: Yinghai Lu
---
drivers/pci/setup-bus.c | 25 +
1 file changed, 5 insertions(+), 20 deletions(-)
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
On Thu, 2016-04-07 at 18:36 -0700, Dexuan Cui wrote:
> Hyper-V Sockets (hv_sock) supplies a byte-stream based communication
> mechanism between the host and the guest. It's somewhat like TCP over
> VMBus, but the transportation layer (VMBus) is much simpler than IP.
[]
> diff --git
On Thu, 2016-04-07 at 18:36 -0700, Dexuan Cui wrote:
> Hyper-V Sockets (hv_sock) supplies a byte-stream based communication
> mechanism between the host and the guest. It's somewhat like TCP over
> VMBus, but the transportation layer (VMBus) is much simpler than IP.
[]
> diff --git
On Wed, Apr 06, 2016 at 05:06:20PM -0700, Luis R. Rodriguez wrote:
> Now that Andy's ASM paravirt_enabled() use is merged
Sorry I should have provided more context, I meant that now
that Andy's ASM paravirt_enabled() removal is merged:
This is the ASM hack that Andy removed:
在 2016/4/7 21:31, Kishon Vijay Abraham I 写道:
Hi,
On Thursday 07 April 2016 06:30 PM, Kishon Vijay Abraham I wrote:
Hi,
On Tuesday 08 March 2016 01:54 PM, Shawn Lin wrote:
This patch rename "reg" property to "reg_offset".
We rename it to fix the compile issue on ARM64 platform:
(reg_format):
On Wed, Apr 06, 2016 at 05:06:20PM -0700, Luis R. Rodriguez wrote:
> Now that Andy's ASM paravirt_enabled() use is merged
Sorry I should have provided more context, I meant that now
that Andy's ASM paravirt_enabled() removal is merged:
This is the ASM hack that Andy removed:
在 2016/4/7 21:31, Kishon Vijay Abraham I 写道:
Hi,
On Thursday 07 April 2016 06:30 PM, Kishon Vijay Abraham I wrote:
Hi,
On Tuesday 08 March 2016 01:54 PM, Shawn Lin wrote:
This patch rename "reg" property to "reg_offset".
We rename it to fix the compile issue on ARM64 platform:
(reg_format):
- On Apr 7, 2016, at 6:05 PM, Andy Lutomirski l...@amacapital.net wrote:
> On Thu, Apr 7, 2016 at 1:11 PM, Peter Zijlstra wrote:
>> On Thu, Apr 07, 2016 at 09:43:33AM -0700, Andy Lutomirski wrote:
[...]
>>
>>> it's inherently debuggable,
>>
>> It is more debuggable,
- On Apr 7, 2016, at 6:05 PM, Andy Lutomirski l...@amacapital.net wrote:
> On Thu, Apr 7, 2016 at 1:11 PM, Peter Zijlstra wrote:
>> On Thu, Apr 07, 2016 at 09:43:33AM -0700, Andy Lutomirski wrote:
[...]
>>
>>> it's inherently debuggable,
>>
>> It is more debuggable, agreed.
>>
>>> and it
The cpu load update related functions have a weak naming convention
currently, starting with update_cpu_load_*() which isn't ideal as
"update" is a very generic concept.
Since two of these functions are public already (and a third is to come)
that's enough to introduce a more conventional naming
The cpu load update related functions have a weak naming convention
currently, starting with update_cpu_load_*() which isn't ideal as
"update" is a very generic concept.
Since two of these functions are public already (and a third is to come)
that's enough to introduce a more conventional naming
On Thu, Apr 07, 2016 at 01:40:21PM +0300, Roger Quadros wrote:
> On 07/04/16 12:42, Peter Chen wrote:
> > On Wed, Apr 06, 2016 at 09:32:22AM +0300, Roger Quadros wrote:
> >> On 06/04/16 09:09, Felipe Balbi wrote:
> >>>
> >>> Hi,
> >>>
> >>> Roger Quadros writes:
> diff --git
On Thu, Apr 07, 2016 at 01:40:21PM +0300, Roger Quadros wrote:
> On 07/04/16 12:42, Peter Chen wrote:
> > On Wed, Apr 06, 2016 at 09:32:22AM +0300, Roger Quadros wrote:
> >> On 06/04/16 09:09, Felipe Balbi wrote:
> >>>
> >>> Hi,
> >>>
> >>> Roger Quadros writes:
> diff --git
Some code in cpu load update only concern NO_HZ configs but it is
built on all configurations. When NO_HZ isn't built, that code is harmless
but just happens to take some useless ressources in CPU and memory:
1) one useless field in struct rq
2) jiffies record on every tick that is never used
Some code in cpu load update only concern NO_HZ configs but it is
built on all configurations. When NO_HZ isn't built, that code is harmless
but just happens to take some useless ressources in CPU and memory:
1) one useless field in struct rq
2) jiffies record on every tick that is never used
Ticks can happen while the CPU is in dynticks-idle or dynticks-singletask
mode. In fact "nohz" or "dynticks" only mean that we exit the periodic
mode and we try to minimize the ticks as much as possible. The nohz
subsystem uses a confusing terminology with the internal state
"ts->tick_stopped"
This series tries to fix issues against CFS cpu load accounting in
nohz configs (both idle and full nohz). Some optimizations coming along.
Following Peterz reviews, I've tried to improve the changelogs. Comments
have been updated as well and some changes have been refactored.
Ticks can happen while the CPU is in dynticks-idle or dynticks-singletask
mode. In fact "nohz" or "dynticks" only mean that we exit the periodic
mode and we try to minimize the ticks as much as possible. The nohz
subsystem uses a confusing terminology with the internal state
"ts->tick_stopped"
This series tries to fix issues against CFS cpu load accounting in
nohz configs (both idle and full nohz). Some optimizations coming along.
Following Peterz reviews, I've tried to improve the changelogs. Comments
have been updated as well and some changes have been refactored.
Series applied, thanks Alexei.
Series applied, thanks Alexei.
On Thu, Apr 7, 2016 at 5:15 PM, Yinghai Lu wrote:
> On system with several pcie switches, BIOS allocate very tight resources
> to the bridge bar, and it is not aligned to min_align as kernel allocation
> code.
Ok, this came in after I already replied to the other ones.
I'm
On Thu, Apr 7, 2016 at 5:15 PM, Yinghai Lu wrote:
> On system with several pcie switches, BIOS allocate very tight resources
> to the bridge bar, and it is not aligned to min_align as kernel allocation
> code.
Ok, this came in after I already replied to the other ones.
I'm not excited about the
On Thu, Apr 07, 2016 at 04:43:47PM -0500, Timur Tabi wrote:
> On my platform, firmware (UEFI) configures all of the GPIOs. I need
> to get confirmation, but it appears that we don't actually make any
> GPIO calls at all. I see code that looks like this:
>
> for (i = 0;
On Thu, Apr 07, 2016 at 04:43:47PM -0500, Timur Tabi wrote:
> On my platform, firmware (UEFI) configures all of the GPIOs. I need
> to get confirmation, but it appears that we don't actually make any
> GPIO calls at all. I see code that looks like this:
>
> for (i = 0;
On Thu, Apr 7, 2016 at 5:15 PM, Yinghai Lu wrote:
>
> After 5b28541552ef (PCI: Restrict 64-bit prefetchable bridge windows
> to 64-bit resources), we have several reports on resource allocation
> failure, and we try to fix the problem with resource clip, and find
> more
On Thu, Apr 7, 2016 at 5:15 PM, Yinghai Lu wrote:
>
> After 5b28541552ef (PCI: Restrict 64-bit prefetchable bridge windows
> to 64-bit resources), we have several reports on resource allocation
> failure, and we try to fix the problem with resource clip, and find
> more problems.
Quite frankly,
On Thu, Apr 07, 2016 at 10:47:25AM -0400, William Breathitt Gray wrote:
> The Apex Embedded Systems STX104 may be used on 64-bit X86 systems. This
> patch allows the Apex Embedded Systems STX104 DAC driver to be compiled
> for both 32-bit and 64-bit X86 systems.
>
> Signed-off-by: William
On Thu, Apr 07, 2016 at 10:47:25AM -0400, William Breathitt Gray wrote:
> The Apex Embedded Systems STX104 may be used on 64-bit X86 systems. This
> patch allows the Apex Embedded Systems STX104 DAC driver to be compiled
> for both 32-bit and 64-bit X86 systems.
>
> Signed-off-by: William
On one system found bunch of claim resource fail from pci device.
pci_sun4v f02b894c: PCI host bridge to bus :00
pci_bus :00: root bus resource [io 0x2007e-0x2007e0fff] (bus
address [0x-0xfff])
pci_bus :00: root bus resource [mem 0x2-0x27eff]
On one system found bunch of claim resource fail from pci device.
pci_sun4v f02b894c: PCI host bridge to bus :00
pci_bus :00: root bus resource [io 0x2007e-0x2007e0fff] (bus
address [0x-0xfff])
pci_bus :00: root bus resource [mem 0x2-0x27eff]
On Thu, Apr 07, 2016 at 10:47:27AM -0400, William Breathitt Gray wrote:
> The WinSystems EBC-C384 watchdog timer is controlled via ISA bus
> communication. As such, the ISA bus driver is more appropriate than the
> platform driver for the WinSystems EBC-C384 watchdog timer driver.
>
>
On system with several pcie switches, BIOS allocate very tight resources
to the bridge bar, and it is not aligned to min_align as kernel allocation
code.
For example:
02:03.0---0c:00.0---0d:04.0---18:00.0
18:00.0 need 0x1000, and 0x0001.
BIOS only allocate 0x1010 to 0d:04.0 and
On Thu, Apr 07, 2016 at 10:47:27AM -0400, William Breathitt Gray wrote:
> The WinSystems EBC-C384 watchdog timer is controlled via ISA bus
> communication. As such, the ISA bus driver is more appropriate than the
> platform driver for the WinSystems EBC-C384 watchdog timer driver.
>
>
On system with several pcie switches, BIOS allocate very tight resources
to the bridge bar, and it is not aligned to min_align as kernel allocation
code.
For example:
02:03.0---0c:00.0---0d:04.0---18:00.0
18:00.0 need 0x1000, and 0x0001.
BIOS only allocate 0x1010 to 0d:04.0 and
Add has_mem64 for struct host_bridge, on root bus that does not support
mmio64 above 4g, will not set that.
We will use that info next two following patches:
1. Don't treat non-pref mmio64 as pref mmio, so will not put
it under bridge's pref range when rescan the devices
2. will keep pref
Add has_mem64 for struct host_bridge, on root bus that does not support
mmio64 above 4g, will not set that.
We will use that info next two following patches:
1. Don't treat non-pref mmio64 as pref mmio, so will not put
it under bridge's pref range when rescan the devices
2. will keep pref
After we added 64bit mmio parsing, we got some "no compatible bridge window"
warning on anther new model that support 64bit resource.
It turns out that we can not use mem_space.start as 64bit mem space
offset, aka there is mem_space.start != offset.
Use child_phys_addr to calculate exact offset
Add pci_find_bus_resource() to return bus resource for input resource.
In some case, we may only have bus instead of dev.
It is same as pci_find_parent_resource, but take bus as input.
Signed-off-by: Yinghai Lu
---
drivers/pci/pci.c | 27 ---
After we added 64bit mmio parsing, we got some "no compatible bridge window"
warning on anther new model that support 64bit resource.
It turns out that we can not use mem_space.start as 64bit mem space
offset, aka there is mem_space.start != offset.
Use child_phys_addr to calculate exact offset
Add pci_find_bus_resource() to return bus resource for input resource.
In some case, we may only have bus instead of dev.
It is same as pci_find_parent_resource, but take bus as input.
Signed-off-by: Yinghai Lu
---
drivers/pci/pci.c | 27 ---
include/linux/pci.h | 2
We can use new generic version skip_isa_ioresource_align() instead
of macro, and then kill the marco.
Signed-off-by: Yinghai Lu
---
drivers/pci/setup-bus.c | 17 +++--
1 file changed, 7 insertions(+), 10 deletions(-)
diff --git a/drivers/pci/setup-bus.c
From: Bjorn Helgaas
iomem_is_exclusive() requires a CPU physical address, but on some arches we
supplied a PCI bus address instead.
On most arches, pci_resource_to_user(res) returns "res->start", which is a
CPU physical address. But on microblaze, mips, powerpc, and sparc,
From: Bjorn Helgaas
iomem_is_exclusive() requires a CPU physical address, but on some arches we
supplied a PCI bus address instead.
On most arches, pci_resource_to_user(res) returns "res->start", which is a
CPU physical address. But on microblaze, mips, powerpc, and sparc, it
returns the PCI
We can use new generic version skip_isa_ioresource_align() instead
of macro, and then kill the marco.
Signed-off-by: Yinghai Lu
---
drivers/pci/setup-bus.c | 17 +++--
1 file changed, 7 insertions(+), 10 deletions(-)
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
We try to allocate required+optional before allocate required only and
expand with optional.
At first we update size and alignment for required+optional resource.
And after that we reorder them with new alignment, but current we only
do that STARTALIGN ones.
For SIZEALIGN type resource, after
On 04/05, Masahiro Yamada wrote:
> The clk_disable() in the common clock framework (drivers/clk/clk.c)
> returns immediately if a given clk is NULL or an error pointer. It
> allows clock consumers to call clk_disable() without IS_ERR_OR_NULL
> checking if drivers are only used with the common
We try to allocate required+optional before allocate required only and
expand with optional.
At first we update size and alignment for required+optional resource.
And after that we reorder them with new alignment, but current we only
do that STARTALIGN ones.
For SIZEALIGN type resource, after
On 04/05, Masahiro Yamada wrote:
> The clk_disable() in the common clock framework (drivers/clk/clk.c)
> returns immediately if a given clk is NULL or an error pointer. It
> allows clock consumers to call clk_disable() without IS_ERR_OR_NULL
> checking if drivers are only used with the common
From: Borislav Petkov
... so that it doesn't appear in objdump output.
Signed-off-by: Borislav Petkov
Signed-off-by: Andy Lutomirski
---
arch/x86/entry/entry_64.S | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git
This catches two distinct bugs in the current code. I'll fix them.
Signed-off-by: Andy Lutomirski
---
tools/testing/selftests/x86/Makefile | 1 +
tools/testing/selftests/x86/fsgsbase.c | 398 +
2 files changed, 399 insertions(+)
create mode
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