This implements suspend/resume using the atomic update supsend/resume
helpers instead of the current implementation which uses regcache. The
code has been tested on a Colibri VF61 using the freeze suspend mode.
This also avoids a lockdep warning by not using register caching at
all and therefor
The tps6524x driver uses spi_dev_get() to take a copy of the SPI device
it uses but has no obvious reason to do so and never calls spi_dev_put()
to release the reference. Fix this to just a straight copy.
Signed-off-by: Mark Brown
---
drivers/regulator/tps6524x-regulator.c
On Tue, Apr 19, 2016 at 05:38:02PM +, Reizer, Eyal wrote:
> Hi Mark,
>
> Hope you can see the attached picture that illustrates what need to sent for
> sucesfull SPI init.
I think what the picture shows is that you just need to send at least
one byte at the end of the transfer *after*
Store the number of registers per layer in soc_data. This is
more consistent with how the rest of SoC specific data are
handled.
Signed-off-by: Stefan Agner
---
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 8 ++--
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 2 ++
This implements suspend/resume using the atomic update supsend/resume
helpers instead of the current implementation which uses regcache. The
code has been tested on a Colibri VF61 using the freeze suspend mode.
This also avoids a lockdep warning by not using register caching at
all and therefor
The tps6524x driver uses spi_dev_get() to take a copy of the SPI device
it uses but has no obvious reason to do so and never calls spi_dev_put()
to release the reference. Fix this to just a straight copy.
Signed-off-by: Mark Brown
---
drivers/regulator/tps6524x-regulator.c | 2 +-
1 file
On Tue, Apr 19, 2016 at 05:38:02PM +, Reizer, Eyal wrote:
> Hi Mark,
>
> Hope you can see the attached picture that illustrates what need to sent for
> sucesfull SPI init.
I think what the picture shows is that you just need to send at least
one byte at the end of the transfer *after*
Store the number of registers per layer in soc_data. This is
more consistent with how the rest of SoC specific data are
handled.
Signed-off-by: Stefan Agner
---
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 8 ++--
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 2 ++
Disable vblank events when CRTC gets disabled. This avoids an
external abort when entering suspend while disable_timer is still
active: On resume the timer might fire immediately and cause a
register access in fsl_dcu_drm_disable_vblank before clocks get
enabled by the resume function.
Move the initialization code for layers into a separate function
in the plane file. This allows to reuse the function on resume.
Also move it at the very beginning which may not matter but makes
logically much more sense.
Signed-off-by: Stefan Agner
---
On 04/19/16 09:56, Paul E. McKenney wrote:
> On Tue, Apr 19, 2016 at 09:20:24AM -0700, Randy Dunlap wrote:
>> On 04/18/16 22:13, Stephen Rothwell wrote:
>>> Hi all,
>>>
>>> Changes since 20160418:
>>>
>>
>> on x86_64:
>>
>> kernel/built-in.o: In function `wake_torture_stats_print':
>>
On Sat, 2016-04-09 at 21:52 +0100, Al Viro wrote:
> Signed-off-by: Al Viro
> ---
> fs/cifs/cifsglob.h | 2 --
> fs/cifs/connect.c | 72
> --
> 2 files changed, 5 insertions(+), 69 deletions(-)
>
> diff --git
Disable vblank events when CRTC gets disabled. This avoids an
external abort when entering suspend while disable_timer is still
active: On resume the timer might fire immediately and cause a
register access in fsl_dcu_drm_disable_vblank before clocks get
enabled by the resume function.
Move the initialization code for layers into a separate function
in the plane file. This allows to reuse the function on resume.
Also move it at the very beginning which may not matter but makes
logically much more sense.
Signed-off-by: Stefan Agner
---
On 04/19/16 09:56, Paul E. McKenney wrote:
> On Tue, Apr 19, 2016 at 09:20:24AM -0700, Randy Dunlap wrote:
>> On 04/18/16 22:13, Stephen Rothwell wrote:
>>> Hi all,
>>>
>>> Changes since 20160418:
>>>
>>
>> on x86_64:
>>
>> kernel/built-in.o: In function `wake_torture_stats_print':
>>
On Sat, 2016-04-09 at 21:52 +0100, Al Viro wrote:
> Signed-off-by: Al Viro
> ---
> fs/cifs/cifsglob.h | 2 --
> fs/cifs/connect.c | 72
> --
> 2 files changed, 5 insertions(+), 69 deletions(-)
>
> diff --git a/fs/cifs/cifsglob.h
Use the drm_atomic_helper_suspend() and drm_atomic_helper_resume()
helpers to implement subsystem-level suspend/resume. This replaces
the (non-functional) regmap cache based suspend resume functionality.
Signed-off-by: Stefan Agner
---
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
Use the drm_atomic_helper_suspend() and drm_atomic_helper_resume()
helpers to implement subsystem-level suspend/resume. This replaces
the (non-functional) regmap cache based suspend resume functionality.
Signed-off-by: Stefan Agner
---
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 39
Implement a suspend/resume helper for CMA users which calls
drm_fb_helper_set_suspend.
Suggested-by: Thierry Reding
Signed-off-by: Stefan Agner
---
drivers/gpu/drm/drm_fb_cma_helper.c | 15 +++
include/drm/drm_fb_cma_helper.h | 1 +
2
Implement a suspend/resume helper for CMA users which calls
drm_fb_helper_set_suspend.
Suggested-by: Thierry Reding
Signed-off-by: Stefan Agner
---
drivers/gpu/drm/drm_fb_cma_helper.c | 15 +++
include/drm/drm_fb_cma_helper.h | 1 +
2 files changed, 16 insertions(+)
diff
Use clk_prepare_enable and clk_disable_unprepare helpers. This also
fixes a sequence issue in the enable path which lead to a warning
on resume.
Signed-off-by: Stefan Agner
---
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 11 ++-
1 file changed, 2 insertions(+), 9
Use clk_prepare_enable and clk_disable_unprepare helpers. This also
fixes a sequence issue in the enable path which lead to a warning
on resume.
Signed-off-by: Stefan Agner
---
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 11 ++-
1 file changed, 2 insertions(+), 9 deletions(-)
diff
On Sat, 2016-04-09 at 21:51 +0100, Al Viro wrote:
> ... and use ITER_BVEC for the page part of request to send
>
> Signed-off-by: Al Viro
> ---
> fs/cifs/cifsproto.h | 2 -
> fs/cifs/transport.c | 141 +++---
> --
> 2 files
On Sat, 2016-04-09 at 21:51 +0100, Al Viro wrote:
> ... and use ITER_BVEC for the page part of request to send
>
> Signed-off-by: Al Viro
> ---
> fs/cifs/cifsproto.h | 2 -
> fs/cifs/transport.c | 141 +++---
> --
> 2 files changed, 41
On Tue, Apr 19, 2016 at 12:26:44PM -0400, David Woodhouse wrote:
> On Tue, 2016-04-19 at 19:20 +0300, Michael S. Tsirkin wrote:
> >
> > > I thought that PLATFORM served that purpose. Woudn't the host
> > > advertise PLATFORM support and, if the guest doesn't ack it, the host
> > > device would
On Tue, Apr 19, 2016 at 12:26:44PM -0400, David Woodhouse wrote:
> On Tue, 2016-04-19 at 19:20 +0300, Michael S. Tsirkin wrote:
> >
> > > I thought that PLATFORM served that purpose. Woudn't the host
> > > advertise PLATFORM support and, if the guest doesn't ack it, the host
> > > device would
Hi Andrey,
When I enable KASAN for 4.5 and 4.6 (I didn't try with older versions),
I got FRAME_WARN warning for frame size exceeds 2048 bytes.
Then I found the kconfig looks like:
range 0 8192
default 0 if KASAN
default 1024 if !64BIT
default 2048 if 64BIT
In my understanding, FRAME_WARN
Hi Andrey,
When I enable KASAN for 4.5 and 4.6 (I didn't try with older versions),
I got FRAME_WARN warning for frame size exceeds 2048 bytes.
Then I found the kconfig looks like:
range 0 8192
default 0 if KASAN
default 1024 if !64BIT
default 2048 if 64BIT
In my understanding, FRAME_WARN
On 19/04/16 10:14, David Rivshin (Allworx) wrote:
>> Ah Ok. There are no user of cpsw_platform_data outside of net/ethernet/ti/,
>> so yes, looks like your patch 1 does exactly what's needed.
>
> Given that the v1 of Andrew's patch is already in Dave's net tree, and
> would obviously have many
On 19/04/16 10:14, David Rivshin (Allworx) wrote:
>> Ah Ok. There are no user of cpsw_platform_data outside of net/ethernet/ti/,
>> so yes, looks like your patch 1 does exactly what's needed.
>
> Given that the v1 of Andrew's patch is already in Dave's net tree, and
> would obviously have many
On Mon, Apr 18, 2016 at 11:24:11AM -0700, Christoph Hellwig wrote:
> On Mon, Apr 18, 2016 at 11:40:47AM -0600, Jason Gunthorpe wrote:
> > I wasn't arguing this should integrate into verbs in some way, only
> > that the way to access the driver-specific uAPI of a RDMA device should
> > be through
On Mon, Apr 18, 2016 at 11:24:11AM -0700, Christoph Hellwig wrote:
> On Mon, Apr 18, 2016 at 11:40:47AM -0600, Jason Gunthorpe wrote:
> > I wasn't arguing this should integrate into verbs in some way, only
> > that the way to access the driver-specific uAPI of a RDMA device should
> > be through
On Tue, Apr 19, 2016 at 06:31:14PM +0100, Lorenzo Pieralisi wrote:
> Hi Daniel,
>
> On Fri, Mar 25, 2016 at 12:26:27PM +0100, Daniel Lezcano wrote:
> > On 03/22/2016 03:42 PM, Jisheng Zhang wrote:
> > >These trivial patches are similar as Masahiro posted in[1]. The main
> > >purpose is let
On Tue, Apr 19, 2016 at 05:50:23PM +0300, Erez Shitrit wrote:
> On Fri, Apr 15, 2016 at 1:17 PM, Hans Westgaard Ry
> wrote:
> > IPoIB collects statistics of traffic including number of packets
> > sent/received, number of bytes transferred, and certain errors. This
>
On Tue, Apr 19, 2016 at 06:31:14PM +0100, Lorenzo Pieralisi wrote:
> Hi Daniel,
>
> On Fri, Mar 25, 2016 at 12:26:27PM +0100, Daniel Lezcano wrote:
> > On 03/22/2016 03:42 PM, Jisheng Zhang wrote:
> > >These trivial patches are similar as Masahiro posted in[1]. The main
> > >purpose is let
On Tue, Apr 19, 2016 at 05:50:23PM +0300, Erez Shitrit wrote:
> On Fri, Apr 15, 2016 at 1:17 PM, Hans Westgaard Ry
> wrote:
> > IPoIB collects statistics of traffic including number of packets
> > sent/received, number of bytes transferred, and certain errors. This
> > patch makes these
Do not advertise IOMMU_CAP_INTR_REMAP for arm-smmu(-v3). Indeed the
irq_remapping capability is abstracted on irqchip side for ARM as
opposed to Intel IOMMU featuring IRQ remapping HW.
So to check IRQ remapping capability, the msi domain needs to be
checked instead.
This commit needs to be
This series allows the user-space to register a reserved IOVA domain.
This completes the kernel integration of the whole functionality on top
of part 1 & 2.
We reuse the VFIO DMA MAP ioctl with a new flag to bridge to the
dma-reserved-iommu API. The number of IOVA pages to provision for MSI
Do not advertise IOMMU_CAP_INTR_REMAP for arm-smmu(-v3). Indeed the
irq_remapping capability is abstracted on irqchip side for ARM as
opposed to Intel IOMMU featuring IRQ remapping HW.
So to check IRQ remapping capability, the msi domain needs to be
checked instead.
This commit needs to be
This series allows the user-space to register a reserved IOVA domain.
This completes the kernel integration of the whole functionality on top
of part 1 & 2.
We reuse the VFIO DMA MAP ioctl with a new flag to bridge to the
dma-reserved-iommu API. The number of IOVA pages to provision for MSI
On x86 IRQ remapping is abstracted by the IOMMU. On ARM this is abstracted
by the msi controller. vfio_safe_irq_domain allows to check whether
interrupts are "safe" for a given device. They are if the device does
not use MSI or if the device uses MSI and the msi-parent controller
supports IRQ
On x86 IRQ remapping is abstracted by the IOMMU. On ARM this is abstracted
by the msi controller. vfio_safe_irq_domain allows to check whether
interrupts are "safe" for a given device. They are if the device does
not use MSI or if the device uses MSI and the msi-parent controller
supports IRQ
In our RB-tree we now have slots of different types (USER and RESERVED).
It becomes useful to be able to search for dma slots of a specific type or
any type. This patch proposes an implementation for that modality and also
changes the existing callers using the USER type.
Signed-off-by: Eric
Before allowing the end-user to create VFIO_IOVA_RESERVED dma slots,
let's implement the expected behavior for removal and replay. As opposed
to user dma slots, the physical pages bound to reserved IOVA do not need
to be pinned/unpinned. Also we currently handle a single reserved iova
domain. Any
In our RB-tree we now have slots of different types (USER and RESERVED).
It becomes useful to be able to search for dma slots of a specific type or
any type. This patch proposes an implementation for that modality and also
changes the existing callers using the USER type.
Signed-off-by: Eric
Before allowing the end-user to create VFIO_IOVA_RESERVED dma slots,
let's implement the expected behavior for removal and replay. As opposed
to user dma slots, the physical pages bound to reserved IOVA do not need
to be pinned/unpinned. Also we currently handle a single reserved iova
domain. Any
Hi Daniel,
On Fri, Mar 25, 2016 at 12:26:27PM +0100, Daniel Lezcano wrote:
> On 03/22/2016 03:42 PM, Jisheng Zhang wrote:
> >These trivial patches are similar as Masahiro posted in[1]. The main
> >purpose is let cpuidle_ops structure be constified and replace
> >"__initdata" with "__initconst".
>
Hi Daniel,
On Fri, Mar 25, 2016 at 12:26:27PM +0100, Daniel Lezcano wrote:
> On 03/22/2016 03:42 PM, Jisheng Zhang wrote:
> >These trivial patches are similar as Masahiro posted in[1]. The main
> >purpose is let cpuidle_ops structure be constified and replace
> >"__initdata" with "__initconst".
>
On Tue, Apr 19, 2016 at 07:21:20PM +0200, Mason wrote:
> On 19/04/2016 16:59, Daniel Lezcano wrote:
> > On Tue, Apr 19, 2016 at 04:05:19PM +0200, Mason wrote:
> >> On 19/04/2016 15:13, Daniel Lezcano wrote:
> >>
> >>> On Tue, Apr 19, 2016 at 02:15:15PM +0200, Mason wrote:
> >>>
> From: Marc
On Tue, Apr 19, 2016 at 07:21:20PM +0200, Mason wrote:
> On 19/04/2016 16:59, Daniel Lezcano wrote:
> > On Tue, Apr 19, 2016 at 04:05:19PM +0200, Mason wrote:
> >> On 19/04/2016 15:13, Daniel Lezcano wrote:
> >>
> >>> On Tue, Apr 19, 2016 at 02:15:15PM +0200, Mason wrote:
> >>>
> From: Marc
On Tue, 2016-04-19 at 19:20 +0300, Michael S. Tsirkin wrote:
>
> > I thought that PLATFORM served that purpose. Woudn't the host
> > advertise PLATFORM support and, if the guest doesn't ack it, the host
> > device would skip translation? Or is that problematic for vfio?
>
> Exactly that's
On Tue, 2016-04-19 at 19:20 +0300, Michael S. Tsirkin wrote:
>
> > I thought that PLATFORM served that purpose. Woudn't the host
> > advertise PLATFORM support and, if the guest doesn't ack it, the host
> > device would skip translation? Or is that problematic for vfio?
>
> Exactly that's
On Tue, Apr 19, 2016 at 05:21:01PM +, Reizer, Eyal wrote:
> The main quirk here is that i need to send extra clocks after the spi init
> command while the CS pin is "high" in order to put the wilink chip into SPI
> mode.
> So just sending an empty transfer wouldnt do the trick here.
A
On Tue, Apr 19, 2016 at 05:21:01PM +, Reizer, Eyal wrote:
> The main quirk here is that i need to send extra clocks after the spi init
> command while the CS pin is "high" in order to put the wilink chip into SPI
> mode.
> So just sending an empty transfer wouldnt do the trick here.
A
We introduce a vfio_dma type since we will need to discriminate
different types of dma slots:
- VFIO_IOVA_USER: IOVA region used to map user vaddr
- VFIO_IOVA_RESERVED: IOVA region reserved to map host device PA such
as MSI doorbells
Signed-off-by: Eric Auger
---
v6 ->
We introduce a vfio_dma type since we will need to discriminate
different types of dma slots:
- VFIO_IOVA_USER: IOVA region used to map user vaddr
- VFIO_IOVA_RESERVED: IOVA region reserved to map host device PA such
as MSI doorbells
Signed-off-by: Eric Auger
---
v6 -> v7:
- add
The user is allowed to [un]register a reserved IOVA range by using the
DMA MAP API and setting the new flag: VFIO_DMA_MAP_FLAG_MSI_RESERVED_IOVA.
It provides the base address and the size. This region is stored in the
vfio_dma rb tree. At that point the iova range is not mapped to any target
The user is allowed to [un]register a reserved IOVA range by using the
DMA MAP API and setting the new flag: VFIO_DMA_MAP_FLAG_MSI_RESERVED_IOVA.
It provides the base address and the size. This region is stored in the
vfio_dma rb tree. At that point the iova range is not mapped to any target
This patch allows the user-space to know whether MSI addresses need to
be mapped in the IOMMU. The user-space uses VFIO_IOMMU_GET_INFO ioctl and
IOMMU_INFO_REQUIRE_MSI_MAP gets set if they need to.
The computation of the number of IOVA pages to be provided by the user
space will be implemented in
This patch allows the user-space to know whether MSI addresses need to
be mapped in the IOMMU. The user-space uses VFIO_IOMMU_GET_INFO ioctl and
IOMMU_INFO_REQUIRE_MSI_MAP gets set if they need to.
The computation of the number of IOVA pages to be provided by the user
space will be implemented in
Hi David,
> Am 19.04.2016 um 03:25 schrieb David Rivshin (Allworx)
> :
>
> Hi Nikolaus,
>
> I recently submitted a driver for the IS31FL32xx family of devices, so
> this driver caught my eye. I have a few comments below.
>
> On Mon, 18 Apr 2016 20:43:16 +0200
>
Hi Jacek,
> Am 19.04.2016 um 11:14 schrieb Jacek Anaszewski :
>
> Hi Nikolaus,
>
> Thanks for the patch. Please refer to my remarks in the code.
Thanks for the remarks!
>
> On 04/18/2016 08:43 PM, H. Nikolaus Schaller wrote:
>> This is a driver for the Integrated
Hi David,
> Am 19.04.2016 um 03:25 schrieb David Rivshin (Allworx)
> :
>
> Hi Nikolaus,
>
> I recently submitted a driver for the IS31FL32xx family of devices, so
> this driver caught my eye. I have a few comments below.
>
> On Mon, 18 Apr 2016 20:43:16 +0200
> "H. Nikolaus Schaller" wrote:
Hi Jacek,
> Am 19.04.2016 um 11:14 schrieb Jacek Anaszewski :
>
> Hi Nikolaus,
>
> Thanks for the patch. Please refer to my remarks in the code.
Thanks for the remarks!
>
> On 04/18/2016 08:43 PM, H. Nikolaus Schaller wrote:
>> This is a driver for the Integrated Silicon Solution Inc. LED
On Tue, Apr 19, 2016 at 06:36:22AM -0400, Stefan Berger wrote:
> On 04/19/2016 06:12 AM, Jarkko Sakkinen wrote:
> >On Mon, Apr 18, 2016 at 01:26:13PM -0400, Stefan Berger wrote:
> >>From: Jason Gunthorpe
> >>
> >>The final thing preventing this was the way the
On 19/04/2016 16:59, Daniel Lezcano wrote:
> On Tue, Apr 19, 2016 at 04:05:19PM +0200, Mason wrote:
>> On 19/04/2016 15:13, Daniel Lezcano wrote:
>>
>>> On Tue, Apr 19, 2016 at 02:15:15PM +0200, Mason wrote:
>>>
From: Marc Gonzalez
Commit
On Tue, Apr 19, 2016 at 06:36:22AM -0400, Stefan Berger wrote:
> On 04/19/2016 06:12 AM, Jarkko Sakkinen wrote:
> >On Mon, Apr 18, 2016 at 01:26:13PM -0400, Stefan Berger wrote:
> >>From: Jason Gunthorpe
> >>
> >>The final thing preventing this was the way the sysfs files were
> >>attached to the
On 19/04/2016 16:59, Daniel Lezcano wrote:
> On Tue, Apr 19, 2016 at 04:05:19PM +0200, Mason wrote:
>> On 19/04/2016 15:13, Daniel Lezcano wrote:
>>
>>> On Tue, Apr 19, 2016 at 02:15:15PM +0200, Mason wrote:
>>>
From: Marc Gonzalez
Commit 0881841f7e78 changed "if (ret != 0)" to "if
On Tue, 19 Apr 2016 16:55:28 + (UTC)
Mathieu Desnoyers wrote:
> - On Apr 19, 2016, at 10:34 AM, rostedt rost...@goodmis.org wrote:
>
> > From: Steven Rostedt
> >
> > In order to add the ability to let tasks that are filtered by the
On Tue, 19 Apr 2016 16:55:28 + (UTC)
Mathieu Desnoyers wrote:
> - On Apr 19, 2016, at 10:34 AM, rostedt rost...@goodmis.org wrote:
>
> > From: Steven Rostedt
> >
> > In order to add the ability to let tasks that are filtered by the events
> > have their children also be traced on fork
This series implements the MSI address mapping/unmapping in the MSI layer.
IOMMU binding happens on pci_enable_msi since this function can sleep and
return errors. On msi_domain_set_affinity, msi_domain_(de)activate, which
are not allowed to sleep, we simply look for the already existing binding.
This series implements the MSI address mapping/unmapping in the MSI layer.
IOMMU binding happens on pci_enable_msi since this function can sleep and
return errors. On msi_domain_set_affinity, msi_domain_(de)activate, which
are not allowed to sleep, we simply look for the already existing binding.
The ITS is the first ARM MSI controller advertising the new
MSI_FLAG_IRQ_REMAPPING flag. It does so because it supports
interrupt translation service. This HW support offers isolation
of MSIs, feature used when using KVM device passthrough.
Signed-off-by: Eric Auger
---
We plan to use msi_get_domain_info in VFIO module so let's export it.
Signed-off-by: Eric Auger
---
v2 -> v3:
- remove static implementation in case CONFIG_PCI_MSI_IRQ_DOMAIN is not set
---
kernel/irq/msi.c | 1 +
1 file changed, 1 insertion(+)
diff --git
The ITS is the first ARM MSI controller advertising the new
MSI_FLAG_IRQ_REMAPPING flag. It does so because it supports
interrupt translation service. This HW support offers isolation
of MSIs, feature used when using KVM device passthrough.
Signed-off-by: Eric Auger
---
v5: new
---
We plan to use msi_get_domain_info in VFIO module so let's export it.
Signed-off-by: Eric Auger
---
v2 -> v3:
- remove static implementation in case CONFIG_PCI_MSI_IRQ_DOMAIN is not set
---
kernel/irq/msi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/kernel/irq/msi.c
Let's introduce a new msi_domain_info flag value, MSI_FLAG_IRQ_REMAPPING
meant to tell the domain supports IRQ REMAPPING, also known as Interrupt
Translation Service. On Intel HW this IRQ remapping capability is
abstracted on IOMMU side while on ARM it is abstracted on MSI controller
side. This
On Tue, Apr 19, 2016 at 04:20:38PM +0100, Sudeep Holla wrote:
>
>
> On 19/04/16 16:05, Lorenzo Pieralisi wrote:
> >Hi Jisheng,
> >
> >On Tue, Mar 22, 2016 at 10:35:29PM +0800, Jisheng Zhang wrote:
> >>psci_dt_cpu_init_idle() and psci_cpu_init_idle() are not needed after
> >>booting, so mark them
On Tue, Apr 19, 2016 at 04:20:38PM +0100, Sudeep Holla wrote:
>
>
> On 19/04/16 16:05, Lorenzo Pieralisi wrote:
> >Hi Jisheng,
> >
> >On Tue, Mar 22, 2016 at 10:35:29PM +0800, Jisheng Zhang wrote:
> >>psci_dt_cpu_init_idle() and psci_cpu_init_idle() are not needed after
> >>booting, so mark them
Let's introduce a new msi_domain_info flag value, MSI_FLAG_IRQ_REMAPPING
meant to tell the domain supports IRQ REMAPPING, also known as Interrupt
Translation Service. On Intel HW this IRQ remapping capability is
abstracted on IOMMU side while on ARM it is abstracted on MSI controller
side. This
This patch implements the msi_doorbell_info callback in the
gicv2m driver.
The driver now is able to return its doorbell characteristics
(base, size, prot). A single doorbell is exposed.
This will allow the msi layer to iommu_map this doorbell when
requested.
Signed-off-by: Eric Auger
On MSI message composition we now use the MSI doorbell's IOVA in
place of the doorbell's PA in case the device is upstream to an
IOMMU that requires MSI addresses to be mapped. The doorbell's
allocation and mapping happened on an early stage (pci_enable_msi).
Signed-off-by: Eric Auger
Currently the MSI message is composed by directly calling
irq_chip_compose_msi_msg and erased by setting the memory to zero.
On some platforms, we will need to complexify this composition to
properly handle MSI emission through IOMMU. Also we will need to track
when the MSI message is erased.
We
The purpose is to be able to retrieve the MSI doorbells of an irqchip.
This is now needed since on some platforms those doorbells must be
iommu mapped (in case the MSIs transit through an IOMMU that do not
bypass those transactions).
The assumption is there is a maximum of one doorbell region per
Add code to recognize SPARC-Sonoma cpu correctly and update cpu hardware
caps and cpu distribution map. SPARC-Sonoma is based upon SPARC-M7 core
along with additional PCI functions added on and is reported by firmware
as "SPARC-SN".
Signed-off-by: Khalid Aziz
---
This patch implements the msi_doorbell_info callback in the
gicv2m driver.
The driver now is able to return its doorbell characteristics
(base, size, prot). A single doorbell is exposed.
This will allow the msi layer to iommu_map this doorbell when
requested.
Signed-off-by: Eric Auger
---
On MSI message composition we now use the MSI doorbell's IOVA in
place of the doorbell's PA in case the device is upstream to an
IOMMU that requires MSI addresses to be mapped. The doorbell's
allocation and mapping happened on an early stage (pci_enable_msi).
Signed-off-by: Eric Auger
---
v6 ->
Currently the MSI message is composed by directly calling
irq_chip_compose_msi_msg and erased by setting the memory to zero.
On some platforms, we will need to complexify this composition to
properly handle MSI emission through IOMMU. Also we will need to track
when the MSI message is erased.
We
The purpose is to be able to retrieve the MSI doorbells of an irqchip.
This is now needed since on some platforms those doorbells must be
iommu mapped (in case the MSIs transit through an IOMMU that do not
bypass those transactions).
The assumption is there is a maximum of one doorbell region per
Add code to recognize SPARC-Sonoma cpu correctly and update cpu hardware
caps and cpu distribution map. SPARC-Sonoma is based upon SPARC-M7 core
along with additional PCI functions added on and is reported by firmware
as "SPARC-SN".
Signed-off-by: Khalid Aziz
---
On Tue, 19 Apr 2016 18:44:41 +0300
Grygorii Strashko wrote:
> On 04/19/2016 06:01 PM, David Rivshin (Allworx) wrote:
> > On Tue, 19 Apr 2016 17:41:07 +0300
> > Grygorii Strashko wrote:
> >
> >> Hi,
> >>
> >> On 04/19/2016 04:56 PM, Andrew
On Tue, 19 Apr 2016 16:55:11 + (UTC)
Mathieu Desnoyers wrote:
> - On Apr 19, 2016, at 10:34 AM, rostedt rost...@goodmis.org wrote:
>
> > From: Steven Rostedt
> >
> > Add the infrastructure needed to have the PIDs in set_event_pid to
On Tue, 19 Apr 2016 18:44:41 +0300
Grygorii Strashko wrote:
> On 04/19/2016 06:01 PM, David Rivshin (Allworx) wrote:
> > On Tue, 19 Apr 2016 17:41:07 +0300
> > Grygorii Strashko wrote:
> >
> >> Hi,
> >>
> >> On 04/19/2016 04:56 PM, Andrew Goodbody wrote:
> >>> Adding a 2nd PHY to cpsw
On Tue, 19 Apr 2016 16:55:11 + (UTC)
Mathieu Desnoyers wrote:
> - On Apr 19, 2016, at 10:34 AM, rostedt rost...@goodmis.org wrote:
>
> > From: Steven Rostedt
> >
> > Add the infrastructure needed to have the PIDs in set_event_pid to
> > automatically add PIDs of the children of the
This patch handles the iommu mapping of MSI doorbells that require to
be mapped in an iommu domain. This happens on msi_domain_alloc/free_irqs
since this is called in code that can sleep (pci_enable/disable_msi):
iommu_map/unmap is not stated as atomic. On msi_domain_(de)activate and
This patch handles the iommu mapping of MSI doorbells that require to
be mapped in an iommu domain. This happens on msi_domain_alloc/free_irqs
since this is called in code that can sleep (pci_enable/disable_msi):
iommu_map/unmap is not stated as atomic. On msi_domain_(de)activate and
On Tue, Apr 19, 2016 at 09:05:45AM +, Reizer, Eyal wrote:
> Understood. As this special CS manipulation is unique to wspi (wilink spi) I
> think the
> best option is to move this gpio allocation into wlcore_spi as a new device
> tree entry
> used only by this driver.
That sounds like it
On Tue, Apr 19, 2016 at 09:05:45AM +, Reizer, Eyal wrote:
> Understood. As this special CS manipulation is unique to wspi (wilink spi) I
> think the
> best option is to move this gpio allocation into wlcore_spi as a new device
> tree entry
> used only by this driver.
That sounds like it
On Tue, Apr 19, 2016 at 12:54:18PM +0300, Jarkko Sakkinen wrote:
> Cc: sta...@vger.kernel.org
> Fixes: 1bd047be37d9 ("tpm_crb: Use devm_ioremap_resource")
> Signed-off-by: Jarkko Sakkinen
> drivers/char/tpm/tpm_crb.c | 39 ---
>
On Tue, Apr 19, 2016 at 12:54:18PM +0300, Jarkko Sakkinen wrote:
> Cc: sta...@vger.kernel.org
> Fixes: 1bd047be37d9 ("tpm_crb: Use devm_ioremap_resource")
> Signed-off-by: Jarkko Sakkinen
> drivers/char/tpm/tpm_crb.c | 39 ---
> 1 file changed, 28
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