On Mon, Apr 18, 2016 at 05:55:51AM +, Reizer, Eyal wrote:
> > I would suggest fixing this using a new API function from the SPI core, if
> > we
> > don't already have a generic way to do it.
> Originally this is what I have done until I was pointed to the generic
> cs-gpio mechanism
> in
On Mon, Apr 18, 2016 at 05:55:51AM +, Reizer, Eyal wrote:
> > I would suggest fixing this using a new API function from the SPI core, if
> > we
> > don't already have a generic way to do it.
> Originally this is what I have done until I was pointed to the generic
> cs-gpio mechanism
> in
Andrea, we provide the, ahem, adjustments to
transparent_hugepage_adjust. Rest assured we aggressively use mmu
notifiers with no further changes required.
As in: zero changes have been required in the lifetime (years) of
kvm+huge tmpfs at Google, other than mod'ing
transparent_hugepage_adjust.
Andrea, we provide the, ahem, adjustments to
transparent_hugepage_adjust. Rest assured we aggressively use mmu
notifiers with no further changes required.
As in: zero changes have been required in the lifetime (years) of
kvm+huge tmpfs at Google, other than mod'ing
transparent_hugepage_adjust.
On Tue, Apr 19, 2016 at 09:43:08AM +0200, H. Nikolaus Schaller wrote:
>
> > Am 18.04.2016 um 23:22 schrieb Dmitry Torokhov :
> >
> > On Mon, Apr 18, 2016 at 09:55:37PM +0200, H. Nikolaus Schaller wrote:
> >> commit e7ec014a47e4 ("Input: twl6040-vibra - update for
On Tue, Apr 19, 2016 at 09:43:08AM +0200, H. Nikolaus Schaller wrote:
>
> > Am 18.04.2016 um 23:22 schrieb Dmitry Torokhov :
> >
> > On Mon, Apr 18, 2016 at 09:55:37PM +0200, H. Nikolaus Schaller wrote:
> >> commit e7ec014a47e4 ("Input: twl6040-vibra - update for device tree
> >> support")
> >>
On Tue, Apr 19, 2016 at 06:36:22AM -0400, Stefan Berger wrote:
> On 04/19/2016 06:12 AM, Jarkko Sakkinen wrote:
> >On Mon, Apr 18, 2016 at 01:26:13PM -0400, Stefan Berger wrote:
> >>From: Jason Gunthorpe
> >>
> >>The final thing preventing this was the way the
On Tue, Apr 19, 2016 at 06:36:22AM -0400, Stefan Berger wrote:
> On 04/19/2016 06:12 AM, Jarkko Sakkinen wrote:
> >On Mon, Apr 18, 2016 at 01:26:13PM -0400, Stefan Berger wrote:
> >>From: Jason Gunthorpe
> >>
> >>The final thing preventing this was the way the sysfs files were
> >>attached to the
Introduce alloc/free_reserved_iova_domain in the IOMMU API.
alloc_reserved_iova_domain initializes an iova domain at a given
iova base address and with a given size. This iova domain will
be used to allocate iova within that window. Those IOVAs will be reserved
for special purpose, typically MSI
Introduce alloc/free_reserved_iova_domain in the IOMMU API.
alloc_reserved_iova_domain initializes an iova domain at a given
iova base address and with a given size. This iova domain will
be used to allocate iova within that window. Those IOVAs will be reserved
for special purpose, typically MSI
Majority of the callers of of_find_node_by_name() do not expect that it
will drop reference to the 'from' node if it was passed in, causing
potential refcount underflows, etc, so let's stop doing this.
Most of the callers that were handling dropping of reference done by
of_find_node_by_name()
Majority of the callers of of_find_node_by_name() do not expect that it
will drop reference to the 'from' node if it was passed in, causing
potential refcount underflows, etc, so let's stop doing this.
Most of the callers that were handling dropping of reference done by
of_find_node_by_name()
- On Apr 19, 2016, at 10:34 AM, rostedt rost...@goodmis.org wrote:
> From: Steven Rostedt
>
> Add the infrastructure needed to have the PIDs in set_event_pid to
> automatically add PIDs of the children of the tasks that have their PIDs in
> set_event_pid. This will
- On Apr 19, 2016, at 10:34 AM, rostedt rost...@goodmis.org wrote:
> From: Steven Rostedt
>
> Add the infrastructure needed to have the PIDs in set_event_pid to
> automatically add PIDs of the children of the tasks that have their PIDs in
> set_event_pid. This will also remove PIDs from
On April 19, 2016 4:35:01 AM PDT, Borislav Petkov wrote:
>On Tue, Apr 19, 2016 at 01:15:30PM +0200, Ingo Molnar wrote:
>> So I'd suggest the following renames to harmonize these concepts:
>>
>> - CONFIG_IA32_EMULATION => CONFIG_X86_32_ABI
>>this lines up nicely with:
On April 19, 2016 4:35:01 AM PDT, Borislav Petkov wrote:
>On Tue, Apr 19, 2016 at 01:15:30PM +0200, Ingo Molnar wrote:
>> So I'd suggest the following renames to harmonize these concepts:
>>
>> - CONFIG_IA32_EMULATION => CONFIG_X86_32_ABI
>>this lines up nicely with: CONFIG_X86_X32_ABI
>
This series introduces the dma-reserved-iommu api used to:
- create/destroy an iova domain dedicated to reserved iova bindings
- map/unmap physical addresses onto reserved IOVAs.
- search for an existing reserved iova mapping matching a PA window
- determine whether an msi needs to be iommu
This series introduces the dma-reserved-iommu api used to:
- create/destroy an iova domain dedicated to reserved iova bindings
- map/unmap physical addresses onto reserved IOVAs.
- search for an existing reserved iova mapping matching a PA window
- determine whether an msi needs to be iommu
This patch introduces some new fields in the iommu_domain struct,
dedicated to reserved iova management.
In a similar way as DMA mapping IOVA window, we need to store
information related to a reserved IOVA window.
The reserved_iova_cookie will store the reserved iova_domain
handle. An RB tree
Introduce iommu_msi_mapping_translate_msg whose role consists in
detecting whether the device's MSIs must to be mapped into an IOMMU.
It case it must, the function overrides the MSI msg originally composed
and replaces the doorbell's PA by a pre-allocated and pre-mapped reserved
IOVA. In case the
This patch introduces some new fields in the iommu_domain struct,
dedicated to reserved iova management.
In a similar way as DMA mapping IOVA window, we need to store
information related to a reserved IOVA window.
The reserved_iova_cookie will store the reserved iova_domain
handle. An RB tree
Introduce iommu_msi_mapping_translate_msg whose role consists in
detecting whether the device's MSIs must to be mapped into an IOMMU.
It case it must, the function overrides the MSI msg originally composed
and replaces the doorbell's PA by a pre-allocated and pre-mapped reserved
IOVA. In case the
we will need to track which host physical addresses are mapped to
reserved IOVA. In that prospect we introduce a new RB tree indexed
by physical address. This RB tree only is used for reserved IOVA
bindings.
It is expected this RB tree will contain very few bindings. Those
generally correspond to
we will need to track which host physical addresses are mapped to
reserved IOVA. In that prospect we introduce a new RB tree indexed
by physical address. This RB tree only is used for reserved IOVA
bindings.
It is expected this RB tree will contain very few bindings. Those
generally correspond to
When the domain gets destroyed, let's make sure all reserved iova
resources get released.
Choice is made to put that call in arm-smmu(-v3).c to do something similar
to what was done for iommu_put_dma_cookie.
Signed-off-by: Eric Auger
---
v7: new
---
When the domain gets destroyed, let's make sure all reserved iova
resources get released.
Choice is made to put that call in arm-smmu(-v3).c to do something similar
to what was done for iommu_put_dma_cookie.
Signed-off-by: Eric Auger
---
v7: new
---
drivers/iommu/arm-smmu-v3.c | 2 ++
Introduce a new DOMAIN_ATTR_MSI_MAPPING domain attribute. If supported,
this means the MSI addresses need to be mapped in the IOMMU.
x86 IOMMUs typically don't expose the attribute since on x86, MSI write
transaction addresses always are within the 1MB PA region [FEE0_h -
FEF0_000h] window
This patch introduces iommu_get/put_reserved_iova.
iommu_get_reserved_iova allows to iommu map a contiguous physical region
onto a reserved contiguous IOVA region. The physical region base address
does not need to be iommu page size aligned. iova pages are allocated and
mapped so that they cover
Introduce a new DOMAIN_ATTR_MSI_MAPPING domain attribute. If supported,
this means the MSI addresses need to be mapped in the IOMMU.
x86 IOMMUs typically don't expose the attribute since on x86, MSI write
transaction addresses always are within the 1MB PA region [FEE0_h -
FEF0_000h] window
This patch introduces iommu_get/put_reserved_iova.
iommu_get_reserved_iova allows to iommu map a contiguous physical region
onto a reserved contiguous IOVA region. The physical region base address
does not need to be iommu page size aligned. iova pages are allocated and
mapped so that they cover
Now reserved bindings can exist, destroy them when destroying
the reserved iova domain. iommu_map is not supposed to be atomic,
hence the extra complexity in the locking.
Signed-off-by: Eric Auger
---
v6 -> v7:
- remove [PATCH v6 7/7] dma-reserved-iommu:
This function checks whether
- the device emitting the MSI belongs to a non default iommu domain
- the iommu domain requires the MSI address to be mapped.
If those conditions are met, the function returns the iommu domain
to be used for mapping the MSI doorbell; else it returns NULL.
Now reserved bindings can exist, destroy them when destroying
the reserved iova domain. iommu_map is not supposed to be atomic,
hence the extra complexity in the locking.
Signed-off-by: Eric Auger
---
v6 -> v7:
- remove [PATCH v6 7/7] dma-reserved-iommu: iommu_unmap_reserved and
destroy the
This function checks whether
- the device emitting the MSI belongs to a non default iommu domain
- the iommu domain requires the MSI address to be mapped.
If those conditions are met, the function returns the iommu domain
to be used for mapping the MSI doorbell; else it returns NULL.
On ARM, MSI write transactions from device upstream to the smmu
are conveyed through the iommu. Therefore target physical addresses
must be mapped and DOMAIN_ATTR_MSI_MAPPING is set to advertise
this requirement on arm-smmu and arm-smmu-v3.
Signed-off-by: Eric Auger
On ARM, MSI write transactions from device upstream to the smmu
are conveyed through the iommu. Therefore target physical addresses
must be mapped and DOMAIN_ATTR_MSI_MAPPING is set to advertise
this requirement on arm-smmu and arm-smmu-v3.
Signed-off-by: Eric Auger
Signed-off-by: Bharat Bhushan
On 19/04/16 17:45, Mathieu Poirier wrote:
On 19 April 2016 at 10:16, Suzuki K Poulose wrote:
On 12/04/16 18:54, Mathieu Poirier wrote:
This patch implement the AUX area interfaces required to
use the TMC (configured as an ETF) from the Perf sub-system.
The heuristic
On 19/04/16 17:45, Mathieu Poirier wrote:
On 19 April 2016 at 10:16, Suzuki K Poulose wrote:
On 12/04/16 18:54, Mathieu Poirier wrote:
This patch implement the AUX area interfaces required to
use the TMC (configured as an ETF) from the Perf sub-system.
The heuristic is heavily borrowed from
- On Apr 19, 2016, at 10:34 AM, rostedt rost...@goodmis.org wrote:
> From: Steven Rostedt
>
> In order to add the ability to let tasks that are filtered by the events
> have their children also be traced on fork (and then not traced on exit),
> convert the array into
On Tue, Apr 19, 2016 at 09:20:24AM -0700, Randy Dunlap wrote:
> On 04/18/16 22:13, Stephen Rothwell wrote:
> > Hi all,
> >
> > Changes since 20160418:
> >
>
> on x86_64:
>
> kernel/built-in.o: In function `wake_torture_stats_print':
> waketorture.c:(.text+0x2f06d): undefined reference to
- On Apr 19, 2016, at 10:34 AM, rostedt rost...@goodmis.org wrote:
> From: Steven Rostedt
>
> In order to add the ability to let tasks that are filtered by the events
> have their children also be traced on fork (and then not traced on exit),
> convert the array into a pid bitmask. Most
On Tue, Apr 19, 2016 at 09:20:24AM -0700, Randy Dunlap wrote:
> On 04/18/16 22:13, Stephen Rothwell wrote:
> > Hi all,
> >
> > Changes since 20160418:
> >
>
> on x86_64:
>
> kernel/built-in.o: In function `wake_torture_stats_print':
> waketorture.c:(.text+0x2f06d): undefined reference to
On Tue, Apr 19, 2016 at 10:05:08AM +0200, H. Nikolaus Schaller wrote:
>
> > Am 19.04.2016 um 09:57 schrieb Dmitry Torokhov :
> >
> > On Tue, Apr 19, 2016 at 09:33:10AM +0200, H. Nikolaus Schaller wrote:
> >>
> >>> Am 18.04.2016 um 23:12 schrieb Dmitry Torokhov
> >>>
On Tue, Apr 19, 2016 at 10:05:08AM +0200, H. Nikolaus Schaller wrote:
>
> > Am 19.04.2016 um 09:57 schrieb Dmitry Torokhov :
> >
> > On Tue, Apr 19, 2016 at 09:33:10AM +0200, H. Nikolaus Schaller wrote:
> >>
> >>> Am 18.04.2016 um 23:12 schrieb Dmitry Torokhov
> >>> :
> >>>
> >>> On Mon, Apr
Hello,
On Mon, Apr 18, 2016 at 03:55:44PM -0700, Shi, Yang wrote:
> Hi Kirill,
>
> Finally, I got some time to look into and try yours and Hugh's patches,
> got two problems.
One thing that come to mind to test is this: qemu with -machine
accel=kvm -mem-path=/dev/shm/,share=on .
The THP
Hello,
On Mon, Apr 18, 2016 at 03:55:44PM -0700, Shi, Yang wrote:
> Hi Kirill,
>
> Finally, I got some time to look into and try yours and Hugh's patches,
> got two problems.
One thing that come to mind to test is this: qemu with -machine
accel=kvm -mem-path=/dev/shm/,share=on .
The THP
For allwinner A31 ahb1 and a83t ahb1 clocks have predivider for certain parent.
Currently, it's being handled in clock specific functions.
A83t ahb1 and a31 ahb1 are similar clocks except a83t parent index 0b10 and 0b11
are pll6/prediv and a31 ahb1 parent index 0x11 is pll6/prediv.
with only
For allwinner A31 ahb1 and a83t ahb1 clocks have predivider for certain parent.
Currently, it's being handled in clock specific functions.
A83t ahb1 and a31 ahb1 are similar clocks except a83t parent index 0b10 and 0b11
are pll6/prediv and a31 ahb1 parent index 0x11 is pll6/prediv.
with only
For A31 ahb1 and a83t ahb1 clocks have predivider for certain parent.
To handle this, this patch adds predivider table with parent index,
prediv shift and width, parents with predivider will have nonzero width.
Rate adjustment is moved from clock specific recalc function to generic
factors
For A31 ahb1 and a83t ahb1 clocks have predivider for certain parent.
To handle this, this patch adds predivider table with parent index,
prediv shift and width, parents with predivider will have nonzero width.
Rate adjustment is moved from clock specific recalc function to generic
factors
The patch
ASoC: da7219: Disallow unsupported 32KHz clock setting in set_dai_sysclk()
has been applied to the asoc tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in
The patch
ASoC: da7219: Disallow unsupported 32KHz clock setting in set_dai_sysclk()
has been applied to the asoc tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in
On Tue, Apr 19, 2016 at 07:36:41PM +0800, PC Liao wrote:
> [1] is applied and needs this patch.
> Otherwise, [1] will build fail.
I dropped your patch and replied with a suggestion for respinning it.
When referencing patches please use the title and (if relevant) commit
ID inline, it makes
On Tue, Apr 19, 2016 at 07:36:41PM +0800, PC Liao wrote:
> [1] is applied and needs this patch.
> Otherwise, [1] will build fail.
I dropped your patch and replied with a suggestion for respinning it.
When referencing patches please use the title and (if relevant) commit
ID inline, it makes
On 19 April 2016 at 10:16, Suzuki K Poulose wrote:
> On 12/04/16 18:54, Mathieu Poirier wrote:
>>
>> This patch implement the AUX area interfaces required to
>> use the TMC (configured as an ETF) from the Perf sub-system.
>>
>> The heuristic is heavily borrowed from the
On 19 April 2016 at 10:16, Suzuki K Poulose wrote:
> On 12/04/16 18:54, Mathieu Poirier wrote:
>>
>> This patch implement the AUX area interfaces required to
>> use the TMC (configured as an ETF) from the Perf sub-system.
>>
>> The heuristic is heavily borrowed from the ETB10 implementation.
>>
On Tue, Apr 19, 2016 at 12:15 AM, Joonsoo Kim wrote:
> On Mon, Apr 18, 2016 at 10:14:39AM -0700, Thomas Garnier wrote:
>> Provides an optional config (CONFIG_FREELIST_RANDOM) to randomize the
>> SLAB freelist. The list is randomized during initialization of a new set
>> of
On Tue, Apr 19, 2016 at 12:15 AM, Joonsoo Kim wrote:
> On Mon, Apr 18, 2016 at 10:14:39AM -0700, Thomas Garnier wrote:
>> Provides an optional config (CONFIG_FREELIST_RANDOM) to randomize the
>> SLAB freelist. The list is randomized during initialization of a new set
>> of pages. The order on
org>
Cc: Sascha Hauer <s.ha...@pengutronix.de>
Cc: Hanyi Wu <hanyi...@mediatek.com>
---
drivers/thermal/Kconfig |1 +
1 file changed, 1 insertion(+)
--- linux-next-20160419.orig/drivers/thermal/Kconfig
+++ linux-next-20160419/drivers/thermal/Kconfig
@@ -366,6 +366,7 @@ config MTK_THERMAL
to `nvmem_cell_read'
mtk_thermal.c:(.text+0xffac9): undefined reference to `nvmem_cell_put'
Signed-off-by: Randy Dunlap
Cc: Zhang Rui
Cc: Eduardo Valentin
Cc:
Cc: Sascha Hauer
Cc: Hanyi Wu
---
drivers/thermal/Kconfig |1 +
1 file changed, 1 insertion(+)
--- linux-next-20160419.orig/drivers/thermal
The patch
ASoC: da7219: Update PLL ranges and dividers to improve locking
has been applied to the asoc tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24
The patch
ASoC: da7219: Update PLL ranges and dividers to improve locking
has been applied to the asoc tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24
,Arnd Bergmann ,Tommi Rantala
,linux-...@vger.kernel.org,linux-...@vger.kernel.org,linux-...@vger.kernel.org,linux-me...@vger.kernel.org,devicet...@vger.kernel.org
Message-ID:
On
,Arnd Bergmann ,Tommi Rantala
,linux-...@vger.kernel.org,linux-...@vger.kernel.org,linux-...@vger.kernel.org,linux-me...@vger.kernel.org,devicet...@vger.kernel.org
Message-ID:
On April 19, 2016 5:58:11 PM CEST, Crestez Dan Leonard
wrote:
> On 04/03/2016 11:52 AM, Peter Rosin wrote:
> > From:
On 04/19/2016 10:19 AM, Laxman Dewangan wrote:
On Tuesday 19 April 2016 09:41 PM, Stephen Warren wrote:
On 04/19/2016 03:43 AM, Laxman Dewangan wrote:
NVIDIA's Tegra210 support the HW debounce in the GPIO
controller for all its GPIO pins.
Add support for setting debounce timing by
On 04/19/2016 10:19 AM, Laxman Dewangan wrote:
On Tuesday 19 April 2016 09:41 PM, Stephen Warren wrote:
On 04/19/2016 03:43 AM, Laxman Dewangan wrote:
NVIDIA's Tegra210 support the HW debounce in the GPIO
controller for all its GPIO pins.
Add support for setting debounce timing by
On Tuesday 19 April 2016 09:41 PM, Stephen Warren wrote:
On 04/19/2016 03:43 AM, Laxman Dewangan wrote:
NVIDIA's Tegra210 support the HW debounce in the GPIO
controller for all its GPIO pins.
Add support for setting debounce timing by implementing the
set_debounce callback of gpiochip.
On Tuesday 19 April 2016 09:41 PM, Stephen Warren wrote:
On 04/19/2016 03:43 AM, Laxman Dewangan wrote:
NVIDIA's Tegra210 support the HW debounce in the GPIO
controller for all its GPIO pins.
Add support for setting debounce timing by implementing the
set_debounce callback of gpiochip.
On 4/19/16 3:09 AM, Philip Li wrote:
On Tue, Apr 19, 2016 at 10:33:34AM +0800, Fengguang Wu wrote:
Fengguang, any idea why build-bot sometimes silent?
Sorry I went off for some time.. Philip, would you help have a check?
Hi Alexei, i have done some investigation for this. Fengguang, pls
On 4/19/16 3:09 AM, Philip Li wrote:
On Tue, Apr 19, 2016 at 10:33:34AM +0800, Fengguang Wu wrote:
Fengguang, any idea why build-bot sometimes silent?
Sorry I went off for some time.. Philip, would you help have a check?
Hi Alexei, i have done some investigation for this. Fengguang, pls
On Tue, 2016-04-19 at 17:40 +0300, Mika Westerberg wrote:
> On Tue, Apr 19, 2016 at 03:31:41PM +0200, Lars-Peter Clausen wrote:
> >
> > It adds a standard API for dealing with devices that have more than
> > one
> > address. It uses the normal way of specifying multiple (named)
> > address in DT.
On Tue, 2016-04-19 at 17:40 +0300, Mika Westerberg wrote:
> On Tue, Apr 19, 2016 at 03:31:41PM +0200, Lars-Peter Clausen wrote:
> >
> > It adds a standard API for dealing with devices that have more than
> > one
> > address. It uses the normal way of specifying multiple (named)
> > address in DT.
On 04/19/16 08:27, Masanari Iida wrote:
> This patch fix spelling typos in printk from various part
> of the codes.
>
> Signed-off-by: Masanari Iida
Looks good to me. Thanks.
Acked-by: Randy Dunlap
> ---
> arch/powerpc/kernel/mce.c
On 04/19/16 08:27, Masanari Iida wrote:
> This patch fix spelling typos in printk from various part
> of the codes.
>
> Signed-off-by: Masanari Iida
Looks good to me. Thanks.
Acked-by: Randy Dunlap
> ---
> arch/powerpc/kernel/mce.c| 2 +-
>
With commit 8bc2a40730ec ("rtc: ds1307: add support for the
DT property 'wakeup-source'") we lost the ability for rtc irq
functionality for devices that are actually hooked on a real IRQ
line and have capability to wakeup as well. This is not an expected
behavior. So, instead of just not
With commit 8bc2a40730ec ("rtc: ds1307: add support for the
DT property 'wakeup-source'") we lost the ability for rtc irq
functionality for devices that are actually hooked on a real IRQ
line and have capability to wakeup as well. This is not an expected
behavior. So, instead of just not
Le 30/03/2016 10:50, Zhao Qiang a écrit :
The driver add hdlc support for Freescale QUICC Engine.
It support NMSI and TSA mode.
When using TSA, how does the TSA gets configured ? Especially how do you
describe which Timeslot is switched to HDLC channels ?
Is it possible to route some Timeslots
Le 30/03/2016 10:50, Zhao Qiang a écrit :
The driver add hdlc support for Freescale QUICC Engine.
It support NMSI and TSA mode.
When using TSA, how does the TSA gets configured ? Especially how do you
describe which Timeslot is switched to HDLC channels ?
Is it possible to route some Timeslots
On 04/11/2016 03:21 PM, Tony Lindgren wrote:
> * Franklin S Cooper Jr. [160317 08:55]:
>>
>>
>> On 03/17/2016 10:11 AM, Rob Herring wrote:
>>> On Mon, Mar 07, 2016 at 07:23:44PM -0600, Franklin S Cooper Jr wrote:
From: Vignesh R
Add PWMSS device
On 04/11/2016 03:21 PM, Tony Lindgren wrote:
> * Franklin S Cooper Jr. [160317 08:55]:
>>
>>
>> On 03/17/2016 10:11 AM, Rob Herring wrote:
>>> On Mon, Mar 07, 2016 at 07:23:44PM -0600, Franklin S Cooper Jr wrote:
From: Vignesh R
Add PWMSS device tree nodes for DRA7 SoC family
On 04/18/16 22:13, Stephen Rothwell wrote:
> Hi all,
>
> Changes since 20160418:
>
on x86_64:
kernel/built-in.o: In function `wake_torture_stats_print':
waketorture.c:(.text+0x2f06d): undefined reference to `trace_clock_global'
kernel/built-in.o: In function `wake_torture_waiter':
On 04/18/16 22:13, Stephen Rothwell wrote:
> Hi all,
>
> Changes since 20160418:
>
on x86_64:
kernel/built-in.o: In function `wake_torture_stats_print':
waketorture.c:(.text+0x2f06d): undefined reference to `trace_clock_global'
kernel/built-in.o: In function `wake_torture_waiter':
On Tue, Apr 19, 2016 at 09:12:03AM -0700, Andy Lutomirski wrote:
> On Tue, Apr 19, 2016 at 9:09 AM, Michael S. Tsirkin wrote:
> > On Tue, Apr 19, 2016 at 09:02:14AM -0700, Andy Lutomirski wrote:
> >> On Tue, Apr 19, 2016 at 3:27 AM, Michael S. Tsirkin
> >>
On Tue, Apr 19, 2016 at 09:12:03AM -0700, Andy Lutomirski wrote:
> On Tue, Apr 19, 2016 at 9:09 AM, Michael S. Tsirkin wrote:
> > On Tue, Apr 19, 2016 at 09:02:14AM -0700, Andy Lutomirski wrote:
> >> On Tue, Apr 19, 2016 at 3:27 AM, Michael S. Tsirkin
> >> wrote:
> >> > On Mon, Apr 18, 2016 at
On Tue, Apr 19, 2016 at 10:34:34PM +0800, Liang Li wrote:
> Extend the virtio balloon to support the new feature
> VIRTIO_BALLOON_F_GET_FREE_PAGES, so that we can use it to send
> the free page bitmap from guest to QEMU, the free page bitmap will
> be used for live migration optimization.
>
>
On Tue, Apr 19, 2016 at 10:34:34PM +0800, Liang Li wrote:
> Extend the virtio balloon to support the new feature
> VIRTIO_BALLOON_F_GET_FREE_PAGES, so that we can use it to send
> the free page bitmap from guest to QEMU, the free page bitmap will
> be used for live migration optimization.
>
>
Hi Jacek,
On 14 April 2016 at 05:57, Jacek Anaszewski wrote:
> Hi Ezequiel,
>
> It would be good to update also leds-gpio bindings,
> of course in a separate patch:
>
> Documentation/devicetree/bindings/leds/leds-gpio.txt
>
Yes, you are right. I will send a new series
Hi Jacek,
On 14 April 2016 at 05:57, Jacek Anaszewski wrote:
> Hi Ezequiel,
>
> It would be good to update also leds-gpio bindings,
> of course in a separate patch:
>
> Documentation/devicetree/bindings/leds/leds-gpio.txt
>
Yes, you are right. I will send a new series adding this.
Thanks,
--
Hi,
[auto build test ERROR on v4.6-rc4]
[also build test ERROR on next-20160419]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Liang-Li/speed-up-live-migration-by-skipping-free-pages
Hi,
[auto build test ERROR on v4.6-rc4]
[also build test ERROR on next-20160419]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Liang-Li/speed-up-live-migration-by-skipping-free-pages
On 12/04/16 18:54, Mathieu Poirier wrote:
This patch implement the AUX area interfaces required to
use the TMC (configured as an ETF) from the Perf sub-system.
The heuristic is heavily borrowed from the ETB10 implementation.
Signed-off-by: Mathieu Poirier
---
On 12/04/16 18:54, Mathieu Poirier wrote:
This patch implement the AUX area interfaces required to
use the TMC (configured as an ETF) from the Perf sub-system.
The heuristic is heavily borrowed from the ETB10 implementation.
Signed-off-by: Mathieu Poirier
---
On 19 April 2016 at 07:42, Suzuki K Poulose wrote:
> On 12/04/16 18:54, Mathieu Poirier wrote:
>>
>> The sysFS and Perf access methods can't be allowed to interfere
>> with one another. As such introducing guards to access
>> functions that prevents moving forward if a
On 19 April 2016 at 07:42, Suzuki K Poulose wrote:
> On 12/04/16 18:54, Mathieu Poirier wrote:
>>
>> The sysFS and Perf access methods can't be allowed to interfere
>> with one another. As such introducing guards to access
>> functions that prevents moving forward if a TMC is already
>> being
On Tue, Apr 19, 2016 at 03:02:09PM +, Li, Liang Z wrote:
> > On Tue, 2016-04-19 at 22:34 +0800, Liang Li wrote:
> > > The free page bitmap will be sent to QEMU through virtio interface and
> > > used for live migration optimization.
> > > Drop the cache before building the free page bitmap can
On Tue, Apr 19, 2016 at 03:02:09PM +, Li, Liang Z wrote:
> > On Tue, 2016-04-19 at 22:34 +0800, Liang Li wrote:
> > > The free page bitmap will be sent to QEMU through virtio interface and
> > > used for live migration optimization.
> > > Drop the cache before building the free page bitmap can
Colin King writes:
> From: Colin Ian King
>
> ah is written twice with the same value, remove one of the
> redundant assignments to ah.
>
> Signed-off-by: Colin Ian King
Applied, thanks.
--
Kalle Valo
Colin King writes:
> From: Colin Ian King
>
> ah is written twice with the same value, remove one of the
> redundant assignments to ah.
>
> Signed-off-by: Colin Ian King
Applied, thanks.
--
Kalle Valo
Julian Calaby writes:
> On Sat, Jan 2, 2016 at 5:25 AM, SF Markus Elfring
> wrote:
>> From: Markus Elfring
>> Date: Fri, 1 Jan 2016 19:09:32 +0100
>>
>> Replace an explicit initialisation for one local
Julian Calaby writes:
> On Sat, Jan 2, 2016 at 5:25 AM, SF Markus Elfring
> wrote:
>> From: Markus Elfring
>> Date: Fri, 1 Jan 2016 19:09:32 +0100
>>
>> Replace an explicit initialisation for one local variable at the beginning
>> by a conditional assignment.
>>
>> Signed-off-by: Markus
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