Intel Xeon Phi x200 (codenamed Knights Landing) allows to enable
MONITOR and MWAIT instructions outside of ring 0.
The feature is controlled by MSR MISC_FEATURE_ENABLES (0x140).
Setting bit 1 of this register enables it, so MONITOR and MWAIT
instructions do not cause invalid-opcode exceptions
Add Intel Xeon Phi x200 (KnightsLanding) cpu feature - ring 3 monitor/mwait
Signed-off-by: Grzegorz Andrejczuk
---
arch/x86/include/asm/cpufeatures.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/cpufeatures.h
'btrfs_iget()' can not return an error pointer, so this test can be
removed.
Signed-off-by: Christophe JAILLET
---
fs/btrfs/free-space-cache.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/fs/btrfs/free-space-cache.c b/fs/btrfs/free-space-cache.c
index
On Monday 31 October 2016 08:15 PM, Bartosz Golaszewski wrote:
> The tilcdc driver is not yet ready for working together with the
> dumb-vga-dac drm bridge. While the work on enabling drm_bridge
> support in tilcdc continues, enable the VGA connector on da850-lcdk
> with the following workaround:
On 01/11/16 12:26, Sekhar Nori wrote:
> On Monday 31 October 2016 08:15 PM, Bartosz Golaszewski wrote:
>> The tilcdc driver is not yet ready for working together with the
>> dumb-vga-dac drm bridge. While the work on enabling drm_bridge
>> support in tilcdc continues, enable the VGA connector on
This commit adds the support for probing the rfkill-regulator
from devicetree.
Information about the devicetree bindings can be found here:
Documentation/devicetree/bindings/net/rfkill-regulator.txt
Signed-off-by: Paul Cercueil
---
net/rfkill/rfkill-regulator.c | 43
This document gives information about how to write a devicetree
node that corresponds to the rfkill-regulator driver.
Signed-off-by: Paul Cercueil
---
.../devicetree/bindings/net/rfkill-regulator.txt | 18 ++
1 file changed, 18 insertions(+)
create
use clk_disable_unprepare instead of clk_disable to save more energy
when CMDQ is idle.
Signed-off-by: HS Liao
---
drivers/mailbox/mtk-cmdq-mailbox.c | 52 --
1 file changed, 44 insertions(+), 8 deletions(-)
diff --git
take suspend and resume into consideration
Signed-off-by: HS Liao
---
drivers/mailbox/mtk-cmdq-mailbox.c | 44 ++
1 file changed, 44 insertions(+)
diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c
b/drivers/mailbox/mtk-cmdq-mailbox.c
This patch adds the device node of the GCE hardware for CMDQ module.
Signed-off-by: HS Liao
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
This patch is first version of Mediatek Command Queue(CMDQ) driver. The
CMDQ is used to help write registers with critical time limitation,
such as updating display configuration during the vblank. It controls
Global Command Engine (GCE) hardware to achieve this requirement.
Currently, CMDQ only
Hi Peter,
Am Donnerstag, den 27.10.2016, 15:01 +0200 schrieb Peter Senna Tschudin:
> Add a driver that create a drm_bridge and a drm_connector for the LVDS
> to DP++ display bridge of the GE B850v3.
>
> There are two physical bridges on the video signal pipeline: a
> STDP4028(LVDS to DP) and a
hi Randy,
Frankly I don't have answer to your questions, but I did reproduced
the issues you described.
And found that:
* `Show Debug Info` menu item was(created, but) not added to the menu.
* if the `showDebug` setting was set to true, the the initial widgets
state will not be set correctly.
On 11/01/2016 09:10 AM, Christophe JAILLET wrote:
'create_root_ns()' does not return an error pointer, so the test can be
simplified to be more consistent.
Signed-off-by: Christophe JAILLET
Acked-by: Saeed Mahameed
Hi,
Baolin Wang writes:
> Changes since v1:
> - Move the suspend checking to right place to avoid checking twice.
there is still one problem
> @@ -1736,12 +1739,38 @@ static int dwc3_gadget_stop(struct usb_gadget *g)
> {
> struct dwc3 *dwc =
This adds documentation for the MediaTek Global Command Engine (GCE) unit
found in MT8173 SoCs.
Signed-off-by: HS Liao
Acked-by: Rob Herring
---
.../devicetree/bindings/mailbox/mtk-gce.txt| 43 ++
1 file changed, 43
Hi,
This is Mediatek MT8173 Command Queue(CMDQ) driver. The CMDQ is used
to help write registers with critical time limitation, such as
updating display configuration during the vblank. It controls Global
Command Engine (GCE) hardware to achieve this requirement.
These patches have a build
Hi,
Baolin Wang writes:
> Hi,
>
> On 1 November 2016 at 19:01, Felipe Balbi wrote:
>>
>> Hi,
>>
>> Baolin Wang writes:
>>> Changes since v1:
>>> - Move the suspend checking to right place to avoid checking twice.
>>
>> there
In Mediatek SOCs, the CIRQ is a low power interrupt controller
designed to works outside MCUSYS which comprises with Cortex-Ax
cores,CCI and GIC.
The CIRQ controller is integrated in between MCUSYS( include
Cortex-Ax, CCI and GIC ) and interrupt sources as the second
level interrupt controller.
In Mediatek SOCs, the CIRQ is a low power interrupt controller designed to
works outside MCUSYS which comprises with Cortex-Ax cores,CCI and GIC.
The CIRQ controller is integrated in between MCUSYS and interrupt sources
as the second level interrupt controller. The external interrupts which
This commit add mtk-cirq node to mt2701 dtsi.
Signed-off-by: Youlin Pei
---
arch/arm/boot/dts/mt2701.dtsi | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index
This commit adds the device tree binding document for
the mediatek cirq.
Signed-off-by: Youlin Pei
---
.../interrupt-controller/mediatek,cirq.txt | 30
1 file changed, 30 insertions(+)
create mode 100644
> int (*port_set_link)(struct mv88e6xxx_chip *chip, int port, int link);
> +
> + /* Port's MAC duplex mode
> + *
> + * Use DUPLEX_HALF or DUPLEX_FULL to force half or full duplex, or
> + * DUPLEX_UNKNOWN for normal duplex detection.
> + */
> + int
Hi David,
On Tuesday 01 November 2016 02:17 AM, David Lechner wrote:
> Add a syscon node for the SoC CFGCHIPn registers. It includes a child node
> for the USB PHY that is part of this range of registers.
>
> Also have to add OF_DEV_AUXDATA() entry so that clock lookup will work for
> the the
If state_initialized is not set to 0 when a kobject is
released, a device is registered, unregistered, and
registered again, the error below will occur.
kobject (dec04bb0): tried to init an initialized object,
something is seriously wrong.
Signed-off-by: Songjun Wu
---
Make sure to drop the reference to the parent device taken by
class_find_device() after "unexporting" any children when deregistering
a pwm chip.
Fixes: 0733424c9ba9 ("pwm: Unexport children before chip removal")
Signed-off-by: Johan Hovold
---
drivers/pwm/sysfs.c | 2 ++
1
Make sure to drop the references taken by bus_find_device() before
returning from emac_dev_open().
Note that phy_connect still takes a reference to the phy device.
Fixes: 5d69e0076a72 ("net: davinci_emac: switch to new mdio")
Signed-off-by: Johan Hovold
---
Hi,
Thanks for the review.
On 10/31/2016 07:51 PM, Thomas Gleixner wrote:
On Mon, 31 Oct 2016, Zubair Lutfullah Kakakhel wrote:
The drivers read/write function handling is a bit quirky.
Can you please explain in more detail what's quirky and why it should be
done differently,
And the
This series fixes a number of device reference leaks (and one of_node
leak) due to failure to drop the references taken by bus_find_device()
and friends.
Note that the final two patches have been compile tested only.
Thanks,
Johan
Johan Hovold (4):
phy: fix device reference leaks
net:
Make sure to drop the reference taken by class_find_device() in
hnae_get_handle() on errors and when later releasing the handle.
Fixes: 6fe6611ff275 ("net: add Hisilicon Network Subsystem...")
Signed-off-by: Johan Hovold
---
drivers/net/ethernet/hisilicon/hns/hnae.c | 8
On Tue, Nov 01, 2016 at 04:01:58PM +0900, Yoshihiro Shimoda wrote:
> This patch adds sysfs "otg_inputs" for usb role swap. This parameter
> is write-only and if you use them as the following, you can swap
> the usb role.
>
> For example:
> 1) connect a usb cable using 2 salvator-x boards
> 2)
Hi,
On 1 November 2016 at 19:36, Felipe Balbi wrote:
>
> Hi,
>
> Baolin Wang writes:
>> Hi,
>>
>> On 1 November 2016 at 19:01, Felipe Balbi wrote:
>>>
>>> Hi,
>>>
>>> Baolin Wang writes:
Changes since v1:
On 31/10/16 18:20, Geert Uytterhoeven wrote:
> Hi Robin,
>
> On Mon, Oct 31, 2016 at 6:41 PM, Robin Murphy wrote:
>> On 31/10/16 15:45, Geert Uytterhoeven wrote:
>>> On architectures like arm64, swiotlb is tied intimately to the core
>>> architecture DMA support. In
From: Borislav Petkov
I always forget which is highest priority so document it.
Signed-off-by: Borislav Petkov
---
include/linux/notifier.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/notifier.h b/include/linux/notifier.h
index
On Mon, Oct 31, 2016 at 08:16:59PM +, Winkler, Tomas wrote:
> >
> > On Fri, Oct 28, 2016 at 05:37:45PM +0300, Jarkko Sakkinen wrote:
> >
> > > > I think this patch from Jarkko's next is the fix:
> > > >
> > > > http://git.infradead.org/users/jjs/linux-tpmdd.git/commit/65da72b7dd
> > > >
> -Original Message-
> From: Juergen Gross [mailto:jgr...@suse.com]
> Sent: 31 October 2016 16:48
> To: linux-kernel@vger.kernel.org; xen-de...@lists.xen.org
> Cc: David Vrabel ; boris.ostrov...@oracle.com;
> Juergen Gross ; Wei Liu
> +#define LINK_UNKNOWN -1
> +
> + /* Port's MAC link state
> + * LINK_UNKNOWN for normal link detection, 0 to force link down,
> + * otherwise force link up.
> + */
> + int (*port_set_link)(struct mv88e6xxx_chip *chip, int port, int link);
Hi Vivien
Maybe LINK_AUTO would
On Tuesday 01 November 2016 02:17 AM, David Lechner wrote:
> From: Axel Haslam
>
> The usb20_phy clock needs to be registered for the driver to be able
> to get and enable a clock. Currently the usb phy clocks are registered
> form board files, which will not be called
On Monday 31 October 2016 08:15 PM, Bartosz Golaszewski wrote:
> Create a new driver for the da8xx DDR2/mDDR controller and implement
> support for writing to the Peripheral Bus Burst Priority Register.
>
> Signed-off-by: Bartosz Golaszewski
Reviewed-by: Sekhar Nori
Hi,
With this set of two commits, it is now possible to use the
gpio-keys driver with 4 GPIOs representing a hat (D-pad).
Right now, the gpio-keys driver is mostly used with EV_KEY event types.
However, this driver (and its devicetree bindings) support specifying
a different input type, like EV_ABS, even though this doesn't work in
practice: "key pressed" events are correctly received and treated, but
"key released"
Hi Andi,
On Tue, Nov 01, 2016 at 03:51:11PM +0900, Andi Shyti wrote:
> > Andi, it would be good to know what the use-case for the original change is.
>
> the use case is the ir-spi itself which doesn't need the lirc to
> perform any waiting on its behalf.
Here is the crux of the problem: in
Hi,
On 1 November 2016 at 19:01, Felipe Balbi wrote:
>
> Hi,
>
> Baolin Wang writes:
>> Changes since v1:
>> - Move the suspend checking to right place to avoid checking twice.
>
> there is still one problem
>
>> @@ -1736,12 +1739,38 @@ static int
On Tue, 1 Nov 2016, Paul Burton wrote:
> BTW, do you have a feel for whether there's a good r2k/r3k platform (ideal
> would be some software emulator if any are good enough) that we could hook up
> to our continuous integration system? That would help us to catch any
> regressions like this in
From: Borislav Petkov
When there are no error record consumers registered with the kernel, the
only thing that appears in dmesg is something like:
[ 300.000326] mce: [Hardware Error]: Machine check events logged
and the error records are gone. Which is seriously
From: Borislav Petkov
Right,
so this is not a good thing: systems may not have any error record
consumers registered and in such cases, any logged MCEs disappear into
the void. And this shouldn't happen.
So let's dump them to dmesg as a last resort.
Borislav Petkov (3):
From: Borislav Petkov
Add the TSC at the time of injection.
Signed-off-by: Borislav Petkov
---
arch/x86/ras/mce_amd_inj.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/ras/mce_amd_inj.c b/arch/x86/ras/mce_amd_inj.c
index 1ac76479c266..8730c2882fff
--
Good day my dear friend,
I am Mr. Adams mahjid I work as the Foreign Operations Manager with one of
the Bank here in Burkina Faso. Although the world is very small place and
hard place to meet people because you don't know who to trust or believe,
but as I have developed the trust in you
Casey Schaufler wrote:
> diff --git a/security/security.c b/security/security.c
> index f825304..f0a802ee 100644
> --- a/security/security.c
> +++ b/security/security.c
> @@ -32,6 +32,7 @@
> /* Maximum number of letters for an LSM name string */
> #define SECURITY_NAME_MAX10
>
> +char
On Hip06, the accesses to LPC peripherals work in an indirect way. A
corresponding LPC driver configure some registers in LPC master at first, then
the real accesses on LPC slave devices are finished by the LPC master, which
is transparent to LPC driver.
This patch implement the relevant driver
For arm64, there is no I/O space as other architectural platforms, such as
X86. Most I/O accesses are achieved based on MMIO. But for some arm64 SoCs,
such as Hip06, when accessing some legacy ISA devices connected to LPC, those
known port addresses are used to control the corresponding target
Am Dienstag, den 01.11.2016, 14:59 +0200 schrieb Peter Ujfalusi:
> Move the checks to select the initial state for the backlight to a new
> function and document the checks we are doing.
>
> With the separate function it is going to be easier to fix or improve the
> initial power state
On 10/21/2016 04:17 PM, Geert Uytterhoeven wrote:
Now the R-Car Gen2 CPG clock driver obtains the state of the mode pins
from the R-Car RST driver, there's no longer a need to pass this state
explicitly. Hence we can just call of_clk_init() instead.
Signed-off-by: Geert Uytterhoeven
On Fri, 28 Oct 2016 15:27:42 -0500
Zach Brown wrote:
> The fields bb_per_lun and blocks_per_lun are useful determining the
> number of bad blocks a MTD needs to allocate. How they are set will
> depend on if the chip is ONFI, JEDEC or a fuill-id entry in the nand_ids
> table.
On Mon, Oct 31, 2016 at 08:37:18PM +0100, Hannes Reinecke wrote:
> Add a new field 'lo_logical_blocksize' to hold the logical
> blocksize of the loop device.
Why do we use the same flag for both block sizes? If there is a good
reason for that it should be documented and both should be in the
Hi Suzuki,
On 31 October 2016 at 16:03, Suzuki K Poulose wrote:
> Use the module_cpu_feature_match to make sure the system has
> HWCAP_AES to use the module.
>
> Cc: Ard Biesheuvel
> Signed-off-by: Suzuki K Poulose
>
On Mon, Oct 31, 2016 at 04:03:44PM +, Suzuki K Poulose wrote:
> The hypervisor may not have full access to the kernel data structures
> and hence cannot safely use cpus_have_cap() helper for checking the
> system capability. Add a safe helper for hypervisors to check a constant
> system
ATENCIÓN;
Su buzón ha superado el límite de almacenamiento, que es de 5 GB definidos por
el administrador, quien actualmente está ejecutando en 10.9GB, no puede ser
capaz de enviar o recibir correo nuevo hasta que
vuelva a validar su buzón de correo electrónico. Para revalidar su buzón de
Hi Tobias,
Lately I've submitted patches to Gregs (char-misc) git repo and they got
bounced because the kbuild bot threw a warning:
warning: (PMAC_BACKLIGHT && DRM_NOUVEAU && HT16K33 && FB_TFT) selects
FB_BACKLIGHT which has unmet direct dependencies (HAS_IOMEM && FB)
My patched added a new
- Original Message -
> On 11/01/16 at 01:10pm, Dave Young wrote:
> > On 10/06/16 at 04:46pm, Baoquan He wrote:
> > > KASLR memory randomization can randomize the base of the physical memory
> > > mapping (PAGE_OFFSET), vmalloc (VMALLOC_START) and vmemmap
> > > (VMEMMAP_START). These need
On 01/11/16 14:03, Ard Biesheuvel wrote:
Hi Suzuki,
On 31 October 2016 at 16:03, Suzuki K Poulose wrote:
Use the module_cpu_feature_match to make sure the system has
HWCAP_AES to use the module.
Cc: Ard Biesheuvel
Signed-off-by: Suzuki K
On Mon, Oct 31, 2016 at 04:19:11PM -0700, Omar Sandoval wrote:
> > + if (unlikely(ret))
> > + return ret;
> > + ret = bio.bi_iter.bi_size;
> > +
> > + if (iov_iter_rw(iter) == READ) {
> > + bio_set_op_attrs(, REQ_OP_READ, 0);
> > + if (iter->type == ITER_IOVEC)
Currently if the range property is not specified of_translate_one
returns an error. There are some special devices that work on a
range of I/O ports where it's is not correct to specify a range
property as the cpu addresses are used by special accessors.
Here we add a new exception in
This patch supports the IPMI-bt device attached to the Low-Pin-Count interface
implemented on Hisilicon Hip06 SoC.
---
| LPC host|
| |
---
|
Hi Bjorn,
On 2016-10-31 15:48, Bjorn Helgaas wrote:
On Wed, Sep 21, 2016 at 06:38:05PM -0400, Christopher Covington wrote:
The Qualcomm Technologies QDF2432 SoC does not support accesses
smaller
than 32 bits to the PCI configuration space. Register the appropriate
quirk.
Signed-off-by:
Am Dienstag, den 01.11.2016, 14:59 +0200 schrieb Peter Ujfalusi:
> If the pwm is not enabled the backlight initially should not be enabled
> either if we have booted with DT and there is a phandle pointing to the
> backlight node.
>
> The patch extends the checks to decide if we should keep the
Hi,
I started seeing following messages on Intel Broxton when the
pinctrl/GPIO driver [1] loads:
[0.645786] genirq: irq 14 uses trigger mode 8; requested 0
The driver shares interrupt with other GPIO "communities" or banks so it
uses request_irq() instead of
On Sun, 2016-10-30 at 10:06 +0800, Chen-Yu Tsai wrote:
> Looking at the dmaengine API, I believe we got it wrong.
>
> max_burst in dma_slave_config denotes the largest amount of data
> a single transfer should be, as described in dmaengine.h:
Not a single transfer but smallest transaction within
On 10/28/2016 7:48 AM, Alexey Kardashevskiy wrote:
> On 27/10/16 23:31, Kirti Wankhede wrote:
>>
>>
>> On 10/27/2016 12:50 PM, Alexey Kardashevskiy wrote:
>>> On 18/10/16 08:22, Kirti Wankhede wrote:
VFIO IOMMU drivers are designed for the devices which are IOMMU capable.
Mediated
Hi,
On 31 October 2016 at 08:00, NeilBrown wrote:
> On Fri, Oct 28 2016, Baolin Wang wrote:
>
>>>
>>> 3/ usb_charger_notify_state() does nothing if the state doesn't change.
>>> When the extcon detects an SDP, it will be called to set the state
>>> to USB_CHARGER_PRESENT.
If the pwm is not enabled the backlight initially should not be enabled
either if we have booted with DT and there is a phandle pointing to the
backlight node.
The patch extends the checks to decide if we should keep the backlight off
initially.
Signed-off-by: Peter Ujfalusi
On Mon, Oct 31, 2016 at 08:37:17PM +0100, Hannes Reinecke wrote:
> When running on files the physical blocksize is actually 4k,
Is it? Independent of that sentence the patch looks fine:
Reviewed-by: Christoph Hellwig
On 10/31/16 16:19, Bartosz Golaszewski wrote:
> The frame synchronization error happens when the DMA engine attempts
> to read what it believes to be the first word of the video buffer but
> it cannot be recognized as such or when the LCDC is starved of data
> due to insufficient bandwidth of the
On Mon, Oct 31, 2016 at 04:30:59PM -0500, Babu Moger wrote:
>
> On 10/31/2016 4:00 PM, Don Zickus wrote:
> >On Wed, Oct 26, 2016 at 09:02:19AM -0700, Babu Moger wrote:
> >>This is an attempt to cleanup watchdog handlers. Right now,
> >>kernel/watchdog.c implements both softlockup and hardlockup
ATTENZIONE;
La cassetta postale ha superato il limite di archiviazione, che è 5 GB come
definiti dall'amministratore, che è attualmente in esecuzione su 10.9GB, non si
può essere in grado di inviare o ricevere nuovi messaggi fino a ri-convalidare
la tua mailbox. Per rinnovare la vostra casella
On Tue, Nov 01, 2016 at 07:51:27AM +0800, Ming Lei wrote:
> Sorry for forgetting to mention one important point:
>
> - after multipage bvec is introduced, the iterated bvec pointer
> still points to singlge page bvec, which is generated in-flight
> and is readonly actually. That is the motivation
Hi Michael,
On 31/10/16 19:53, Michael Zoran wrote:
> On Mon, 2016-10-31 at 11:40 -0700, Michael Zoran wrote:
>> On Mon, 2016-10-31 at 11:36 -0700, Eric Anholt wrote:
>>> Michael Zoran writes:
>>>
Setting the DMA mask is optional on 32 bit but
is mandatory on 64
Move the checks to select the initial state for the backlight to a new
function and document the checks we are doing.
With the separate function it is going to be easier to fix or improve the
initial power state configuration later and it is easier to read the code.
Signed-off-by: Peter Ujfalusi
Hi,
Changes since v2:
- Do not change the way how the GPIO initially configured as input is handled.
Configure it as output and set it's state as active.
Changes since v1:
- Handling of the enable GPIO is reworked:
- Only change direction to output when the pin was input and in this case set
DoS protection conditions were altered in WS2016 and now it's easy to get
-EAGAIN returned from vmbus_post_msg() (e.g. when we try changing MTU on a
netvsc device in a loop). All vmbus_post_msg() callers don't retry the
operation and we usually end up with a non-functional device or crash.
While
On Fri, Oct 21, 2016 at 01:35:50PM +0530, Jagan Teki wrote:
> From: Jagan Teki
>
> This is series add dts support for Engicam I.Core M6 qdl modules. just
> rebased on top of linux-next.
>
> Jagan Teki (3):
> ARM: dts: imx6q: Add Engicam i.CoreM6 Quad/Dual initial
> "Sreekanth" == Sreekanth Reddy writes:
Sreekanth> While merging mpt3sas & mpt2sas code, we posted below patch
Sreekanth> for WarpDrive support,
[...]
Sreekanth> Due to above hunk, we are not initializing raid_device's
Sreekanth> starget for raid volumes, and
On Mon, Oct 31, 2016 at 08:37:19PM +0100, Hannes Reinecke wrote:
> The current LOOP_SET_STATUS64 ioctl has two unused fields
> 'init[2]', which can be used in conjunction with the
> LO_FLAGS_BLOCKSIZE flag to pass in the new logical blocksize.
Can we give them sane field names while at it? Also
On Tue, Nov 01, 2016 at 09:05:00AM +0800, Ming Lei wrote:
> > + size = iov_iter_get_pages(iter, pages, LONG_MAX, nr_pages, );
>
> BTW, if there is one multi-page version of get_user_pages_fast() and
> iov_iter_get_pages(), size of page array can be reduced too.
There isn't at the moment.
On 10/28/2016 04:54 AM, Boylston, Brian wrote:
> Boaz Harrosh wrote on 2016-10-26:
>> On 10/26/2016 06:50 PM, Brian Boylston wrote:
>>> Introduce memcpy_nocache() as a memcpy() that avoids the processor cache
>>> if possible. Without arch-specific support, this defaults to just
>>> memcpy(). For
On 10/31/16 16:19, Bartosz Golaszewski wrote:
> The frame synchronization error happens when the DMA engine attempts
> to read what it believes to be the first word of the video buffer but
> it cannot be recognized as such or when the LCDC is starved of data
> due to insufficient bandwidth of the
> + vcpu->arch.cpuid_fault = false;
This should be conditional on "if (!init_event)". Most MSRs are untouched
on an INIT IPI.
Otherwise looks good. The patch is independent of the rest, so I would
prefer to take it through the KVM tree.
Thanks,
Paolo
>
Hello.
Andy Lutomirski wrote:
> Reporting these fields on a non-current task is dangerous. If the
> task is in any state other than normal kernel code, they may contain
> garbage or even kernel addresses on some architectures. (x86_64
> used to do this. I bet lots of architectures still do.)
From: Dongli Zhang
Date: Mon, 31 Oct 2016 21:46:09 -0700 (PDT)
> David, I am very sorry for this error and I will be careful the next time.
> Would you please let me know if I should resend a new patch or an incremental
> based on previous one at
>
On Tue, Nov 1, 2016 at 9:46 PM, Koul, Vinod wrote:
> On Sun, 2016-10-30 at 10:06 +0800, Chen-Yu Tsai wrote:
>> Looking at the dmaengine API, I believe we got it wrong.
>>
>> max_burst in dma_slave_config denotes the largest amount of data
>> a single transfer should be, as
On Mon, Oct 31, 2016 at 07:15 PM GMT, David Miller wrote:
> From: Jakub Sitnicki
> Date: Sun, 30 Oct 2016 14:03:11 +0100
>
>> 2) ensure the flow labels used in both directions are the same (either
>>reflected by one side, or fixed, e.g. not used and set to 0), so that
>>
> -Original Message-
> From: Vitaly Kuznetsov [mailto:vkuzn...@redhat.com]
> Sent: Tuesday, November 1, 2016 9:34 AM
> To: de...@linuxdriverproject.org
> Cc: linux-kernel@vger.kernel.org; KY Srinivasan ;
> Haiyang Zhang ; Van De Ven, Arjan
>
Commit d5537e988eec ("NVMe: Don't unmap controller registers on reset"),
introduced a regression in which it did not replace nvme_dev_unmap()
with nvme_pci_disable() in the error path of nvme_probe_work().
This led to the following NVMe driver crash on systems where the devices
did not initialise
The ethtool api {get|set}_settings is deprecated.
We move this driver to new api {get|set}_link_ksettings.
Signed-off-by: Philippe Reynes
---
drivers/net/ethernet/3com/3c59x.c | 14 --
1 files changed, 8 insertions(+), 6 deletions(-)
diff --git
Hello Robin,
I'm afraid I can't help you with that. The series was done as a request
by Daniel Vetter, see here for reference:
http://www.spinics.net/lists/dri-devel/msg113011.html
I don't have any nouveau platform here.
With best wishes,
Tobias
Robin van der Gracht wrote:
> Hi Tobias,
>
>
On 01/11/16 14:03, Will Deacon wrote:
On Mon, Oct 31, 2016 at 04:03:44PM +, Suzuki K Poulose wrote:
The hypervisor may not have full access to the kernel data structures
and hence cannot safely use cpus_have_cap() helper for checking the
system capability. Add a safe helper for hypervisors
On Tue, Nov 01, 2016 at 02:24:38PM +, Jon Hunter wrote:
> Hi Mika,
>
> On 01/11/16 13:02, Mika Westerberg wrote:
> > Hi,
> >
> > I started seeing following messages on Intel Broxton when the
> > pinctrl/GPIO driver [1] loads:
> >
> > [0.645786] genirq: irq 14 uses trigger mode 8;
nce) to record what (public, well-known) commit your patch series was
built on]
[Check https://git-scm.com/docs/git-format-patch for more information]
url:
https://github.com/0day-ci/linux/commits/zhichang-yuan/ARM64-LPC-legacy-ISA-I-O-support/20161101-211425
base: https://git.kernel.org/
vc04_services contains a debug logging mechanism. The log is
maintained in a shared memory area between the kernel and the
firmware. Changing the sizes of the data in this area would
require a firmware change which is distributed independently
from the kernel binary.
One of the items logged is
From: Jakub Sitnicki
Date: Tue, 01 Nov 2016 16:13:51 +0100
> On Mon, Oct 31, 2016 at 07:15 PM GMT, David Miller wrote:
>> From: Jakub Sitnicki
>> Date: Sun, 30 Oct 2016 14:03:11 +0100
>>
>>> 2) ensure the flow labels used in both directions are the same (either
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