Hi Finn,
On Mon, Jan 2, 2017 at 10:53 AM, Finn Thain wrote:
> mac_nmi_handler() is useless in its present form and locks up my PowerBook
> 180. Let's throw out the dead code and make it do something useful: print
> a register dump and a stack trace.
>
> mac_debug_handler() is also dead code. Remo
On 12/31/2016 11:50 PM, Stafford Horne wrote:
Hi Jonas,
On Sat, Dec 31, 2016 at 03:10:37PM +0100, Jonas Bonn wrote:
Hi Stafford,
Post-merge window patches should be bug fixes, only. Patch 1/3 probably
qualifies, but the others are far too trivial to be pushing now. Just put
them on your 4.1
On Monday 19 December 2016 03:23 PM, Bartosz Golaszewski wrote:
> Add a gpio-keys node for two user buttons present on the board.
>
> Signed-off-by: Bartosz Golaszewski
Applied to v4.11/dt
Thanks,
Sekhar
From: Rainer Hochecker
Add fourcc codes for 16bit planes. Required by mesa for
eglCreateImageKHR to access P010 surfaces created by vaapi.
Signed-off-by: Rainer Hochecker
---
include/uapi/drm/drm_fourcc.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/uapi/drm/drm_fourcc.h b
On 22-12-16, 12:14, Rob Herring wrote:
> On Mon, Dec 12, 2016 at 04:26:17PM +0530, Viresh Kumar wrote:
> > Hello,
> >
> > Some platforms have the capability to configure the performance state of
> > their Power Domains. The performance levels are represented by positive
> > integer values, a lower
On Sun 2017-01-01 20:25:25, Larry Finger wrote:
> Commit 7fd8329ba502 ("taint/module: Clean up global and module taint
> flags handling") used the key words true and false as character members
> of a new struct. These names cause problems when out-of-kernel modules
> such as VirtualBox include thei
On 01/02/2017 05:10 PM, Sakari Ailus wrote:
Hi Randy,
Thanks for the patch.
On Mon, Jan 02, 2017 at 04:50:04PM +0800, Randy Li wrote:
The formats added by this patch are:
V4L2_PIX_FMT_P010
V4L2_PIX_FMT_P010M
Currently, none of driver uses those format, but some video device
h
On 02-01-17, 15:48, Vinod Koul wrote:
> not sure about non intel ones, viresh?
Not sure really :(
--
viresh
On 2017-01-01 12:24, Jonathan Cameron wrote:
> On 30/11/16 08:17, Peter Rosin wrote:
>> Analog Devices ADG792A/G is a triple 4:1 mux.
>>
>> Signed-off-by: Peter Rosin
> Looks pretty good. Some minor suggestions inline.
>
> This convinced me of two things:
> 1. Need a separate subsystem directory
On Wednesday 14 December 2016 03:27 PM, Tomi Valkeinen wrote:
> On 13/12/16 12:09, Bartosz Golaszewski wrote:
>> The tilcdc node name is 'display' as per the ePAPR 1.1 recommendation.
>> The label is also 'display', but change it to 'lcdc' to make it clear
>> what the underlying hardware is.
>>
>>
Hi,
On Mon, Jan 02, 2017 at 06:53:16PM +0800, ayaka wrote:
>
>
> On 01/02/2017 05:10 PM, Sakari Ailus wrote:
> >Hi Randy,
> >
> >Thanks for the patch.
> >
> >On Mon, Jan 02, 2017 at 04:50:04PM +0800, Randy Li wrote:
> >>The formats added by this patch are:
> >>V4L2_PIX_FMT_P010
> >>V4L2_
Hi Archit,
On Wednesday 14 December 2016 10:35 AM, Archit Taneja wrote:
>
>
> On 12/13/2016 03:39 PM, Bartosz Golaszewski wrote:
>> THS8135 is a configurable video DAC, but no configuration is actually
>> necessary to make it work.
>>
>> For now use the dumb-vga-dac driver to support it.
>
> Qu
> - Handle the global mutex properly when rfkill_set_{hw,sw}_state()
> or
> rfkill_set_states() is called from within an rfkill callback. v2
> always tried to lock the global mutex in such a case, which led
> to a
> deadlock when an rfkill driver called one of the above functions
>
Le 13/12/2016 à 17:27, Richard Genoud a écrit :
> If we don't disable the transmitter in atmel_stop_tx, the DMA buffer
> continues to send data until it is emptied.
> This cause problems with the flow control (CTS is asserted and data are
> still sent).
>
> So, disabling the transmitter in atmel_s
On Mon, Jan 2, 2017 at 11:34 AM, Jonas Bonn wrote:
> On 12/31/2016 11:50 PM, Stafford Horne wrote:
>>
>> Hi Jonas,
>>
>> On Sat, Dec 31, 2016 at 03:10:37PM +0100, Jonas Bonn wrote:
>>>
>>> Hi Stafford,
>>>
>>> Post-merge window patches should be bug fixes, only. Patch 1/3 probably
>>> qualifies,
On Wednesday 14 December 2016 03:24 PM, Tomi Valkeinen wrote:
> On 13/12/16 12:09, Bartosz Golaszewski wrote:
>> Add the vga-bridge node to the board DT together with corresponding
>> ports and vga connector. This allows to retrieve the edid info from
>> the display automatically.
>>
>> Signed-off-
On 01 January, 2017 21:24 CET, Peter Senna Tschudin
wrote:
[ ... ]
> +static void ge_b850v3_lvds_dp_detach(struct drm_bridge *bridge)
> +{
> + struct ge_b850v3_lvds_dp *ptn_bridge
> + = bridge_to_ge_b850v3_lvds_dp(bridge);
> + struct i2c_client *ge_b850v3_lvds_dp
On Mon, 2017-01-02 at 15:48 +0530, Vinod Koul wrote:
> On Mon, Jan 02, 2017 at 10:38:00AM +0200, Andy Shevchenko wrote:
> > On Fri, 2016-12-30 at 12:05 +, Jose Abreu wrote:
> > > ++dw-dmac Maintainers
> > I used to have some semi-finished patch to switch to generic API,
> > though
> > at that
On Tuesday 13 December 2016 03:39 PM, Bartosz Golaszewski wrote:
> At maximum CPU frequency of 300 MHz the maximum pixel clock frequency
> is 37.5 MHz[1]. We must filter out any mode for which the calculated
> pixel clock rate would exceed this value.
>
> Specify the max-pixelclock property for th
On Mon, Jan 02, 2017 at 09:36:10AM +, Rafal Ozieblo wrote:
> According Cadence Hardware team:
> "It is just that some customers prefer to have the time in the descriptors as
> that is provided per frame.
> The registers are simply overwritten when a new event frame is
> transmitted/received a
Refactor write_vmem() for sake of readability.
While here, fix indentation in one comment.
Signed-off-by: Andy Shevchenko
---
drivers/staging/fbtft/fb_ssd1306.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/drivers/staging/fbtft/fb_ssd1306.c
b/drivers/sta
There is 64x48 display exists. In order to support that set multiplexer
to 48 pixels and window address to proper position in the graphic display
data RAM.
Signed-off-by: Andy Shevchenko
---
drivers/staging/fbtft/fb_ssd1306.c | 21 +
1 file changed, 21 insertions(+)
diff --g
kstrto*() functions return proper error code.
Do propogate it to the user.
Signed-off-by: Andy Shevchenko
---
drivers/staging/fbtft/fbtft-sysfs.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/staging/fbtft/fbtft-sysfs.c
b/drivers/staging/fbtft/fbtft-sysfs.c
i
First of all, fbtft in current state doesn't allow to override GPIOs to be
optional, like "reset" one. It might be a bug somewhere, but rather out of
scope of this fix.
Second, not all GPIOs available on the board would be SoC based, some of them
might sit on I2C GPIO expanders, for example, on In
Fall back to usual allocation method if DMA coherent allocation fails.
SPI framework will map and use DMA mapped memory when possible.
Signed-off-by: Andy Shevchenko
---
drivers/staging/fbtft/fbtft-core.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/fbtf
Usually it's not consumer's business to override resources passed from
provider, in particularly DMA coherent mask.
Signed-off-by: Andy Shevchenko
---
drivers/staging/fbtft/fbtft-core.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/staging/fbtft/fbtft-core.c
b/drivers/staging/fbtft
This series enables 64x48 OLED display and fixes the driver to work with DMA
enabled SPI properly.
Has been tested on Intel Edison board with Adafruit 2'8" and SSD1306 64x48
(Sparkfun for Intel Edison) OLED displays at their maximum speed (25MHz and
10MHz).
Andy Shevchenko (6):
staging: fbtft:
On Mon, 2017-01-02 at 13:35 +0200, Andy Shevchenko wrote:
> This series enables 64x48 OLED display and fixes the driver to work
> with DMA
> enabled SPI properly.
>
> Has been tested on Intel Edison board with Adafruit 2'8" and SSD1306
> 64x48
> (Sparkfun for Intel Edison) OLED displays at their m
Hi Richard,
On Mon, Jan 2, 2017 at 5:01 PM, Richard Cochran
wrote:
> On Mon, Jan 02, 2017 at 09:36:10AM +, Rafal Ozieblo wrote:
>> According Cadence Hardware team:
>> "It is just that some customers prefer to have the time in the descriptors
>> as that is provided per frame.
>> The registers
Hi Jose Miguel Abreu,
Thanks for the review
Sorry for the delay in the reply please see comments inline...
> > if (chan->has_sg) {
> > dma_ctrl_write(chan, XILINX_DMA_REG_TAILDESC,
> > tail_segment->phys);
> > + list_splice
On Wed, Dec 21, 2016 at 09:45:33AM +0100, Michał Kępień wrote:
> Add a new "global" (i.e. not per-rfkill device) LED trigger, rfkill-any,
> which may be useful on laptops with a single "radio LED" and multiple
> radio transmitters. The trigger is meant to turn a LED on whenever
> there is at least
On 06/12/2016 at 13:05:33 +0100, Richard Genoud wrote :
> When using RS485 in half duplex, RX should be enabled when TX is
> finished, and stopped when TX starts.
>
> Before commit 0058f0871efe7b01c6 ("tty/serial: atmel: fix RS485 half
> duplex with DMA"), RX was not disabled in atmel_start_tx() i
Use the syscon lookup-by-phandle helper so that the reference taken by
of_parse_phandle() is released when done with the node.
Fixes: 5ed7414062e7 ("net: stmmac: Add OXNAS Glue Driver")
Signed-off-by: Johan Hovold
---
drivers/net/ethernet/stmicro/stmmac/dwmac-oxnas.c | 10 ++
1 file chan
Make sure to deregister and free any fixed-link phy registered during
probe on probe errors and on driver unbind by calling the new glue
helper function.
For driver unbind, use the generic stmmac-platform remove implementation
and add an exit callback to disable the clock.
Fixes: 5ed7414062e7 ("n
Now that we have an exit callback in place, add init as well and get rid
of the custom PM callbacks in favour of the generic ones.
Signed-off-by: Johan Hovold
---
drivers/net/ethernet/stmicro/stmmac/dwmac-oxnas.c | 38 +++
1 file changed, 5 insertions(+), 33 deletions(-)
dif
These patches fixes of-node and fixed-phydev leaks in the recently added
dwmac-oxnas driver, and ultimately switches over to using the generic pm
implementation as the required callbacks are now in place.
Note that this series has only been compile tested.
Johan
Johan Hovold (3):
net: stmmac:
On 01/01/2017 04:45 AM, Rafael J. Wysocki wrote:
On Fri, Dec 30, 2016 at 11:50 AM, Hanjun Guo wrote:
[...]
So how about just add the code as below?
Works for me.
OK, will send out the updated patch set soon.
diff --git a/drivers/acpi/glue.c b/drivers/acpi/glue.c
index 11e63dd..37a8dfe
On 30.12.2016 07:58, Hoegeun Kwon wrote:
> Purpose of this patch is add support for S6E3HA2 AMOLED panel on
> the TM2 board. The first patch adds support for S6E3HA2 panel
> device tree document and driver, the second patch add support for
> S6E3HA2 panel device tree.
>
> Changes for V3:
>
> - In t
On Thu, 22 Dec 2016, Nicolas Iooss wrote:
> Structure ishtp_device contains a logging function, print_log(), which
> formats some of its parameters using vsnprintf(). Add a __printf
> attribute to this function field (and to ish_event_tracer()) in order to
> detect at compile time issues related t
Hello Lukasz,
On 12/27/2016 01:19 AM, Lukasz Majewski wrote:
> Signed-off-by: Lukasz Majewski
please add a commit message with a short description of the change.
Also change subject line to "ARM: dts: imx6q: Add mccmon6 board support".
> ---
> MCCMON6 board support depends on following patches
> I'm not super happy with this conditional locking - can't we instead
> defer the necessary work to a workqueue, or so, for purposes of the
> LED?
Actually, since you can sleep in here, and do various other things like
scheduling etc. this can't even be correct as is - one thread might be
in the
Hi
On Mon, Jan 2, 2017 at 11:41 AM, Rainer Hochecker wrote:
> From: Rainer Hochecker
>
> Add fourcc codes for 16bit planes. Required by mesa for
> eglCreateImageKHR to access P010 surfaces created by vaapi.
>
> Signed-off-by: Rainer Hochecker
> ---
> include/uapi/drm/drm_fourcc.h | 6 ++
>
On Sat, Dec 17, 2016 at 12:29:50PM +0100, Sebastian Andrzej Siewior wrote:
> A new version is understandable. But why is an old version required?
> One thing is an enterprise distro that is "current" or "supported" and still
> stuck with gcc 4.1 because that is the version they decided to include i
Hi Linus,
please pull from the 'for-linus' branch of
git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux.git for-linus
to receive the following updates:
Two bug fixes for 4.10-rc3
Heiko Carstens (1):
s390/kbuild: enable modversions for symbols exported from asm
Martin Schwi
Changed function calls of resource allocation to new API. Changed way
of setting DMA mask. Removed unnecessary sanity check.
This patch is sent in regard to recently applied patch
Commit 83a77e9ec4150ee4acc635638f7dedd9da523a26
net: macb: Added PCI wrapper for Platform Driver.
Signed-off-by: Barto
If the driver is built as a module, autoload won't work because the module
alias information is not filled. So user-space can't match the registered
device with the corresponding module.
Export the module alias information using the MODULE_DEVICE_TABLE() macro.
Before this patch:
$ modinfo drive
On Mon, 2017-01-02 at 13:21 +0100, Johannes Berg wrote:
> > I'm not super happy with this conditional locking - can't we
> > instead
> > defer the necessary work to a workqueue, or so, for purposes of the
> > LED?
>
> Actually, since you can sleep in here, and do various other things
> like schedu
On 01/02/2017 10:51 AM, Pali Rohár wrote:
> On Monday 02 January 2017 10:34:34 Peter Ujfalusi wrote:
>> On 01/02/2017 12:36 AM, Pavel Machek wrote:
>>> Are there multi-button headsets compatible with N900?
>>
>> Not sure if n900 is capable of handling ECI communication, n9 was. In n9
>> the PMIC/
The aim of this patch is to optimize a search of an extent while
doing right shift using binsearch.
Cc: Namjae Jeon
Cc: "Theodore Ts'o"
Cc: Andreas Dilger
Cc: linux-e...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
fs/ext4/extents.c | 13 +
1 file changed, 9 insertions(+),
Inside ext4_ext_shift_extents() function ext4_find_extent() is called
without EXT4_EX_NOCACHE flag, which should prevent cache population.
This leads to oudated offsets in the extents tree and wrong blocks
afterwards.
Patch fixes the problem providing EXT4_EX_NOCACHE flag for each
ext4_find_exten
Hi all.
For couple of days I've played with inserting and collapsing range using
fallocate and have found two nasty bugs:
1. On right shift (insert range) start block is not included in the range
and hole appears at the wrong offset. The bug can be easily reproduced by
the following test:
While doing 'insert range' start block should be also shifted right.
The bug can be easily reproduced by the following test:
ptr = malloc(4096);
assert(ptr);
fd = open("./ext4.file", O_CREAT | O_TRUNC | O_RDWR, 0600);
assert(fd >= 0);
rc = fallocate(fd, 0, 0, 8192);
asser
On Monday 02 January 2017 14:53:44 Peter Ujfalusi wrote:
> On 01/02/2017 10:51 AM, Pali Rohár wrote:
> > On Monday 02 January 2017 10:34:34 Peter Ujfalusi wrote:
> >> On 01/02/2017 12:36 AM, Pavel Machek wrote:
> >>> Are there multi-button headsets compatible with N900?
> >>
> >> Not sure if n900 i
Hi,
here are the patches that remain to be merged in this series.
Since v13, I have added a patch that makes open() block until the first
CRC comes. This is because otherwise, userspace would need to guess how
much time this particular HW takes to become ready to generate frame
CRCs. This patch c
There's no reason any more for callers of this function to take the lock
themselves, so just move the lock to the function to avoid confusion and
bugs when more callers are contributed.
Signed-off-by: Tomeu Vizoso
Reviewed-by: Emil Velikov
Reviewed-by: Robert Foss
---
drivers/gpu/drm/drm_debu
Use drm_accurate_vblank_count so we have the full 32 bit to represent
the frame counter and userspace has a simpler way of knowing when the
counter wraps around.
Signed-off-by: Tomeu Vizoso
Reviewed-by: Emil Velikov
Reviewed-by: Robert Foss
---
drivers/gpu/drm/i915/i915_irq.c | 6 +++---
1 fi
Don't return from the open() call on the crc/data file until the HW has
produced a first frame, as there's great variability in when the HW is
able to do that and userspace shouldn't have to guess when this specific
HW is ready to start giving frame CRCs.
Signed-off-by: Tomeu Vizoso
---
drivers
The core provides now an ABI to userspace for generation of frame CRCs,
so implement the ->set_crc_source() callback and reuse as much code as
possible with the previous ABI implementation.
When handling the pageflip interrupt, we skip 1 or 2 frames depending on
the HW because they contain wrong v
If the driver is built as a module, autoload won't work because the module
alias information is not filled. So user-space can't match the registered
device with the corresponding module.
Export the module alias information using the MODULE_DEVICE_TABLE() macro.
Before this patch:
$ modinfo drive
On 01/02/2017 07:07 PM, Sakari Ailus wrote:
Hi,
On Mon, Jan 02, 2017 at 06:53:16PM +0800, ayaka wrote:
On 01/02/2017 05:10 PM, Sakari Ailus wrote:
Hi Randy,
Thanks for the patch.
On Mon, Jan 02, 2017 at 04:50:04PM +0800, Randy Li wrote:
The formats added by this patch are:
V4L2_P
From: Yazen Ghannam
Currently, we assume that a system has multiple last level caches only
if there are multiple nodes, and that the cpu_llc_id is equal to the
node_id. This no longer applies since Fam17h can have multiple last
level caches within a node.
So group the cpu_llc_id assignment by to
If the driver is built as a module, autoload won't work because the module
alias information is not filled. So user-space can't match the registered
device with the corresponding module.
Export the module alias information using the MODULE_DEVICE_TABLE() macro.
Before this patch:
$ modinfo drive
From: Jeremy Gebben
Allow the creation of privileged mode mappings, for stage 1 only.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Acked-by: Will Deacon
Signed-off-by: Jeremy Gebben
---
drivers/iommu/io-pgtable-arm.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
This series is a resend of the V5 that Mitch sent sometime back [2]
All the patches are the same and i have just rebased. Redid patch [3],
as it does not apply in this code base. Added a couple of more patches
[4], [5] from Robin for adding the privileged attributes to armv7s format
and arm-smmuv3
From: Mitchel Humpherys
The newly added DMA_ATTR_PRIVILEGED is useful for creating mappings that
are only accessible to privileged DMA engines. Implement it in
dma-iommu.c so that the ARM64 DMA IOMMU mapper can make use of it.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Acked-by: Will D
From: Mitchel Humpherys
The PL330 is hard-wired such that instruction fetches on both the
manager and channel threads go out onto the bus with the "privileged"
bit set. This can become troublesome once there is an IOMMU or other
form of memory protection downstream, since those will typically be
The newly added DMA_ATTR_PRIVILEGED is useful for creating mappings that
are only accessible to privileged DMA engines. Adding it to the
arm dma-mapping.c so that the ARM32 DMA IOMMU mapper can make use of it.
Signed-off-by: Sricharan R
---
arch/arm/mm/dma-mapping.c | 60 +++
From: Mitchel Humpherys
Add the IOMMU_PRIV attribute, which is used to indicate privileged
mappings.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Signed-off-by: Mitchel Humpherys
Acked-by: Will Deacon
---
include/linux/iommu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include
Currently the driver sets all the device transactions privileges
to UNPRIVILEGED, but there are cases where the iommu masters wants
to isolate privileged supervisor and unprivileged user.
So don't override the privileged setting to unprivileged, instead
set it to default as incoming and let it be c
From: Robin Murphy
This reverts commit df5e1a0f2a2d779ad467a691203bcbc74d75690e.
Now that proper privileged mappings can be requested via IOMMU_PRIV,
unconditionally overriding the incoming PRIVCFG becomes the wrong thing
to do, so stop it.
Signed-off-by: Robin Murphy
---
drivers/iommu/arm-sm
From: Mitchel Humpherys
This patch adds the DMA_ATTR_PRIVILEGED attribute to the DMA-mapping
subsystem.
Some advanced peripherals such as remote processors and GPUs perform
accesses to DMA buffers in both privileged "supervisor" and unprivileged
"user" modes. This attribute is used to indicate
From: Robin Murphy
The short-descriptor format also allows privileged-only mappings, so
let's wire it up.
Signed-off-by: Robin Murphy
Tested-by: Sricharan R
---
drivers/iommu/io-pgtable-arm-v7s.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/io-pgtable
在 2016年12月31日 00:11, ayaka 写道:
BTW, Caesar have you ever met this at RK3288 at booting time?
[8.430582] thermal thermal_zone1: critical temperature reached(125
C),shutting down
[8.439038] thermal thermal_zone2: critical temperature reached(125
C),shutting down
[8.456344] thermal th
Hi Dave,
first pull request for 4.11. The tree is based on 4.9 but that shouldn't
be a problem, at least my test pull to net-next worked ok. I'll fast
forward my trees after you have pulled this.
Please let me know if you have any problems.
Kalle
The following changes since commit adc176c54722
This patch set adds support for TPM spaces that provide a context
for isolating and swapping transient objects. This patch set does
not yet include support for isolating policy and HMAC sessions but
it is trivial to add once the basic approach is settled (and that's
why I created an RFC patch set).
Signed-off-by: Jarkko Sakkinen
---
drivers/char/tpm/tpm.h | 2 ++
drivers/char/tpm/tpm2-cmd.c | 47 ++---
2 files changed, 25 insertions(+), 24 deletions(-)
diff --git a/drivers/char/tpm/tpm.h b/drivers/char/tpm/tpm.h
index ed21c2c..fb02b57 100644
--
The driver only has runtime but no build time dependency with QCOM_SMD &&
QCOM_WCNSS_CTRL. So it can be built for testing purposes if COMPILE_TEST
option is enabled.
This is useful to have more build coverage and make sure that the driver
is not affected by changes that could cause build regressio
On Fri, Dec 23, 2016 at 08:20:26AM +0100, Greg Kroah-Hartman wrote:
> On Fri, Dec 23, 2016 at 12:21:48PM +0900, Masahiro Yamada wrote:
> > Leave the way of zero-out to the compiler's decision; the compiler
> > may know a more optimized way than calling memset().
>
> But no, it doesn't, it will lea
Hi Robin,
>>
>>
>>
>>> return prot | IOMMU_READ | IOMMU_WRITE;
>>
>> ...and applying against -next now also needs this hunk:
>>
>> @@ -639,7 +639,7 @@ dma_addr_t iommu_dma_map_resource(struct device
>> *dev, phys_addr_t phys,
>> size_t size, en
Added a ioctl for creating a TPM space. The space is isolated from the
other users of the TPM. Only a process holding the file with the handle
can access the objects and only objects that are created through that
file handle can be accessed.
Signed-off-by: Jarkko Sakkinen
---
drivers/char/tpm/Ma
Check for every TPM 2.0 command that the command code is supported and
the command buffer has at least the length that can contain the header
and the handle area.
Signed-off-by: Jarkko Sakkinen
---
drivers/char/tpm/tpm-interface.c | 32 +-
drivers/char/tpm/tpm.h
Since there is only one thread using TPM chip at a time to transmit data
we can migrate struct tpm_buf to struct tpm_chip. This makes the use of
it more fail safe as the buffer is allocated from heap when the device
is created and not for every transaction.
This is needed characteristic for the re
Hello Uwe,
>> Is it possible to make it more obvious by doing:
>>
>> status = read_from_status_register() &
>> read_from_interrupt_enable_register();
>>
>> at a single place?
Contrary to what I said previously I have to keep possible_status
variable as for one irq enabled we allow several
Cleanup iort_match_node_callback() a little bit to reduce
some lines of code, aslo fix the indentation in iort_scan_node().
Signed-off-by: Hanjun Guo
Tested-by: Majun
Tested-by: Xinwei Kong
Cc: Lorenzo Pieralisi
Cc: Marc Zyngier
Cc: Tomasz Nowicki
---
drivers/acpi/arm64/iort.c | 10 +++-
v5 -> v6:
- Call acpi_configure_pmsi_domain() for platform devices in
acpi_platform_notify() as it's cleaner (suggested by Rafael)
- Remove the "u8 type" for iort_id_map() because it's unused
- Rebase on top of 4.10-rc2
- Collect test and review tags
v4 ->
The head file is strictly in alphabetic order now, so let's
be the rule breaker. As acpi_iort.h includes acpi.h so remove
the duplidate acpi.h inclusion as well.
Signed-off-by: Hanjun Guo
Tested-by: Majun
Tested-by: Xinwei Kong
Cc: Marc Zyngier
Cc: Tomasz Nowicki
---
drivers/irqchip/irq-gic-
We are missing req_id's comment for iort_dev_find_its_id(),
add it back.
Signed-off-by: Hanjun Guo
Tested-by: Majun
Tested-by: Xinwei Kong
Cc: Lorenzo Pieralisi
Cc: Tomasz Nowicki
---
drivers/acpi/arm64/iort.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/acpi/arm64/iort.c b/dr
With the platform msi domain created, we can set up the msi domain
for a platform device when it's probed.
In order to do that, we need to get the domain that the platform
device connecting to, so the iort_get_platform_device_domain() is
introduced to retrieve the domain from iort.
After the doma
With the introduction of its_pmsi_init_one(), we can add some code
on top for ACPI support of platform MSI.
We are scanning the MADT table to get the ITS entry(ies), then use
the information to create the platform msi domain for devices connect
to it, just like the PCI MSI for ITS did.
Signed-off
Introduce its_pmsi_init_one() to refactor the code to isolate
ACPI&DT common code to prepare for ACPI later.
Signed-off-by: Hanjun Guo
Tested-by: Sinan Kaya
Tested-by: Majun
Tested-by: Xinwei Kong
Cc: Marc Zyngier
Cc: Tomasz Nowicki
Cc: Thomas Gleixner
---
drivers/irqchip/irq-gic-v3-its-pl
For devices connecting to ITS, it needs dev id to identify
itself, and this dev id is represented in the IORT table in
named componant node [1] for platform devices, so in this
patch we will scan the IORT to retrieve device's dev id.
Introduce iort_pmsi_get_dev_id() with pointer dev passed
in for
iort_node_get_id() for now only support NC(named componant)->SMMU
or NC->ITS cases, we also have other device topology such NC->
SMMU->ITS, so rework iort_node_get_id() for those cases.
Signed-off-by: Hanjun Guo
Tested-by: Majun
Tested-by: Xinwei Kong
Cc: Lorenzo Pieralisi
---
drivers/acpi/ar
From: Kefeng Wang
Module owner will be set by driver core, so drop it.
Signed-off-by: Kefeng Wang
Signed-off-by: Hanjun Guo
Reviewed-by: Majun
Tested-by: Majun
Tested-by: Xinwei Kong
Cc: Marc Zyngier
Cc: Thomas Gleixner
Cc: Ma Jun
---
drivers/irqchip/irq-mbigen.c | 1 -
1 file changed,
With the preparation of platform msi support and interrupt producer
in DSDT, we can add mbigen ACPI support now.
We are using _PRS methd to indicate number of irq pins instead
of num_pins in DT to avoid _DSD usage in this case.
For mbi-gen,
Device(MBI0) {
Name(_HID, "HISI0152")
With the platform msi domain created for ITS, irqchip such as
mbi-gen connecting ITS, which needs ctreate its own irqdomain.
Fortunately with the platform msi support upstreamed by Marc,
we just need to add minor code to make it run properly.
platform_msi_create_device_domain() is almost ready fo
From: Kefeng Wang
Introduce mbigen_of_create_domain() to consolidate OF related
code and prepare for ACPI later, no funtional change.
Signed-off-by: Kefeng Wang
Signed-off-by: Hanjun Guo
Reviewed-by: Majun
Tested-by: Majun
Tested-by: Xinwei Kong
Cc: Marc Zyngier
Cc: Thomas Gleixner
---
d
Adding ACPI support for platform MSI, we need to retrieve the
dev id in ACPI way instead of device tree, we already have
a well formed function its_pmsi_prepare() to get the dev id
but it's OF dependent, so collect OF related code and put them
into a single function to make its_pmsi_prepare() more
iort_node_get_id() has two output, one is the mapped ids,
the other is the referenced parent node which is returned
from the function.
For now we need a API just return its parent node for
single mapping, so just update this function slightly then
reuse it later.
Signed-off-by: Hanjun Guo
Tested
Hi Kedar,
On 02-01-2017 11:46, Appana Durga Kedareswara Rao wrote:
> Hi Jose Miguel Abreu,
>
> Thanks for the review
> Sorry for the delay in the reply please see comments inline...
>
>>
[snip]
>> What if we reach here and j < num_frms? It can happen because if
>> the pending l
On 22.12.2016 18:27, Sören Brinkmann wrote:
> On Thu, 2016-12-22 at 09:19:25 -0800, m...@kernel.org wrote:
>> From: Moritz Fischer
>>
>> The Zynq Ultrascale MP uses version 1.4 of the Cadence IP core
>> which fixes some silicon bugs that needed software workarounds
>> in Version 1.0 that was used
101 - 200 of 605 matches
Mail list logo
