On Tue, 4 Apr 2017, Andy Shevchenko wrote:
> On Tue, Apr 4, 2017 at 8:59 PM, Tom Zanussi
> wrote:
> > On Tue, 2017-04-04 at 20:08 +0300, Andy Shevchenko wrote:
> >> On Tue, Apr 4, 2017 at 7:59 PM, Tom Zanussi
> >> wrote:
> >> > On Tue,
On Thu, Mar 30, 2017 at 02:35:32PM -0400, Jeff Layton wrote:
> On Thu, 2017-03-30 at 12:12 -0400, J. Bruce Fields wrote:
> > On Thu, Mar 30, 2017 at 07:11:48AM -0400, Jeff Layton wrote:
> > > On Thu, 2017-03-30 at 08:47 +0200, Jan Kara wrote:
> > > > Because if above is acceptable we could make
Apologies, unrelated to MBA. Resent later with a changed subject line.
On Tue, Apr 4, 2017 at 1:50 PM, Shivappa Vikas wrote:
>
>
>
> On Mon, 3 Apr 2017, Tracy Smith wrote:
>
>> Hi All,
>>
>> No JTAG available and need to understand why Linux 4.8.3 doesn't boot on a
>>
On Tue, 4 Apr 2017, Alan Cox wrote:
> > we're down to 5.6K. At which point there's only a raw device
> > interface
> > to serial hardware.
>
> Which if you did a simple plain chardev without trying to fake the
> rather out of date uart layer would come down way further still.
Oh absolutely. I
On 04/04/2017 06:25 AM, Andy Shevchenko wrote:
Please, STOP top-posting.
On Mon, Apr 3, 2017 at 4:51 AM, Sathyanarayanan Kuppuswamy Natarajan
wrote:
Yes, just applying this patch will fix the existing offset issue.
Then the question how it was tested in both cases
On Tue, Apr 04, 2017 at 06:44:53PM +0200, Michal Hocko wrote:
Thanks for your testing! This is highly appreciated.
Can I assume your Tested-by?
Of course! Not quite done, though. I think I found another edge case.
You get an oops when removing all of a node's memory:
__nr_to_section
On Tue, Apr 04, 2017 at 02:15:13PM +0100, John Keeping wrote:
> Hi Sean,
>
> On Sun, 12 Mar 2017 07:06:59 -0500, Rob Herring wrote:
>
> > On Fri, Mar 03, 2017 at 11:39:45AM +, John Keeping wrote:
> > > This reset is required in order to fully reset the internal state of the
> > > MIPI
The A10 SoC has an on-board CAN controller.
This patch adds the device node.
This patch is adapted from the description in
Documentation/devicetree/bindings/net/can/sun4i_can.txt
Signed-off-by: Patrick Menschel
---
arch/arm/boot/dts/sun4i-a10.dtsi | 8
1 file
On Tue, Apr 4, 2017 at 7:50 AM, Andrey Konovalov wrote:
>
> Hi,
>
> I've got the following error report while fuzzing the kernel with syzkaller.
>
> On commit a71c9a1c779f2499fb2afc0553e543f18aff6edf (4.11-rc5).
>
> Unfortunately it's not reproducible.
>
>
Currently if some one try to advance bvec beyond it's size we simply
dump WARN_ONCE and continue to iterate beyond bvec array boundaries.
This simply means that we endup dereferencing/corrupting random memory
region.
Sane reaction would be to propagate error back to calling context
But
Signed-off-by: Dmitry Monakhov
---
block/t10-pi.c | 9 +++--
drivers/scsi/lpfc/lpfc_scsi.c| 5 +++--
drivers/scsi/qla2xxx/qla_isr.c | 8
drivers/target/target_core_sbc.c | 2 +-
include/linux/t10-pi.h | 2 ++
5 files changed,
Some ->bi_end_io handlers (for example: pi_verify or decrypt handlers)
need to know original data vector, but after bio traverse io-stack it may
be advanced, splited and relocated many times so it is hard to guess
original iterator. Let's add 'bi_done' conter which accounts number
of bytes
Replace symbolic permissions S_IRUSR and S_IWUSR for their octal
counterparts
Signed-off-by: Thomas Jespersen
---
drivers/staging/unisys/visornic/visornic_main.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
> On 03/04/17 14:42, Daniel Kiper wrote:
> > On Fri, Mar 31, 2017 at 12:14:38PM +0200, Juergen Gross wrote:
> >> For kdump to work correctly it needs the physical address of
> >> vmcoreinfo_note. When running as dom0 this means the virtual address
> >> has to be translated to the related machine
On Wed, Mar 29, 2017 at 06:57:06AM +0100, Al Viro wrote:
> I hope that infrastructure part is stable enough to put it into never-rebased
> state. Some of per-architecture branches might be even done right; however,
> most of them got no testing whatsoever, so any help with testing (as well
> as
On Tue, Apr 04, 2017 at 10:57:28PM +0530, Srikar Dronamraju wrote:
> When performing load balancing, numabalancing only looks at
> task->cpus_allowed to see if the task can run on the target cpu. If
> isolcpus kernel parameter is set, then isolated cpus will not be part of
> mask
On Tue, Apr 4, 2017 at 2:09 PM, Laura Abbott wrote:
> virt_addr_valid was previously insufficient to validate if virt_to_page
> could be called on an address on arm64. This has since been fixed up
> so there is no need for the extra check. Drop it.
>
> Signed-off-by: Laura
virt_addr_valid was previously insufficient to validate if virt_to_page
could be called on an address on arm64. This has since been fixed up
so there is no need for the extra check. Drop it.
Signed-off-by: Laura Abbott
---
I've given this some testing on my machine and
In commit 4b53a3412d66 ("sched/core: Remove the tsk_nr_cpus_allowed()
wrapper") the tsk_nr_cpus_allowed() wrapper was removed. There was not
much difference in !RT but in RT we used this to implement
migrate_disable(). Within a migrate_disable() section the CPU mask is
restricted to single CPU
On Thu, Mar 30, 2017 at 03:46:06AM +0800, Icenowy Zheng wrote:
> As we are going to add support for the Allwinner DE2 Mixer in sun4i-drm
> driver, we will finally have two types of layer.
>
> Abstract the layer type to void * and a ops struct, which contains the
> only function used by crtc --
On Sat, Apr 01, 2017 at 07:35:26PM +0800, Jeffy Chen wrote:
> We should not cleanup iommu before cleanup other resources.
>
> Reorder unload sequence, follow exynos drm.
This doesn't match the cleanup sequence in rockchip_drm_bind. Also make sure
that you're unwinding the setup sequence when you
On Mon, Mar 27, 2017 at 09:54:38AM +0200, Maxime Ripard wrote:
> Hi,
>
> Thanks a lot for working on this.
>
> On Sun, Mar 26, 2017 at 08:20:16PM +0300, Priit Laes wrote:
> > Introduce a clock controller driver for sun4i A10 and sun7i A20
> > series SoCs.
> >
> > Signed-off-by: Priit Laes
On Tue, Apr 4, 2017 at 5:21 AM, Richard Guy Briggs wrote:
> Tracefs or debugfs were causing hundreds to thousands of null PATH
> records to be associated with the init_module and finit_module SYSCALL
> records on a few modules when the following rule was in place for
> startup:
>
On 04/04/2017 09:25 AM, adam.manzana...@wdc.com wrote:
> From: Adam Manzanares
>
> In 4.10 I introduced a patch that associates the ioc priority with
> each request in the block layer. This work was done in the single queue
> block layer code. This patch unifies ioc
On 04/04/2017 11:34 AM, Marc Kleine-Budde wrote:
> On 03/24/2017 06:20 PM, Akshay Bhat wrote:
>> Hi Marc,
>>
>> On 03/17/2017 05:10 PM, Akshay Bhat wrote:
>>> This patch adds support for the Holt HI-311x CAN controller. The HI311x
>>> CAN controller is capable of transmitting and receiving
On Tue, 2017-04-04 at 21:00 +0300, Michael S. Tsirkin wrote:
> And just making double sure, the 1st version that has the issue
> is 5c34d002dcc7, isn't it? I'm asking because subject says so
> but then goes on to list subject from another commit.
> This one is:
> > virtio_pci: remove struct
On Thu, Mar 30, 2017 at 10:41:37AM +1100, Dave Chinner wrote:
> On Wed, Mar 29, 2017 at 01:54:31PM -0400, Jeff Layton wrote:
> > On Wed, 2017-03-29 at 13:15 +0200, Jan Kara wrote:
> > > On Tue 21-03-17 14:46:53, Jeff Layton wrote:
> > > > On Tue, 2017-03-21 at 14:30 -0400, J. Bruce Fields wrote:
>
On Tue, 4 Apr 2017, Michal Hocko wrote:
> Yes, but we do not have to blow the kernel, right? Why cannot we simply
> leak that memory?
Because it is a serious bug to attempt to free a non slab object using
slab operations. This is often the result of memory corruption, coding
errs etc. The system
On Tue, Apr 04, 2017 at 07:54:33PM +, KY Srinivasan wrote:
> > -Original Message-
> > From: Bjorn Helgaas [mailto:helg...@kernel.org]
> > Sent: Tuesday, April 4, 2017 12:04 PM
> > To: KY Srinivasan
> > Cc: linux-...@vger.kernel.org; linux-kernel@vger.kernel.org;
>
On 03/31/2017 12:50 PM, fu@linaro.org wrote:
> This patchset:
> (1)Preparation for adding GTDT support in arm_arch_timer:
> 1. Introduce a MMIO CNTFRQ helper.
> 2. separate out device-tree code from arch_timer_detect_rate
> 3. remove arch_timer_detect_rate use
On 04/04/2017 08:33 PM, Aaron Conole wrote:
The eBPF framework is used for more than just socket level filtering. It
can also provide tracing, and even change the way packets coming into the
system look. Most of the eBPF callable symbols are available to non-gpl
programs, and this includes
On 3-4-2017 23:39, Tobin C. Harding wrote:
> On Mon, Apr 03, 2017 at 12:15:15PM +0200, Arend Van Spriel wrote:
>> seems we are missing out again?
>
> Sorry, I don't understand what this comment means?
My bad. I had to reset my email account in thunderbird and now it needs
to learn anew what is
On Tue, Apr 04, 2017 at 08:59:11PM +0300, Andy Shevchenko wrote:
> On Tue, 2017-04-04 at 10:31 -0700, Dmitry Torokhov wrote:
> > On Tue, Apr 04, 2017 at 07:11:17PM +0300, Andy Shevchenko wrote:
> > > On Wed, 2017-03-29 at 18:04 +0300, Andy Shevchenko wrote:
> > > > On Wed, 2017-03-29 at 00:12
On Tue, Apr 04, 2017 at 01:53:15PM +0200, Jason A. Donenfeld wrote:
> Herbert applied this to his tree. It's probably a good stable
> candidate, since it's a two line change to fix a race condition.
>
> On Fri, Mar 24, 2017 at 3:16 PM, Herbert Xu
> wrote:
> > Jason
On 04/04/2017 10:33 AM, Santosh Shilimkar wrote:
> On 4/3/2017 9:44 AM, santosh.shilim...@oracle.com wrote:
>> Hi Franklin,
>>
>> On 3/30/17 8:29 AM, Franklin S Cooper Jr wrote:
>>> This patchset adds support for new K2G Industrial Communication Engine
>>> evm. For now only a bare minimal dts
On 04/04/17 10:47, Thomas Garnier wrote:
> diff --git a/arch/x86/include/asm/pgtable_64_types.h
> b/arch/x86/include/asm/pgtable_64_types.h
> index 516593e66bd6..12fa851c7fa8 100644
> --- a/arch/x86/include/asm/pgtable_64_types.h
> +++ b/arch/x86/include/asm/pgtable_64_types.h
> @@ -78,4 +78,15
As we added USB0 route auto switching support for A64, add related
device tree parts to the A64 DTSI file (EHCI0/OHCI0 controllers and the
pmu0 memory area for PHY).
Signed-off-by: Icenowy Zheng
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 24
1
The upper USB port of Pine64 board is connected to the SoC's USB0 port,
which can now switch from the MUSB controller to the EHCI/OHCI pair.
Enable the EHCI/OHCI pair in the Pine64 device tree.
Signed-off-by: Icenowy Zheng
---
Hi Mark,
Mark Rutland writes:
> Hi Punit,
>
> On Thu, Mar 30, 2017 at 05:38:47PM +0100, Punit Agrawal wrote:
>> huge_pte_offset() does not correctly handle poisoned or migration page
>> table entries.
>
> What exactly does it do wrong?
>
> Judging by the patch, we return
On Tue, Apr 4, 2017 at 12:38 AM, Felipe Balbi
wrote:
>
> Hi,
>
> Minas Harutyunyan writes:
>>> We've noticed that when using usb ethernet adapters on HiKey, we
>>> occasionally see errors like:
>>>
>>> dwc2
On Tue, Apr 04, 2017 at 07:54:36PM +0200, Mike Galbraith wrote:
> On Tue, 2017-04-04 at 19:40 +0200, Mike Galbraith wrote:
> > On Tue, 2017-04-04 at 18:30 +0300, Michael S. Tsirkin wrote:
> >
> > > I couldn't reproduce it - let's make sure we are using the
> > > same tree. Could you pls try
> > >
On Fri, Mar 24, 2017 at 11:06:40AM -0700, k...@exchange.microsoft.com wrote:
> From: K. Y. Srinivasan
>
> Some miscellaneous fixes.
>
> K. Y. Srinivasan (2):
> pci-hyperv: Fix a bug in specifying CPU affinity
> pci-hyperv: Fix an atomic bug
>
>
Hello,
This series add OF device ID tables to ASoC I2C drivers whose devices are
either used in Device Tree source files or are listed in binding docs as
a compatible string.
That's done because the plan is to change the I2C core to report proper OF
modaliases instead of always reporting a
The driver doesn't have a struct of_device_id table but supported devices
are registered via Device Trees. This is working on the assumption that a
I2C device registered via OF will always match a legacy I2C device ID and
that the MODALIAS reported will always be of the form i2c:.
But this could
The driver doesn't have a struct of_device_id table but supported devices
are registered via Device Trees. This is working on the assumption that a
I2C device registered via OF will always match a legacy I2C device ID and
that the MODALIAS reported will always be of the form i2c:.
But this could
The driver doesn't have a struct of_device_id table but supported devices
are registered via Device Trees. This is working on the assumption that a
I2C device registered via OF will always match a legacy I2C device ID and
that the MODALIAS reported will always be of the form i2c:.
But this could
The driver doesn't have a struct of_device_id table but supported devices
are registered via Device Trees. This is working on the assumption that a
I2C device registered via OF will always match a legacy I2C device ID and
that the MODALIAS reported will always be of the form i2c:.
But this could
The driver doesn't have a struct of_device_id table but supported devices
are registered via Device Trees. This is working on the assumption that a
I2C device registered via OF will always match a legacy I2C device ID and
that the MODALIAS reported will always be of the form i2c:.
But this could
The driver doesn't have a struct of_device_id table but supported devices
are registered via Device Trees. This is working on the assumption that a
I2C device registered via OF will always match a legacy I2C device ID and
that the MODALIAS reported will always be of the form i2c:.
But this could
On Tue, 2017-04-04 at 21:04 +0300, Andy Shevchenko wrote:
> On Tue, Apr 4, 2017 at 8:59 PM, Tom Zanussi
> wrote:
> > On Tue, 2017-04-04 at 20:08 +0300, Andy Shevchenko wrote:
> >> On Tue, Apr 4, 2017 at 7:59 PM, Tom Zanussi
> >> wrote:
On Tue, 4 Apr 2017, Michal Hocko wrote:
> On Tue 04-04-17 14:13:06, Cristopher Lameter wrote:
> > On Tue, 4 Apr 2017, Michal Hocko wrote:
> >
> > > Yes, but we do not have to blow the kernel, right? Why cannot we simply
> > > leak that memory?
> >
> > Because it is a serious bug to attempt to
On 04/03/2017 11:27 AM, Rob Herring wrote:
> On Thu, Mar 30, 2017 at 10:29:07AM -0500, Franklin S Cooper Jr wrote:
>> Add barebones dts support for TI's K2G Industrial Communication Engine evm.
>> This dts allows the board to boot using a ram based filesystem.
>>
>> Signed-off-by: Franklin S
On Tue 04-04-17 14:58:06, Cristopher Lameter wrote:
> On Tue, 4 Apr 2017, Michal Hocko wrote:
>
> > On Tue 04-04-17 14:13:06, Cristopher Lameter wrote:
> > > On Tue, 4 Apr 2017, Michal Hocko wrote:
> > >
> > > > Yes, but we do not have to blow the kernel, right? Why cannot we simply
> > > > leak
On Tue, 4 Apr 2017, Tom Zanussi wrote:
> On Tue, 2017-04-04 at 21:04 +0300, Andy Shevchenko wrote:
> > I believe you did some research during time of that project…
> >
>
> Yes, as a matter of fact I did, and just found some notes I took at the
> time. I didn't dive into the code in detail -
On Tue, 2017-03-28 at 14:31 +0200, Greg Kroah-Hartman wrote:
[...]
> static void serial8250_io_resume(struct pci_dev *dev)
> {
> struct serial_private *priv = pci_get_drvdata(dev);
> + const struct pciserial_board *board;
>
> - if (priv)
> -
Some hardware RNGs provide a single register for obtaining random data.
Instead of signaling when new data is available, the reader must wait a
fixed amount of time between reads for new data to be generated.
timeriomem_rng implements this scheme with the period specified in
platform data or
On Tue, Apr 04, 2017 at 09:41:22PM +0200, Michal Hocko wrote:
On Tue 04-04-17 13:30:13, Reza Arbab wrote:
I think I found another edge case. You
get an oops when removing all of a node's memory:
__nr_to_section
__pfn_to_section
find_biggest_section_pfn
shrink_pgdat_span
__remove_zone
On 03/26, Leo Yan wrote:
> Almost low level functions from open firmware have used const to
> qualify device_node structures, so add const for device_node
> parameters in of_coresight related functions.
>
> Signed-off-by: Leo Yan
> ---
Reviewed-by: Stephen Boyd
On 04/04/17 10:47, Thomas Garnier wrote:
> Implement specific usage of verify_pre_usermode_state for user-mode
> returns for x86.
>
> Signed-off-by: Thomas Garnier
>
> + /*
> + * If address limit is not based on user-mode, jump to slow path for
> + *
Allwinner A64 SoC features a switchable PHY0 like the one in H3, which
can switch between a MUSB controller and a pair of OHCI/EHCI controller.
Enable PHY0 route auto switching for A64.
Signed-off-by: Icenowy Zheng
---
drivers/phy/phy-sun4i-usb.c | 1 +
1 file changed, 1
This patch set fix various problems spotted during T10/DIF integrity machinery
testing.
TOC:
## Fix various bugs in T10/DIF/DIX infrastructure
0001-bio-integrity-Do-not-allocate-integrity-context-for
0002-bio-integrity-bio_trim-should-truncate-integrity-vec
Currently ->verify_fn not woks at all because at the moment it is called
bio->bi_iter.bi_size == 0, so we do not iterate integrity bvecs at all.
In order to perform verification we need to know original data vector,
with new bvec rewind API this is trivial.
testcase:
Currently all integrity prep hooks are open-coded, and if prepare fails
we ignore it's code and fail bio with EIO. Let's return real error to
upper layer, so later caller may react accordingly.
In fact no one want to use bio_integrity_prep() w/o bio_integrity_enabled,
so it is reasonable to fold
Reviewed-by: Christoph Hellwig
Signed-off-by: Dmitry Monakhov
---
block/bio.c | 4
1 file changed, 4 insertions(+)
diff --git a/block/bio.c b/block/bio.c
index e75878f..fa84323 100644
--- a/block/bio.c
+++ b/block/bio.c
@@ -1907,6 +1907,10 @@ void
From: Kan Liang
Spurious NMIs will be observed when applying the following command.
while true ; do sudo perf record -b -a -e
"cpu/umask=0x01,event=0xcd,ldlat=0x80/pp,cpu/umask=0x03,event=0x0/,
cpu/umask=0x02,event=0x0/,cycles,branches,cache-misses,
On Tue, Apr 4, 2017 at 1:52 AM, Chao Peng wrote:
> Compressed kernel has its own drawback: decompressing takes time. Even
> though the time is short enough to ignore for most cases but for cases when
> time is critical decompressing time still matters.
>
> The patch
On Wed, Apr 05, 2017 at 01:29:19AM +0800, Xin Long wrote:
> On Tue, Apr 4, 2017 at 9:28 PM, Andrey Konovalov
> wrote:
> > Hi,
> >
> > I've got the following error report while fuzzing the kernel with syzkaller.
> >
> > On commit a71c9a1c779f2499fb2afc0553e543f18aff6edf
On Tue, Apr 4, 2017 at 10:52 AM, wrote:
> From: Kan Liang
>
> Spurious NMIs will be observed when applying the following command.
>while true ; do sudo perf record -b -a -e
>"cpu/umask=0x01,event=0xcd,ldlat=0x80/pp,cpu/umask=0x03,event=0x0/,
>
The eBPF framework is used for more than just socket level filtering. It
can also provide tracing, and even change the way packets coming into the
system look. Most of the eBPF callable symbols are available to non-gpl
programs, and this includes helper functions which modify packets. This
On Tue, Apr 04, 2017 at 11:27:07AM -0700, H. Peter Anvin wrote:
> Finally, I can't really believe I'm the only person for whom "Specific
> usage of verity_pre_usermode_state" is completely opaque.
No, you're not. I'm missing the usual layout of the commit message
"Problem is A, we need to do B,
If bio has no data, such as ones from blkdev_issue_flush(),
then we have nothing to protect.
This patch prevent bugon like follows:
kfree_debugcheck: out of range ptr ac1fa1d106742a5ah
kernel BUG at mm/slab.c:2773!
invalid opcode: [#1] SMP
Modules linked in: bcache
CPU: 0 PID: 4428 Comm:
The driver has an OF device ID table but the struct i2c_driver
.of_match_table field is not set.
Signed-off-by: Javier Martinez Canillas
---
sound/soc/codecs/cs53l30.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/sound/soc/codecs/cs53l30.c
On 3/30/17 4:39 PM, Julia Lawall wrote:
Is master on line 514 allocated with kmalloc, or the devm call on line
522?
Hi Julia,
Its allocated with the devm call on line 522. The kfree on line 514
wouldn't be necessary in that case - will remove.
Thanks for pointing that out.
Chris
On Tue 04-04-17 13:30:13, Reza Arbab wrote:
> On Tue, Apr 04, 2017 at 06:44:53PM +0200, Michal Hocko wrote:
> >Thanks for your testing! This is highly appreciated.
> >Can I assume your Tested-by?
>
> Of course! Not quite done, though.
Ohh, I didn't mean to rush you to that!
> I think I found
On Sat, Apr 01, 2017 at 07:35:25PM +0800, Jeffy Chen wrote:
Hi Jeffy,
Could you please add commit messages describing *why* you're making the change?
It might be obvious to you (and maybe me), but others will benefit from better
descriptions.
> Signed-off-by: Jeffy Chen
On Tue 04-04-17 14:13:06, Cristopher Lameter wrote:
> On Tue, 4 Apr 2017, Michal Hocko wrote:
>
> > Yes, but we do not have to blow the kernel, right? Why cannot we simply
> > leak that memory?
>
> Because it is a serious bug to attempt to free a non slab object using
> slab operations. This is
> -Original Message-
> From: Bjorn Helgaas [mailto:helg...@kernel.org]
> Sent: Tuesday, April 4, 2017 12:04 PM
> To: KY Srinivasan
> Cc: linux-...@vger.kernel.org; linux-kernel@vger.kernel.org;
> de...@linuxdriverproject.org; o...@aepfle.de; a...@canonical.com;
>
Commit a1f3e4d6a0c3 "libnvdimm, region: update nd_region_available_dpa()
for multi-pmem support" reworked blk dpa (DIMM Physical Address)
accounting to comprehend multiple pmem namespace allocations aliasing
with a given blk-dpa range.
The following call trace is a result of failing to account
On Tue, Apr 04, 2017 at 08:38:35PM +0200, Mike Galbraith wrote:
> On Tue, 2017-04-04 at 21:00 +0300, Michael S. Tsirkin wrote:
>
> > And just making double sure, the 1st version that has the issue
> > is 5c34d002dcc7, isn't it? I'm asking because subject says so
> > but then goes on to list
On Tue, Apr 04, 2017 at 03:14:03PM +0530, Pushkar Jambhlekar wrote:
> Replacing 'unsigned' with 'unsigned int'
Why? You need to explain why you do something, not just say what you
did (that should be obvious if you read the patch...)
thanks,
greg k-h
This patch changes the device node position of ps20 and ps21 to fix
ordering by rising physical address.
From
uart7: serial@01c29c00
i2c0: i2c@01c2ac00
i2c1: i2c@01c2b000
i2c2: i2c@01c2b400
i2c3: i2c@01c2b800
i2c4: i2c@01c2c000
gmac: ethernet@01c5
hstimer@01c6
gic:
From: Kalle Valo
Date: Tue, 04 Apr 2017 20:48:35 +0300
> David Miller writes:
>
>> From: Kalle Valo
>> Date: Mon, 03 Apr 2017 14:26:10 +0300
>>
>>> here few really small fixes. I'm hoping this to be the last pull request
>>> for
This patch changes the device node position of ps20 and ps21 to fix
ordering by rising physical address.
From
uart7: serial@01c29c00
i2c0: i2c@01c2ac00
i2c1: i2c@01c2b000
i2c2: i2c@01c2b400
ps20: ps2@01c2a000
ps21: ps2@01c2a400
to
uart7: serial@01c29c00
ps20: ps2@01c2a000
ps21: ps2@01c2a400
The A10 SoC has an on-board CAN controller. This patch adds the
pinctrl settings for pins PH20 and PH21.
This patch is adapted from the description in
Documentation/devicetree/bindings/net/can/sun4i_can.txt
Signed-off-by: Patrick Menschel
---
The Allwinner A10/A20 SoCs have an on-board CAN (Controller Area Network)
controller. This patch adds the CAN core to the SoC's include files,
sun4i-a10.dtsi and sun7i-a20.dtsi.
On linux-can mailing list was a discussion about updating the device tree
bindings
https://lkml.org/lkml/2015/9/17/220
The A20 SoC has an on-board CAN controller.
This patch adds the device node.
The CAN controller is inherited from the A10 SoC and uses the same driver.
This patch is adapted from the description in
Documentation/devicetree/bindings/net/can/sun4i_can.txt
Signed-off-by: Patrick Menschel
The A20 SoC has an on-board CAN controller. This patch adds
the pinctrl settings for pins PH20 and PH21.
This patch is adapted from the description in
Documentation/devicetree/bindings/net/can/sun4i_can.txt
Signed-off-by: Patrick Menschel
---
On Mon, 3 Apr 2017, Tracy Smith wrote:
Hi All,
No JTAG available and need to understand why Linux 4.8.3 doesn't boot on a
x86_64 corei7-64. Hangs at the typical "Starting kernel" location after
the last message of the U-boot. The bootcmd is given below.
Do you see the issue when you
On Tue, 2017-04-04 at 22:57 +0530, Srikar Dronamraju wrote:
>
> The isolated cpus are part of the cpus allowed list. In the above
> case,
> numabalancing ends up scheduling some of these tasks on isolated
> cpus.
>
> To avoid this, please check for isolated cpus before choosing a
> target
> cpu.
bio_integrity_trim inherent it's interface from bio_trim and accept
offset and size, but this API is error prone because data offset
must always be insync with bio's data offset. That is why we have
integrity update hook in bio_advance()
So only meaningful values are: offset == 0, sectors ==
SCSI drivers do care about bip_seed so we must update it accordingly.
Signed-off-by: Dmitry Monakhov
---
block/bio-integrity.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/block/bio-integrity.c b/block/bio-integrity.c
index b5009a8..82a6ffb 100644
---
On Tue, Apr 4, 2017 at 11:27 AM, H. Peter Anvin wrote:
> On 04/04/17 10:47, Thomas Garnier wrote:
>> diff --git a/arch/x86/include/asm/pgtable_64_types.h
>> b/arch/x86/include/asm/pgtable_64_types.h
>> index 516593e66bd6..12fa851c7fa8 100644
>> ---
On Wed, Mar 22, 2017 at 01:25:18PM +, David Woodhouse wrote:
> From: David Woodhouse
>
> Most of the almost-identical versions of pci_mmap_page_range() silently
> ignore the 'write_combine' argument and give uncached mappings.
>
> Yet we allow the PCIIOC_WRITE_COMBINE
Hello Joao
On 4/3/2017 3:12 PM, Joao Pinto wrote:
Yes older cores do not support multiple queues and I tried to isolate the
features not to affect older versions.
ok so we are inline ;-)
Do you think that functions as "ndev = alloc_etherdev_mqs" has some sort of
influence?
I do not think
On Sun, Apr 2, 2017 at 10:29 AM, Andreas Klinger wrote:
> Linus Walleij schrieb am Sun, 02. Apr 16:56:
>> On Sun, Apr 2, 2017 at 11:32 AM, Jonathan Cameron wrote:
>> > On 27/03/17 11:06, Andreas Klinger wrote:
>> >> While
Hi,
The intel-cht-wc.c[1] was merged on only extcon-next branch.
I think that this patch better to be squashed with patch[1].
[1] commit 6786e42f31637 ("extcon: intel-cht-wc: Add Intel Cherry Trail Whiskey
Cove PMIC extcon driver")
How about it?
On 2017년 04월 03일 20:26, Hans de Goede wrote:
>
On Mon, Apr 03, 2017 at 11:30:55AM -0500, Alan Tull wrote:
> On Sat, Apr 1, 2017 at 6:08 AM, Wu Hao wrote:
> > On Fri, Mar 31, 2017 at 02:10:12PM -0500, Alan Tull wrote:
> >> On Thu, Mar 30, 2017 at 7:08 AM, Wu Hao wrote:
> >> > From: Kang Luwei
Ricardo Neri writes:
> On Fri, 2017-03-31 at 16:11 +0200, Alexandre Julliard wrote:
>> Ricardo Neri writes:
>>
>> > On Thu, 2017-03-30 at 13:10 +0300, Stas Sergeev wrote:
>> >> 30.03.2017 08:14, Ricardo Neri пишет:
The goal of this patch is to protect the JIT against an attacker with a
write-in-memory primitive. The JIT allocates a buffer which will eventually
be marked +x, so we need to make sure that what was written to this buffer
is what was intended.
We acheive this by building a hash of the
On Thu, Mar 30, 2017 at 7:08 AM, Wu Hao wrote:
> From: Xiao Guangrong
>
> Device Featuer List structure creates a link list of feature headers
> within the MMIO space to provide an extensiable way of adding features.
>
> The Intel FPGA PCIe
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