Use macro DIV_ROUND_CLOSEST_ULL() for 64bit division to closet one
instead of implementing the same locally. This increase readability.
Signed-off-by: Laxman Dewangan
---
drivers/pwm/pwm-tegra.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git
This patch series have following fixes:
- Add more precession in PWM period register value calculation
for lower pwm frequency.
- Add support to configure PWM pins in different state in the
suspend/resume.
Laxman Dewangan (4):
pwm: tegra: Use DIV_ROUND_CLOSEST_ULL() instead of local
The rate of the PWM calculated as follows:
hz = NSEC_PER_SEC / period_ns;
rate = (rate + (hz / 2)) / hz;
This has the precision loss in lower PWM rate.
Changing this to have more precision as:
hz = DIV_ROUND_CLOSE(NSEC_PER_SEC * 100, period_ns);
rate =
On Wed, Apr 05, 2017 at 03:55:39PM +0200, SF Markus Elfring wrote:
> From: Markus Elfring
> Date: Wed, 5 Apr 2017 15:00:44 +0200
>
> * Replace the specification of two data structures by pointer dereferences
> to make the corresponding size determination a bit
In some of NVIDIA Tegra's platform, PWM controller is used to
control the PWM controlled regulators. PWM signal is connected to
the VID pin of the regulator where duty cycle of PWM signal decide
the voltage level of the regulator output.
The tristate (high impedance of PWM pin form Tegra) also
In some of NVIDIA Tegra's platform, PWM controller is used to
control the PWM controlled regulators. PWM signal is connected to
the VID pin of the regulator where duty cycle of PWM signal decide
the voltage level of the regulator output.
The tristate (high impedance of PWM pin form Tegra) also
On 04/01/2017 02:34 PM, Peter Meerwald-Stadler wrote:
> On Fri, 31 Mar 2017, Fabrice Gasnier wrote:
>
>> Add support for STMicroelectronics STM32 DAC. It's a 12-bit, voltage
>> output digital-to-analog converter. It has two output channels, each
>> with its own converter.
>> It supports 8 bits or
Em Wed, 05 Apr 2017 11:34:19 +0200
Philipp Zabel escreveu:
> On Wed, 2017-04-05 at 09:21 +0100, Russell King - ARM Linux wrote:
> [...]
> > > Actually what was I thinking, the TVP5150 is already an example of
> > > such a device.
> > >
> > > All of this could be solved
Commit-ID: 94247f76e7361afd85ba03a3f923bf3d07ba3017
Gitweb: http://git.kernel.org/tip/94247f76e7361afd85ba03a3f923bf3d07ba3017
Author: Mike Galbraith
AuthorDate: Wed, 5 Apr 2017 10:08:27 +0200
Committer: Thomas Gleixner
CommitDate: Wed, 5 Apr 2017
On Wed, Apr 5, 2017 at 5:11 AM, Tobias Regnery wrote:
> Commit 9008ae074885 ("net/mlx5e: Minimize mlx5e_{open/close}_locked")
> copied the calls to netif_set_real_num_{tx,rx}_queues from
> mlx5e_open_locked to mlx5e_activate_priv_channels and wraps them in an
> if
>> @@ -7324,8 +7324,9 @@ struct qib_devdata *qib_init_iba7322_funcs(struct
>> pci_dev *pdev,
>> actual_cnt -= dd->num_pports;
>>
>> tabsize = actual_cnt;
>> -dd->cspec->msix_entries = kzalloc(tabsize *
>> -sizeof(struct qib_msix_entry), GFP_KERNEL);
>>
On Wed, Apr 05, 2017 at 11:33:57AM +0300, Roger Quadros wrote:
> Some boards [1] leave the PHYs at an invalid state
> during system power-up or reset thus causing unreliability
> issues with the PHY like not being detected by the mdio bus
> or link not functional. To work around these boards have
>> @@ -270,13 +268,14 @@ int qib_init_pportdata(struct qib_pportdata *ppd,
>> struct qib_devdata *dd,
>> if (!ppd->congestion_entries)
>> goto bail_1;
>>
>> -size = sizeof(struct cc_table_shadow);
>> -ppd->ccti_entries_shadow = kzalloc(size, GFP_KERNEL);
>> +
Commit-ID: def34eaae5ce04b324e48e1bfac873091d945213
Gitweb: http://git.kernel.org/tip/def34eaae5ce04b324e48e1bfac873091d945213
Author: Mike Galbraith
AuthorDate: Wed, 5 Apr 2017 10:08:27 +0200
Committer: Thomas Gleixner
CommitDate: Wed, 5 Apr 2017
On Wed, 2017-04-05 at 15:55 +0200, SF Markus Elfring wrote:
> - size = sizeof(struct ib_cc_congestion_setting_attr);
> - ppd->congestion_entries_shadow = kzalloc(size, GFP_KERNEL);
> + ppd->congestion_entries_shadow = kzalloc(sizeof(*ppd
> +
This adds CPU thermal throttling for the Allwinner A33. It uses the
thermal sensor present in the SoC's GPADC.
Signed-off-by: Quentin Schulz
---
v3:
- switched to new phandle because of modified DT node name for the GPADC
(named THS),
- got rid of
When the call to nfs_devname() fails, the error path attempts to retain
the error via the mnt variable, but this requires a cast across very
different types (char * to struct vfsmount *), which the upcoming
structure layout randomization plugin flags as being potentially
dangerous in the face of
From: Corentin Labbe
Date: Tue, 4 Apr 2017 15:32:47 +0200
> This patch add a generic testsuite for testing ethernet network device driver.
>
> Signed-off-by: Corentin Labbe
> ---
>
> Changes since v1:
> - Test for starting master
On Wed, Apr 05, 2017 at 02:36:24PM +0300, Kirill A. Shutemov wrote:
> On Mon, Mar 13, 2017 at 08:18:10AM +0100, Ingo Molnar wrote:
> >
> > * Kirill A. Shutemov wrote:
> >
> > > This patch adds support for 5-level paging during early boot.
> > > It generalizes
cmpxchg_gpte() calls get_user_pages_fast() to retrieve the number of
pages and the respective struct pages for mapping in the kernel virtual
address space.
This doesn't work if get_user_pages_fast() is invoked with a userspace
virtual address that's backed by PFNs outside of kernel reach (e.g.,
Hi Linus,
Enjoy!
The following changes since commit c1ae3cfa0e89fa1a7ecc4c99031f5e9ae99d9201:
Linux 4.11-rc1 (2017-03-05 12:59:56 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git tags/mfd-fixes-4.11
for you to fetch changes up to
On Wed, Apr 05, 2017 at 11:07:55AM +0100, Richard Fitzgerald wrote:
> The adds a driver for the microphone supply regulator on Cirrus Logic
> Madera class codecs.
Again, this appears to have only data and minor code style changes
relative to the existing arizona driver - is there no opportunity
While trying to enable memory failure handling on arm64 I ran into few
issues resulting from the incorrect handling of contiguous pte
hugepages. When contiguous pte hugepage size is enabled, in certain
instances the architecture code does not have the necessary size
information required to
Hi Vivek,
On Wednesday 05 April 2017 06:02 PM, Vivek Gautam wrote:
> This patch series adds couple of PHY drivers for Qualcomm chipsets.
> a) qcom-qusb2 phy driver: that provides High Speed USB functionality.
> b) qcom-qmp phy driver: that is a combo phy providing support for
>USB3, PCIe, UFS
Using set_pte_at() does not do the right thing when putting down
HWPOISON swap entries for hugepages on architectures that support
contiguous ptes.
Fix this problem by using set_huge_swap_pte_at() which was introduced to
fix exactly this problem.
Signed-off-by: Punit Agrawal
On Wed, Apr 05, 2017 at 03:24:31PM +0200, Andrew Lunn wrote:
> > Reviewed-by: Jarkko Sakkinen
> >
> > Peter, Andrew, anyone: Tested-by?
>
> Sorry, i don't have the hardware. All i can give you is:
>
> Reviewed-by: Andrew Lunn
>
> Andrew
On Wed, Apr 05, 2017 at 12:05:32PM +0200, Peter Huewe wrote:
>
>
> Am 5. April 2017 11:03:27 MESZ schrieb Jarkko Sakkinen
> :
> >On Tue, Mar 28, 2017 at 05:29:38PM +0200, Enric Balletbo i Serra wrote:
> >> From: Bryan Freed
> >>
> >> When
On Wed, 2017-04-05 at 14:40 +0100, Mark Brown wrote:
> On Wed, Apr 05, 2017 at 11:07:55AM +0100, Richard Fitzgerald wrote:
> > The adds a driver for the microphone supply regulator on Cirrus Logic
> > Madera class codecs.
>
> Again, this appears to have only data and minor code style changes
>
From: Markus Elfring
Date: Wed, 5 Apr 2017 14:15:45 +0200
A multiplication for the size determination of a memory allocation
indicated that an array data structure should be processed.
Thus use the corresponding function "kcalloc".
This issue was detected by using
From: Markus Elfring
Date: Wed, 5 Apr 2017 09:51:33 +0200
Multiplications for the size determination of memory allocations
indicated that array data structures should be processed.
Thus use the corresponding function "kmalloc_array".
This issue was detected by
On Tue, Apr 04, 2017 at 09:11:52AM -0700, Tony Lindgren wrote:
> Russell,
>
> * Dave Gerlach [170328 13:57]:
> > Certain SoCs like Texas Instruments AM335x and AM437x require parts
> > of the EMIF PM code to run late in the suspend sequence from SRAM,
> > such as saving and
This driver is for pre-IDE hardisk that are only found in PC from the
stoneage of personal computing, and which we don't support elsewhere
in the kernel these days.
It's also been marked broken forever.
Signed-off-by: Christoph Hellwig
---
drivers/block/Kconfig | 12 -
On 04/03/2017 06:42 PM, Rob Herring wrote:
> On Fri, Mar 31, 2017 at 01:45:04PM +0200, Fabrice Gasnier wrote:
>> Document STMicroelectronics STM32 DAC (digital-to-analog converter).
>>
>> Signed-off-by: Fabrice Gasnier
>> ---
>>
Russell,
On 04/05/2017 09:33 AM, Tony Lindgren wrote:
* Russell King - ARM Linux [170405 07:02]:
On Tue, Apr 04, 2017 at 09:11:52AM -0700, Tony Lindgren wrote:
Russell,
* Dave Gerlach [170328 13:57]:
Certain SoCs like Texas Instruments AM335x and
On Wed, Apr 5, 2017 at 6:40 AM, Wu, Hao wrote:
>> >> The fpga_image_info struct started life as just image specific info,
>> >> but I want it to go in the direction of including parameters needed to
>> >> program it this specific time. Otherwise we are stuck having to keep
>>
The A33 supports 1.1GHz and 1.2GHz frequencies at 1.32V and the Sinlinx
SinA33 has its cpu-supply property set in the cpu DT node.
Therefore, CPUfreq knows how to handle the regulator in charge of the
CPU and can adjust its voltage to match the OPP.
Add these two CPU frequencies to the CPU OPP
On Wed, Apr 05, 2017 at 08:50:52PM +0800, Icenowy Zheng wrote:
> As we added USB0 route auto switching support for A64, add related
> device tree parts to the A64 DTSI file (EHCI0/OHCI0 controllers and the
> pmu0 memory area for PHY).
>
> Signed-off-by: Icenowy Zheng
> ---
>
On Wed, Apr 05, 2017 at 11:07:54AM +0100, Richard Fitzgerald wrote:
> This patch adds a driver for the internal LDO1 regulator on
> some Cirrus Logic Madera class codecs.
There appear to be only data differences to the existing arizona driver,
is it possible to share the code?
signature.asc
Extends PWM framework to support PWM modes. The currently
implemented PWM modes were called PWM complementary mode
and PWM push-pull mode. For devices that have more than one
output per PWM channel:
- PWM complementary mode is standard working mode; in PWM
complementary mode the rising and falling
From: Markus Elfring
Date: Wed, 5 Apr 2017 15:00:44 +0200
* Replace the specification of two data structures by pointer dereferences
to make the corresponding size determination a bit safer according to
the Linux coding style convention.
* Delete the local
Now that the rockchip usb phy has a vbus-supply property use that to
control the vbus regulator on rock2.
Signed-off-by: Sjoerd Simons
---
arch/arm/boot/dts/rk3288-rock2-square.dts | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
Implement PWM dead-times for atmel PWM controllers.
Since this driver is used by PWM controllers which
supports dead-times and PWM controllers which doesn't,
add specific input for dead-time register in atmel
register private data structure.
Signed-off-by: Claudiu Beznea
Hi all,
Please give feedback on these patches which extends PWM framework
in order to support PWM dead-times.
For a PWM controller with more than one output signals per PWM channel
dead-times are the delays introduced between the edges of the output
signals and the original signal introduced in
On Tue, Apr 04, 2017 at 05:09:23PM -0500, Alan Tull wrote:
> On Thu, Mar 30, 2017 at 7:08 AM, Wu Hao wrote:
> > From: Xiao Guangrong
> >
> > Device Featuer List structure creates a link list of feature headers
> > within the MMIO space to provide
On Sat, Apr 01, 2017 at 10:25:40AM -0700, Haren Myneni wrote:
> [PATCH] crypto/nx: Update MAINTAINERS entry for 842 compression
>
> Signed-off-by: Haren Myneni
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page:
From: Carlo Caione
The latest USB keyboards shipped on several ASUS laptop models
(including ROG laptop models such as GL702VMK) have the keyboards
backlight controlled by the keyboard firmware.
The firmware implements at least 3 different commands:
- Init command (to use
On Wed, 2017-04-05 at 15:10 +0800, Huang, Ying wrote:
> To solve the issue, the per-CPU buffer is sorted according to the
> swap
> device before freeing the swap entries. Test shows that the time
> spent by swapcache_free_entries() could be reduced after the patch.
That makes a lot of sense.
>
2017-04-03 Javier Martinez Canillas :
> Hello Mauro and Gustavo,
>
> On 04/03/2017 07:16 AM, Mauro Carvalho Chehab wrote:
> > Hi Gustavo,
> >
> > Em Mon, 13 Mar 2017 16:20:25 -0300
> > Gustavo Padovan escreveu:
> >
> >> From: Gustavo Padovan
> I found that the fix brings no harm to the existing code.
How do you think about to take another look at remaining update candidates
at other source code places for this Linux module?
Regards,
Markus
On Wed, 5 Apr 2017 16:28:24 +0200
Andrew Lunn wrote:
> On Wed, Apr 05, 2017 at 07:28:46AM +0200, Ralph Sennhauser wrote:
> > The LEDs for the "wan" port are already labeled "mamba:amber:wan"
> > resp. "mamba:white:wan". So besides being an outlier with regard to
> > the rest of
* Michal Hocko [2017-04-05 14:57:43]:
> On Tue 04-04-17 22:57:28, Srikar Dronamraju wrote:
> [...]
> > For example:
> > perf bench numa mem --no-data_rand_walk -p 4 -t $THREADS -G 0 -P 3072 -T 0
> > -l 50 -c -s 1000
> > would call sched_setaffinity that resets the
On Tue, Apr 04, 2017 at 02:09:00PM -0700, Laura Abbott wrote:
> virt_addr_valid was previously insufficient to validate if virt_to_page
> could be called on an address on arm64. This has since been fixed up
> so there is no need for the extra check. Drop it.
>
> Signed-off-by: Laura Abbott
Hi Paul,
My tests are triggering the following when I have lockdep enabled and
running the stack tracer:
[ cut here ]
WARNING: CPU: 0 PID: 0 at
/work/autotest/nobackup/linux-test.git/kernel/module.c:271
module_assert_mutex_or_preempt+0x4f/0x51
Modules linked in: ppdev
A poisoned or migrated hugepage is stored as a swap entry in the page
tables. On architectures that support hugepages consisting of contiguous
page table entries (such as on arm64) this leads to ambiguity in
determining the page table entry to return in huge_pte_offset() when a
poisoned entry is
On Tue, Apr 04, 2017 at 12:24:31PM -0500, Yazen Ghannam wrote:
> From: Yazen Ghannam
>
> We have support for the new SMCA MCA_DE{STAT,ADDR} registers in Linux. So
> we've used these registers in place of MCA_{STATUS,ADDR} on SMCA systems.
> However, the guidance for
On Wed, Apr 05, 2017 at 11:06:32AM +0200, Quentin Schulz wrote:
> This adds CPU thermal throttling for the Allwinner A33. It uses the
> thermal sensor present in the SoC's GPADC.
>
> Signed-off-by: Quentin Schulz
> ---
>
> v3:
> - switched to new phandle
From: Markus Elfring
Date: Wed, 5 Apr 2017 14:20:10 +0200
* Multiplications for the size determination of memory allocations
indicated that array data structures should be processed.
Thus use the corresponding function "kcalloc".
This issue was detected by
From: Markus Elfring
Date: Wed, 5 Apr 2017 09:43:54 +0200
* A multiplication for the size determination of a memory allocation
indicated that an array data structure should be processed.
Thus use the corresponding function "kcalloc".
This issue was detected
On Wed, Apr 5, 2017 at 2:44 PM, Marcelo Ricardo Leitner
wrote:
> On Wed, Apr 05, 2017 at 06:48:45PM +0800, Xin Long wrote:
>> On Wed, Apr 5, 2017 at 5:14 AM, Marcelo Ricardo Leitner
>> wrote:
>> > On Wed, Apr 05, 2017 at 01:29:19AM +0800, Xin
On Tue, Apr 4, 2017 at 11:14 PM, Marcelo Ricardo Leitner
wrote:
> On Wed, Apr 05, 2017 at 01:29:19AM +0800, Xin Long wrote:
>> On Tue, Apr 4, 2017 at 9:28 PM, Andrey Konovalov
>> wrote:
>> > Hi,
>> >
>> > I've got the following error report
Extends PWM framework to support PWM dead-times.
The notions introduced are rising edge dead-time
and falling edge dead-time. These are useful for
PWM controllers with cannels that have more than
one outputs.
The implementation add sysfs interface for
configuration. It extends the pwm_state
Implement pwm modes by adding PWM controller specific
configuration. Since this driver is used by controllers
which supports PWM push-pull mode and controllers which
doesn't, a new field was added in driver private data
structure. Also, the driver private data structure was
changed to adapt the
Add dt-bindings for Renesas r7s72100 pin controller header file.
Signed-off-by: Jacopo Mondi
---
include/dt-bindings/pinctrl/r7s72100-pinctrl.h | 16
1 file changed, 16 insertions(+)
create mode 100644 include/dt-bindings/pinctrl/r7s72100-pinctrl.h
Add pin controller node with 12 gpio controller sub-nodes to
r7s72100 dtsi.
Signed-off-by: Jacopo Mondi
Reviewed-by: Geert Uytterhoeven
---
arch/arm/boot/dts/r7s72100.dtsi | 78 +
1 file changed, 78
On Wed, Apr 05, 2017 at 03:52:48PM +0200, SF Markus Elfring wrote:
> From: Markus Elfring
> Date: Wed, 5 Apr 2017 09:51:33 +0200
>
> Multiplications for the size determination of memory allocations
> indicated that array data structures should be processed.
> Thus
On Wed, Apr 05, 2017 at 07:28:46AM +0200, Ralph Sennhauser wrote:
> The LEDs for the "wan" port are already labeled "mamba:amber:wan" resp.
> "mamba:white:wan". So besides being an outlier with regard to the rest
> of the product line (see table below) changing the label fixes an
> internal
The USB PHY in A64 has a "pmu0" region, which controls the EHCI/OHCI
controller pair that can be connected to the PHY0.
Add the MMIO region for PHY node.
Signed-off-by: Icenowy Zheng
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 2 ++
1 file changed, 2 insertions(+)
On 04/02/2017 01:16 PM, Jonathan Cameron wrote:
> On 31/03/17 12:45, Fabrice Gasnier wrote:
>> Document STMicroelectronics STM32 DAC (digital-to-analog converter).
>>
>> Signed-off-by: Fabrice Gasnier
>> ---
>> .../devicetree/bindings/iio/dac/st,stm32-dac.txt | 56
>>
On Wed, Apr 5, 2017 at 2:01 AM, Icenowy Zheng wrote:
> AXP803 is a new PMIC chip produced by X-Powers, usually paired with A64
> via RSB bus. The PMIC itself is like AXP288, but with RSB support and
> dedicated VBUS and ACIN.
>
> Add support for it in the axp20x mfd driver.
>
>
Commit-ID: c4026b7b95a4b852e404afa2cd7720866159d118
Gitweb: http://git.kernel.org/tip/c4026b7b95a4b852e404afa2cd7720866159d118
Author: Tony Luck
AuthorDate: Mon, 3 Apr 2017 14:44:16 -0700
Committer: Thomas Gleixner
CommitDate: Wed, 5 Apr 2017
Commit-ID: de016df88f23a5ab0cec3a8e05f6066388725b9e
Gitweb: http://git.kernel.org/tip/de016df88f23a5ab0cec3a8e05f6066388725b9e
Author: Vikas Shivappa
AuthorDate: Mon, 3 Apr 2017 14:44:17 -0700
Committer: Thomas Gleixner
CommitDate:
On Mon, 3 Apr 2017, Vikas Shivappa wrote:
> +Cache resource(L3/L2) subdirectory contains the following files:
>
> -"num_closids": The number of CLOSIDs which are valid for this
> - resource. The kernel uses the smallest number of
> - CLOSIDs of all enabled resources as
On Wed, Apr 05, 2017 at 08:50:20AM +0200, Michał Kępień wrote:
> This series contains a few cleanups for the call_fext_func() function.
> Just as a reminder, please note that v1 of this series is currently
> applied in testing.
>
> Changes from v1:
>
> - Update debug message logged by
From: Rabin Vincent
mipsxx_pmu_handle_shared_irq() calls irq_work_run() while holding the
pmuint_rwlock for read. irq_work_run() can, via perf_pending_event(),
call try_to_wake_up() which can try to take rq->lock.
However, perf can also call perf_pmu_enable() (and thus take
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +#define DRV_VERSION"EXPERIMENTAL VERSION"
>
> Is that a leftover? :)
Sorry, will fix this.
> > +#define DRV_NAME "intel-fpga-pci"
> > +
> > +/* PCI Device ID */
> >
From: "Jonathan (Zhixiong) Zhang"
Add VM_FAULT_HWPOISON[_LARGE] handling to the arm64 page fault
handler. Handling of VM_FAULT_HWPOISON[_LARGE] is very similar
to VM_FAULT_OOM, the only difference is that a different si_code
(BUS_MCEERR_AR) is passed to user space and
From: Rafal Ozieblo
Date: Mon, 3 Apr 2017 14:10:15 +0100
> This patch is based on original Harini's patch and Andrei's patch,
> implemented in aseparate file to ease the review/maintanance
> and integration with other platforms.
>
> In case that macb is compiled as a module,
On Tue, Apr 04, 2017 at 02:43:07PM -0700, Rick Altherr wrote:
> Some hardware RNGs provide a single register for obtaining random data.
> Instead of signaling when new data is available, the reader must wait a
> fixed amount of time between reads for new data to be generated.
> timeriomem_rng
On 03/24/2017 02:56 PM, Dave Hansen wrote:
> On 03/24/2017 12:33 AM, John Hubbard wrote:
>> There might be some additional information you are using to come up with
>> that conclusion, that is not obvious to me. Any thoughts there? These
>> calls use the same underlying page allocator (and I
On Wed, 05 Apr 2017, Quentin Schulz wrote:
> This patch adds documentation for the A33 GPADC binding.
>
> Signed-off-by: Quentin Schulz
> Acked-by: Rob Herring
> ---
> v4:
> - correct patch title,
>
> v3:
> - fixed missing allwinner in
Hi Ralph,
On ven., mars 31 2017, Andrew Lunn wrote:
> On Thu, Mar 30, 2017 at 06:54:04PM +0200, Ralph Sennhauser wrote:
>> Commit a4ee7e18d808 ("ARM: dts: armada: Add default trigger for sata
>> led") adds the default trigger to individual boards, move it to
>>
On Wed, Apr 05, 2017 at 03:52:49PM +0200, Michal Hocko wrote:
My code doesn't do that though. So I guess I have to sanitize. Does
this help? Please drop the "mm, memory_hotplug: get rid of zone/node
shrinking" patch.
---
diff --git a/mm/memory_hotplug.c b/mm/memory_hotplug.c
index
Hi Kishon,
On Wed, Apr 5, 2017 at 7:08 PM, Kishon Vijay Abraham I wrote:
> Hi Vivek,
>
> On Wednesday 05 April 2017 06:02 PM, Vivek Gautam wrote:
>> This patch series adds couple of PHY drivers for Qualcomm chipsets.
>> a) qcom-qusb2 phy driver: that provides High Speed USB
Hi,
On 4/4/2017 11:03 PM, John Stultz wrote:
> On Tue, Apr 4, 2017 at 12:38 AM, Felipe Balbi
> wrote:
>>
>> Hi,
>>
>> Minas Harutyunyan writes:
We've noticed that when using usb ethernet adapters on HiKey, we
> -Original Message-
> From: Linus Walleij [mailto:linus.wall...@linaro.org]
> Sent: 29 March 2017 05:07
> To: Han, Nandor (GE Healthcare)
> Cc: Alexandre Courbot ; Rob Herring ;
> Mark Rutland
> ;
This resolves a checkpatch warning that "Single statement macros should
not use a do {} while (0) loop" by removing the loop and adjusting line
length accordingly.
Signed-off-by: Craig Inches
---
Changes in v2:
- Kept statements together
- Kept operator on previous
From: Joe Perches
Date: Sun, 2 Apr 2017 14:30:06 -0700
> Add all the currently available SPEED_ strings.
>
> Signed-off-by: Joe Perches
I'll apply this for now, thanks.
On Wed, Apr 05, 2017 at 01:03:42PM +0200, Maciej S. Szmigiero wrote:
> Hi Paul,
>
> > tpm tpm0: Unable to read burstcount
> > tpm tpm0: tpm_transmit: tpm_send: error -16
> > tpm_tis tpm_tis: Could not get TPM timeouts and durations
>
> This looks like a regression I had on ThinkPad X61S.
>
>
From: Markus Elfring
Date: Wed, 5 Apr 2017 15:34:32 +0200
A few update suggestions were taken into account
from static source code analysis.
Markus Elfring (5):
Use kcalloc() in qib_init_iba7322_funcs()
Use kmalloc_array() in qib_init_7322_variables()
Use
On Tue 04-04-17 16:43:39, Reza Arbab wrote:
> On Tue, Apr 04, 2017 at 09:41:22PM +0200, Michal Hocko wrote:
> >On Tue 04-04-17 13:30:13, Reza Arbab wrote:
> >>I think I found another edge case. You
> >>get an oops when removing all of a node's memory:
> >>
> >>__nr_to_section
> >>__pfn_to_section
From: Nicholas Piggin
Date: Tue, 4 Apr 2017 13:02:33 +1000
> On Mon, 3 Apr 2017 17:43:05 -0700
> Linus Torvalds wrote:
>
>> But that depends on architectures having some pattern that we *can*
>> abstract. Would some "begin/in-loop/end" pattern
Add device nodes for user leds on Genmai board.
Signed-off-by: Jacopo Mondi
Reviewed-by: Geert Uytterhoeven
---
arch/arm/boot/dts/r7s72100-genmai.dts | 14 ++
1 file changed, 14 insertions(+)
diff --git
Hi Philipp,
2017-04-03 Philipp Zabel :
> Hi Gustavo,
>
> On Mon, 2017-03-13 at 16:20 -0300, Gustavo Padovan wrote:
> > From: Gustavo Padovan
> >
> > Turn the reserved2 field into fence_fd that we will use to send
> > an in-fence to the
Add pin configuration subnode for SCIF2 serial debug interface.
Signed-off-by: Jacopo Mondi
Reviewed-by: Geert Uytterhoeven
---
arch/arm/boot/dts/r7s72100-genmai.dts | 12
1 file changed, 12 insertions(+)
diff --git
Add pin configuration subnode for ETHER ethernet controller.
Signed-off-by: Jacopo Mondi
---
arch/arm/boot/dts/r7s72100-genmai.dts | 41 +++
1 file changed, 41 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts
On Wed, Mar 22, 2017 at 11:35:51AM +0100, Peter Zijlstra wrote:
> Part of what makes futex_unlock_pi() intricate is that
> rt_mutex_futex_unlock() -> rt_mutex_slowunlock() can drop
> rt_mutex::wait_lock.
>
> This means we cannot rely on the atomicy of wait_lock, which we would
> like to do in
GPIO management is pretty simple and is part of the same IP than the pin
controller for the Armada 37xx SoCs. This patch adds the GPIO support to
the pinctrl-armada-37xx.c file, it also allows sharing common functions
between the gpiolib and the pinctrl drivers.
Signed-off-by: Gregory CLEMENT
Hi Sakari,
2017-04-04 Sakari Ailus :
> Hi Gustavo,
>
> Thank you for the patchset. Please see my comments below.
>
> On Mon, Mar 13, 2017 at 04:20:25PM -0300, Gustavo Padovan wrote:
> > From: Gustavo Padovan
> >
> > Hi,
> >
> > This RFC
On Wed 2017-04-05 11:16:28, Sergey Senozhatsky wrote:
> On (04/05/17 11:08), Sergey Senozhatsky wrote:
> [..]
> > > stop_critical_timings();/* don't trace print latency */
> > > - call_console_drivers(ext_text, ext_len, text, len);
> > > +
On Tue, Apr 4, 2017 at 6:09 PM, NeilBrown wrote:
> On Tue, Apr 04 2017, Kees Cook wrote:
>
>> When the call to nfs_devname() fails, the error path attempts to retain
>> the error via the mnt variable, but this requires a cast across very
>> different types (char * to struct
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