Hi Paul,
My tests are triggering the following when I have lockdep enabled and
running the stack tracer:
[ cut here ]
WARNING: CPU: 0 PID: 0 at
/work/autotest/nobackup/linux-test.git/kernel/module.c:271
module_assert_mutex_or_preempt+0x4f/0x51
Modules linked in: ppdev pa
This resolves a checkpatch warning that "Single statement macros should
not use a do {} while (0) loop" by removing the loop and adjusting line
length accordingly.
Signed-off-by: Craig Inches
---
Changes in v2:
- Kept statements together
- Kept operator on previous line
.../lustre/inclu
From: "Jonathan (Zhixiong) Zhang"
Add VM_FAULT_HWPOISON[_LARGE] handling to the arm64 page fault
handler. Handling of VM_FAULT_HWPOISON[_LARGE] is very similar
to VM_FAULT_OOM, the only difference is that a different si_code
(BUS_MCEERR_AR) is passed to user space and si_addr_lsb field is
initial
From: "Jonathan (Zhixiong) Zhang"
If ACPI_APEI and MEMORY_FAILURE is configured, select
ACPI_APEI_MEMORY_FAILURE. This enables memory failure recovery
when such memory failure is reported through ACPI APEI. APEI
(ACPI Platform Error Interfaces) provides a means for the
platform to convey error in
The default implementation of set_huge_swap_pte_at() does not support
hugepages consisting of contiguous ptes. Override it to add support for
contiguous hugepages.
Signed-off-by: Punit Agrawal
Cc: David Woods
---
arch/arm64/mm/hugetlbpage.c | 17 +
1 file changed, 17 insertions(
set_huge_pte_at(), an architecture callback to populate hugepage ptes,
does not provide the range of virtual memory that is targetted. This
leads to ambiguity when dealing with swap entries on architectures that
support hugepages consisting of contiguous ptes.
Fix the problem by introducing an ove
The default huge_pte_clear() implementation does not clear contiguous
page table entries when it encounters contiguous hugepages that are
supported on arm64.
Fix this by overriding the default implementation to clear all the
entries associated with contiguous hugepages.
Signed-off-by: Punit Agraw
When unmapping a hugepage range, huge_pte_clear() is used to clear the
page table entries that are marked as not present. huge_pte_clear()
internally just ends up calling pte_clear() which does not correctly
deal with hugepages consisting of contiguous page table entries.
Add a size argument and i
huge_pte_offset() does not correctly handle poisoned or migration page
table entries. It returns NULL instead of the offset when it encounters
a swap entry. This leads to errors such as
[ 344.165544] mm/pgtable-generic.c:33: bad pmd 00083af00074.
in the kernel log when unmapping memory on pr
A poisoned or migrated hugepage is stored as a swap entry in the page
tables. On architectures that support hugepages consisting of contiguous
page table entries (such as on arm64) this leads to ambiguity in
determining the page table entry to return in huge_pte_offset() when a
poisoned entry is en
On Tue, Apr 04, 2017 at 12:24:31PM -0500, Yazen Ghannam wrote:
> From: Yazen Ghannam
>
> We have support for the new SMCA MCA_DE{STAT,ADDR} registers in Linux. So
> we've used these registers in place of MCA_{STATUS,ADDR} on SMCA systems.
> However, the guidance for current implementations of SMC
On Wed, Apr 05, 2017 at 12:05:32PM +0200, Peter Huewe wrote:
>
>
> Am 5. April 2017 11:03:27 MESZ schrieb Jarkko Sakkinen
> :
> >On Tue, Mar 28, 2017 at 05:29:38PM +0200, Enric Balletbo i Serra wrote:
> >> From: Bryan Freed
> >>
> >> When the I2C Infineon part is attached to an I2C adapter tha
Hi Vivek,
On Wednesday 05 April 2017 06:02 PM, Vivek Gautam wrote:
> This patch series adds couple of PHY drivers for Qualcomm chipsets.
> a) qcom-qusb2 phy driver: that provides High Speed USB functionality.
> b) qcom-qmp phy driver: that is a combo phy providing support for
>USB3, PCIe, UFS
Using set_pte_at() does not do the right thing when putting down
HWPOISON swap entries for hugepages on architectures that support
contiguous ptes.
Fix this problem by using set_huge_swap_pte_at() which was introduced to
fix exactly this problem.
Signed-off-by: Punit Agrawal
Cc: "Kirill A. Shute
On Wed, Apr 05, 2017 at 03:24:31PM +0200, Andrew Lunn wrote:
> > Reviewed-by: Jarkko Sakkinen
> >
> > Peter, Andrew, anyone: Tested-by?
>
> Sorry, i don't have the hardware. All i can give you is:
>
> Reviewed-by: Andrew Lunn
>
> Andrew
Thank you.
/Jarkko
On Wed, Apr 05, 2017 at 11:07:55AM +0100, Richard Fitzgerald wrote:
> The adds a driver for the microphone supply regulator on Cirrus Logic
> Madera class codecs.
Again, this appears to have only data and minor code style changes
relative to the existing arizona driver - is there no opportunity fo
While trying to enable memory failure handling on arm64 I ran into few
issues resulting from the incorrect handling of contiguous pte
hugepages. When contiguous pte hugepage size is enabled, in certain
instances the architecture code does not have the necessary size
information required to manipula
> On Tue, Apr 04, 2017 at 02:45:26PM +0530, Pushkar Jambhlekar wrote:
> > diff --git a/drivers/staging/lustre/lustre/obdclass/cl_page.c
> > b/drivers/staging/lustre/lustre/obdclass/cl_page.c
> > index cd9a40c..71fcc4c 100644
> > --- a/drivers/staging/lustre/lustre/obdclass/cl_page.c
> > +++ b/drive
Hi Ravi,
On Wednesday 05 April 2017 06:30 PM, Raviteja Garimella wrote:
> Hi Kishon,
>
> On Wed, Apr 5, 2017 at 4:30 PM, Kishon Vijay Abraham I wrote:
>> Hi,
>>
>> On Tuesday 28 March 2017 05:57 PM, Raviteja Garimella wrote:
>>> This is driver for USB DRD Phy used in Broadcom's Northstar2
>>> So
From: Joe Perches
Date: Sun, 2 Apr 2017 14:30:06 -0700
> Add all the currently available SPEED_ strings.
>
> Signed-off-by: Joe Perches
I'll apply this for now, thanks.
On Wed, Apr 05, 2017 at 01:03:42PM +0200, Maciej S. Szmigiero wrote:
> Hi Paul,
>
> > tpm tpm0: Unable to read burstcount
> > tpm tpm0: tpm_transmit: tpm_send: error -16
> > tpm_tis tpm_tis: Could not get TPM timeouts and durations
>
> This looks like a regression I had on ThinkPad X61S.
>
> You
From: Rafal Ozieblo
Date: Mon, 3 Apr 2017 14:10:15 +0100
> This patch is based on original Harini's patch and Andrei's patch,
> implemented in aseparate file to ease the review/maintanance
> and integration with other platforms.
>
> In case that macb is compiled as a module, it has been renamed
On Tue, Apr 04, 2017 at 02:43:07PM -0700, Rick Altherr wrote:
> Some hardware RNGs provide a single register for obtaining random data.
> Instead of signaling when new data is available, the reader must wait a
> fixed amount of time between reads for new data to be generated.
> timeriomem_rng imple
On 03/24/2017 02:56 PM, Dave Hansen wrote:
> On 03/24/2017 12:33 AM, John Hubbard wrote:
>> There might be some additional information you are using to come up with
>> that conclusion, that is not obvious to me. Any thoughts there? These
>> calls use the same underlying page allocator (and I though
On Wed, Apr 05, 2017 at 11:06:32AM +0200, Quentin Schulz wrote:
> This adds CPU thermal throttling for the Allwinner A33. It uses the
> thermal sensor present in the SoC's GPADC.
>
> Signed-off-by: Quentin Schulz
> ---
>
> v3:
> - switched to new phandle because of modified DT node name for th
From: Markus Elfring
Date: Wed, 5 Apr 2017 15:34:32 +0200
A few update suggestions were taken into account
from static source code analysis.
Markus Elfring (5):
Use kcalloc() in qib_init_iba7322_funcs()
Use kmalloc_array() in qib_init_7322_variables()
Use kcalloc() in qib_alloc_devdata()
On Tue 04-04-17 16:43:39, Reza Arbab wrote:
> On Tue, Apr 04, 2017 at 09:41:22PM +0200, Michal Hocko wrote:
> >On Tue 04-04-17 13:30:13, Reza Arbab wrote:
> >>I think I found another edge case. You
> >>get an oops when removing all of a node's memory:
> >>
> >>__nr_to_section
> >>__pfn_to_section
On Wed, 2017-04-05 at 14:40 +0100, Mark Brown wrote:
> On Wed, Apr 05, 2017 at 11:07:55AM +0100, Richard Fitzgerald wrote:
> > The adds a driver for the microphone supply regulator on Cirrus Logic
> > Madera class codecs.
>
> Again, this appears to have only data and minor code style changes
> rel
From: Markus Elfring
Date: Wed, 5 Apr 2017 14:15:45 +0200
A multiplication for the size determination of a memory allocation
indicated that an array data structure should be processed.
Thus use the corresponding function "kcalloc".
This issue was detected by using the Coccinelle software.
Signe
From: Markus Elfring
Date: Wed, 5 Apr 2017 09:51:33 +0200
Multiplications for the size determination of memory allocations
indicated that array data structures should be processed.
Thus use the corresponding function "kmalloc_array".
This issue was detected by using the Coccinelle software.
Sig
From: Markus Elfring
Date: Wed, 5 Apr 2017 14:20:10 +0200
* Multiplications for the size determination of memory allocations
indicated that array data structures should be processed.
Thus use the corresponding function "kcalloc".
This issue was detected by using the Coccinelle software.
*
From: Markus Elfring
Date: Wed, 5 Apr 2017 09:43:54 +0200
* A multiplication for the size determination of a memory allocation
indicated that an array data structure should be processed.
Thus use the corresponding function "kcalloc".
This issue was detected by using the Coccinelle software
Hello Philipp,
On Wed, Apr 5, 2017 at 5:34 AM, Philipp Zabel wrote:
> On Wed, 2017-04-05 at 09:21 +0100, Russell King - ARM Linux wrote:
[snip]
> I think the output part is accurate, as the audio pad is an artifact of
> an unrelated change. I'm not so sure about the VBI pad, but I think that
>
Extends PWM framework to support PWM modes. The currently
implemented PWM modes were called PWM complementary mode
and PWM push-pull mode. For devices that have more than one
output per PWM channel:
- PWM complementary mode is standard working mode; in PWM
complementary mode the rising and falling
From: Markus Elfring
Date: Wed, 5 Apr 2017 15:00:44 +0200
* Replace the specification of two data structures by pointer dereferences
to make the corresponding size determination a bit safer according to
the Linux coding style convention.
* Delete the local variable "size" which became unnece
On Tue, Apr 04, 2017 at 09:11:52AM -0700, Tony Lindgren wrote:
> Russell,
>
> * Dave Gerlach [170328 13:57]:
> > Certain SoCs like Texas Instruments AM335x and AM437x require parts
> > of the EMIF PM code to run late in the suspend sequence from SRAM,
> > such as saving and restoring the EMIF con
This driver is for pre-IDE hardisk that are only found in PC from the
stoneage of personal computing, and which we don't support elsewhere
in the kernel these days.
It's also been marked broken forever.
Signed-off-by: Christoph Hellwig
---
drivers/block/Kconfig | 12 -
drivers/block/Makefile
From: Nicholas Piggin
Date: Tue, 4 Apr 2017 13:02:33 +1000
> On Mon, 3 Apr 2017 17:43:05 -0700
> Linus Torvalds wrote:
>
>> But that depends on architectures having some pattern that we *can*
>> abstract. Would some "begin/in-loop/end" pattern like the above be
>> sufficient?
>
> Yes. begin/in
On Tue, Apr 4, 2017 at 11:14 PM, Marcelo Ricardo Leitner
wrote:
> On Wed, Apr 05, 2017 at 01:29:19AM +0800, Xin Long wrote:
>> On Tue, Apr 4, 2017 at 9:28 PM, Andrey Konovalov
>> wrote:
>> > Hi,
>> >
>> > I've got the following error report while fuzzing the kernel with
>> > syzkaller.
>> >
>>
Extends PWM framework to support PWM dead-times.
The notions introduced are rising edge dead-time
and falling edge dead-time. These are useful for
PWM controllers with cannels that have more than
one outputs.
The implementation add sysfs interface for
configuration. It extends the pwm_state structu
On Wed, Apr 5, 2017 at 2:44 PM, Marcelo Ricardo Leitner
wrote:
> On Wed, Apr 05, 2017 at 06:48:45PM +0800, Xin Long wrote:
>> On Wed, Apr 5, 2017 at 5:14 AM, Marcelo Ricardo Leitner
>> wrote:
>> > On Wed, Apr 05, 2017 at 01:29:19AM +0800, Xin Long wrote:
>> >> On Tue, Apr 4, 2017 at 9:28 PM, Andr
Hi all,
Please give feedback on these patches which extends PWM framework
in order to support PWM dead-times.
For a PWM controller with more than one output signals per PWM channel
dead-times are the delays introduced between the edges of the output
signals and the original signal introduced in d
Now that the rockchip usb phy has a vbus-supply property use that to
control the vbus regulator on rock2.
Signed-off-by: Sjoerd Simons
---
arch/arm/boot/dts/rk3288-rock2-square.dts | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288-rock2-square.
Implement PWM dead-times for atmel PWM controllers.
Since this driver is used by PWM controllers which
supports dead-times and PWM controllers which doesn't,
add specific input for dead-time register in atmel
register private data structure.
Signed-off-by: Claudiu Beznea
---
drivers/pwm/pwm-atme
Hi Linus,
this is 4th round of gpio/pincontroller for RZ/A1 devices.
As you suggested in v3 review, I have now added what we called pinmux flags
to the list of standard pinconf generic properties, and we're now using
generic parsing routines to collect them and apply them when multiplexing
pins
Add bi-directional and output-enable pin configuration properties.
bi-directional allows to specify when a pin shall operate in input and
output mode at the same time. This is particularly useful in platforms
where input and output buffers have to be manually enabled.
output-enable is just syntac
Add device tree bindings documentation for Renesas RZ/A1 gpio and pin
controller.
Signed-off-by: Jacopo Mondi
---
.../bindings/pinctrl/renesas,rza1-pinctrl.txt | 218 +
1 file changed, 218 insertions(+)
create mode 100644
Documentation/devicetree/bindings/pinctrl/renes
Add combined gpio and pin controller driver for Renesas RZ/A1
r7s72100 SoC.
Signed-off-by: Jacopo Mondi
---
drivers/pinctrl/Kconfig| 11 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-rza1.c | 995 +
3 files changed, 1007 insert
Add pin configuration subnode for RIIC2 interface.
Signed-off-by: Jacopo Mondi
Reviewed-by: Geert Uytterhoeven
---
arch/arm/boot/dts/r7s72100-genmai.dts | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts
b/arch/arm/boot/dts/r7s72100-genmai.dts
in
Add device nodes for user leds on Genmai board.
Signed-off-by: Jacopo Mondi
Reviewed-by: Geert Uytterhoeven
---
arch/arm/boot/dts/r7s72100-genmai.dts | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts
b/arch/arm/boot/dts/r7s72100-genmai.dt
Add pin configuration subnode for SCIF2 serial debug interface.
Signed-off-by: Jacopo Mondi
Reviewed-by: Geert Uytterhoeven
---
arch/arm/boot/dts/r7s72100-genmai.dts | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts
b/arch/arm/boot/dts/r7s7
Add pin configuration subnode for ETHER ethernet controller.
Signed-off-by: Jacopo Mondi
---
arch/arm/boot/dts/r7s72100-genmai.dts | 41 +++
1 file changed, 41 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts
b/arch/arm/boot/dts/r7s72100-genmai.d
Hi Philipp,
2017-04-03 Philipp Zabel :
> Hi Gustavo,
>
> On Mon, 2017-03-13 at 16:20 -0300, Gustavo Padovan wrote:
> > From: Gustavo Padovan
> >
> > Turn the reserved2 field into fence_fd that we will use to send
> > an in-fence to the kernel return an out-fence from the kernel to
> > userspac
Add pin controller node with 12 gpio controller sub-nodes to
r7s72100 dtsi.
Signed-off-by: Jacopo Mondi
Reviewed-by: Geert Uytterhoeven
---
arch/arm/boot/dts/r7s72100.dtsi | 78 +
1 file changed, 78 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100.d
Implement pwm modes by adding PWM controller specific
configuration. Since this driver is used by controllers
which supports PWM push-pull mode and controllers which
doesn't, a new field was added in driver private data
structure. Also, the driver private data structure was
changed to adapt the new
Add dt-bindings for Renesas r7s72100 pin controller header file.
Signed-off-by: Jacopo Mondi
---
include/dt-bindings/pinctrl/r7s72100-pinctrl.h | 16
1 file changed, 16 insertions(+)
create mode 100644 include/dt-bindings/pinctrl/r7s72100-pinctrl.h
diff --git a/include/dt-bind
On rockchip devices vbus is supplied by a separate power supply, often
through a regulator. Add support for describing the the regulator in
device-tree following the same convention as several other usb phy's.
Signed-off-by: Sjoerd Simons
---
.../devicetree/bindings/phy/rockchip-usb-phy.txt
Hi Kishon,
On Wed, Apr 5, 2017 at 7:04 PM, Kishon Vijay Abraham I wrote:
> Hi Ravi,
>
> On Wednesday 05 April 2017 06:30 PM, Raviteja Garimella wrote:
>> Hi Kishon,
>>
>> On Wed, Apr 5, 2017 at 4:30 PM, Kishon Vijay Abraham I wrote:
>>> Hi,
>>>
>>> On Tuesday 28 March 2017 05:57 PM, Raviteja Gar
A board I'm working on seems to get its usb->sata bridge in a rather
confused state during reboot, which unfortunately can't be recovered on
the next boot (only hard reset helps).
This seems to be avoidable by turning off vbus, which turns the internal
usb hub off on shutdown.
First patch add the
On a board with a usb->sata bridge behind a usb hub, the bridge only
appears on cold boot and becomes non-functional after a reboot. Testing
thusfar shows that it gets confused during reboot if the usb hub is left
on (Interestingly a similar setup without the usb hub in between doesn't
have the iss
Hi all,
Please give feedback on these patches which extends the PWM
framework in order to support multiple PWM signal types.
The current patch series recognize the following PWM
signal types:
- PWM complementary signals
- PWM push-pull signal
These output signals could be configured by setting PWM
On Wed, 05 Apr 2017, Quentin Schulz wrote:
> This patch adds documentation for the A33 GPADC binding.
>
> Signed-off-by: Quentin Schulz
> Acked-by: Rob Herring
> ---
> v4:
> - correct patch title,
>
> v3:
> - fixed missing allwinner in front of compatible,
> - updated compatible to allwi
On Wed, 5 Apr 2017, Felipe Balbi wrote:
> >> >> --- a/drivers/usb/gadget/udc/core.c
> >> >> +++ b/drivers/usb/gadget/udc/core.c
> >> >> @@ -1273,6 +1273,7 @@ void usb_del_gadget_udc(struct usb_gadget *gadget)
> >> >> flush_work(&gadget->work);
> >> >> device_unregister(&udc->dev);
On Sat, Apr 01, 2017 at 10:25:40AM -0700, Haren Myneni wrote:
> [PATCH] crypto/nx: Update MAINTAINERS entry for 842 compression
>
> Signed-off-by: Haren Myneni
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herb
On Tue, Apr 04, 2017 at 05:09:23PM -0500, Alan Tull wrote:
> On Thu, Mar 30, 2017 at 7:08 AM, Wu Hao wrote:
> > From: Xiao Guangrong
> >
> > Device Featuer List structure creates a link list of feature headers
> > within the MMIO space to provide an extensiable way of adding features.
> >
> > The
On Tue, Apr 04, 2017 at 12:24:32PM -0500, Yazen Ghannam wrote:
> From: Yazen Ghannam
>
> Scalable MCA systems have a new MCA_CONFIG register that we use to
> configure each bank. We currently use this when we set up thresholding.
> However, this is logically separate.
>
> Group all SMCA-related
On Wed, Apr 05, 2017 at 03:52:48PM +0200, SF Markus Elfring wrote:
> From: Markus Elfring
> Date: Wed, 5 Apr 2017 09:51:33 +0200
>
> Multiplications for the size determination of memory allocations
> indicated that array data structures should be processed.
> Thus use the corresponding function "
On Wed, Apr 05, 2017 at 04:02:44PM +0200, Andrey Konovalov wrote:
> On Tue, Apr 4, 2017 at 11:14 PM, Marcelo Ricardo Leitner
> wrote:
> > On Wed, Apr 05, 2017 at 01:29:19AM +0800, Xin Long wrote:
> >> On Tue, Apr 4, 2017 at 9:28 PM, Andrey Konovalov
> >> wrote:
> >> > Hi,
> >> >
> >> > I've got
On Tue, Apr 4, 2017 at 6:36 PM, Moritz Fischer wrote:
> On Thu, Mar 30, 2017 at 05:44:29PM -0500, Rob Herring wrote:
>> On Fri, Mar 24, 2017 at 10:33:20AM -0500, Alan Tull wrote:
>> > From: Moritz Fischer
>>
>> Please use "dt-bindings: fpga: ..." for the subject.
>>
>>
>> >
>> > This adds the bin
On Tue, Apr 04, 2017 at 10:47:27AM -0700, Thomas Garnier wrote:
> diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
> index 43512d4d7df2..6d598e7051c3 100644
> --- a/arch/arm64/kernel/entry.S
> +++ b/arch/arm64/kernel/entry.S
> @@ -744,6 +744,10 @@ ENDPROC(cpu_switch_to)
> ret_fas
On Wed, Apr 5, 2017 at 4:07 PM, Jacopo Mondi wrote:
> --- /dev/null
> +++ b/include/dt-bindings/pinctrl/r7s72100-pinctrl.h
> @@ -0,0 +1,16 @@
> +/*
> + * Defines macros and constants for Renesas RZ/A1 pin controller pin
> + * muxing functions.
> + */
> +#ifndef __DT_BINDINGS_PINCTRL_RENESAS_RZA1_H
From: Eric Biggers
Date: Mon, 3 Apr 2017 22:50:20 -0700
> From: Eric Biggers
>
> Since commit d6580a9f1523 ("kexec: sysrq: simplify sysrq-c handler"),
> the sysrq handler for the 'c' key has been sysrq_crash_op. Debugging
> code in the ibm_emac driver also tries to register a handler for the
On Tue, 2017-04-04 at 13:36 -0400, Luiz Capitulino wrote:
>
> On further debugging this, I realized that I had overlooked
> something:
> the timer interrupt in this trace is not the tick, but cyclictest's
> timer
> (remember that the test-case consists of pinning cyclictest and a
> task
> hogging
On Wed, Apr 05, 2017 at 04:53:50PM +0530, Archit Taneja wrote:
> Add Laurent and Andrzej as maintainers for DRM bridge chip drivers. They
> actively review and contribute to bridge drivers and the bridge API.
>
> Cc: Laurent Pinchart
> Cc: Andrzej Hajda
Acked-by: Sean Paul
> Signed-off-by: Ar
On Wed, Apr 05, 2017 at 03:55:39PM +0200, SF Markus Elfring wrote:
> From: Markus Elfring
> Date: Wed, 5 Apr 2017 15:00:44 +0200
>
> * Replace the specification of two data structures by pointer dereferences
> to make the corresponding size determination a bit safer according to
> the Linux c
In some of NVIDIA Tegra's platform, PWM controller is used to
control the PWM controlled regulators. PWM signal is connected to
the VID pin of the regulator where duty cycle of PWM signal decide
the voltage level of the regulator output.
The tristate (high impedance of PWM pin form Tegra) also def
In some of NVIDIA Tegra's platform, PWM controller is used to
control the PWM controlled regulators. PWM signal is connected to
the VID pin of the regulator where duty cycle of PWM signal decide
the voltage level of the regulator output.
The tristate (high impedance of PWM pin form Tegra) also def
The rate of the PWM calculated as follows:
hz = NSEC_PER_SEC / period_ns;
rate = (rate + (hz / 2)) / hz;
This has the precision loss in lower PWM rate.
Changing this to have more precision as:
hz = DIV_ROUND_CLOSE(NSEC_PER_SEC * 100, period_ns);
rate = DIV_ROUND_CLO
Use macro DIV_ROUND_CLOSEST_ULL() for 64bit division to closet one
instead of implementing the same locally. This increase readability.
Signed-off-by: Laxman Dewangan
---
drivers/pwm/pwm-tegra.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/pwm/pwm-tegra.c b/drive
This patch series have following fixes:
- Add more precession in PWM period register value calculation
for lower pwm frequency.
- Add support to configure PWM pins in different state in the
suspend/resume.
Laxman Dewangan (4):
pwm: tegra: Use DIV_ROUND_CLOSEST_ULL() instead of local
impl
Finn Thain wrote:
> I can see how base addresses and IO ports are relevant, but the irq
> parameter changes below don't protect the kernel image AFAICT. What's the
> rationale for those changes? I think it should be stated here.
Easier grepping for one. But I'm also currently preventing the c
* Russell King - ARM Linux [170405 07:02]:
> On Tue, Apr 04, 2017 at 09:11:52AM -0700, Tony Lindgren wrote:
> > Russell,
> >
> > * Dave Gerlach [170328 13:57]:
> > > Certain SoCs like Texas Instruments AM335x and AM437x require parts
> > > of the EMIF PM code to run late in the suspend sequence
The USB PHY of A64 contains a "pmu0" MMIO region, which contains some control
registers for the EHCI0/OHCI0 pair on A64 SoC.
This pair is not used currently in 4.11, but when enabling it in 4.12, the
MMIO region is needed.
In order to prevent device tree compatibility breakage, add this region in
On Wed, Apr 05, 2017 at 03:51:52PM +0200, SF Markus Elfring wrote:
> From: Markus Elfring
> Date: Wed, 5 Apr 2017 09:43:54 +0200
>
> * A multiplication for the size determination of a memory allocation
> indicated that an array data structure should be processed.
> Thus use the corresponding
On Wed, Apr 5, 2017 at 7:22 AM, Catalin Marinas wrote:
> On Tue, Apr 04, 2017 at 10:47:27AM -0700, Thomas Garnier wrote:
>> diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
>> index 43512d4d7df2..6d598e7051c3 100644
>> --- a/arch/arm64/kernel/entry.S
>> +++ b/arch/arm64/kernel/en
From: Icenowy Zheng
Allwinner H3/V3s/A64 SoCs have a special USB PHY0 that can route to two
controllers: one is MUSB and the other is a EHCI/OHCI pair.
When it's routed to EHCI/OHCI pair, it will needs a "pmu0" regs to
tweak, like other EHCI/OHCI pairs in Allwinner SoCs.
Add this to the binding
From: Carlo Caione
The latest USB keyboards shipped on several ASUS laptop models
(including ROG laptop models such as GL702VMK) have the keyboards
backlight controlled by the keyboard firmware.
The firmware implements at least 3 different commands:
- Init command (to use when the system starts)
On Wed, 2017-04-05 at 15:10 +0800, Huang, Ying wrote:
> To solve the issue, the per-CPU buffer is sorted according to the
> swap
> device before freeing the swap entries. Test shows that the time
> spent by swapcache_free_entries() could be reduced after the patch.
That makes a lot of sense.
> @
toii
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The USB PHY in A64 has a "pmu0" region, which controls the EHCI/OHCI
controller pair that can be connected to the PHY0.
Add the MMIO region for PHY node.
Signed-off-by: Icenowy Zheng
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm
On Wed, Apr 05, 2017 at 07:28:46AM +0200, Ralph Sennhauser wrote:
> The LEDs for the "wan" port are already labeled "mamba:amber:wan" resp.
> "mamba:white:wan". So besides being an outlier with regard to the rest
> of the product line (see table below) changing the label fixes an
> internal inconsi
On 04/02/2017 01:16 PM, Jonathan Cameron wrote:
> On 31/03/17 12:45, Fabrice Gasnier wrote:
>> Document STMicroelectronics STM32 DAC (digital-to-analog converter).
>>
>> Signed-off-by: Fabrice Gasnier
>> ---
>> .../devicetree/bindings/iio/dac/st,stm32-dac.txt | 56
>> ++
>>
Hi,
On Wednesday, April 05, 2017 10:18:21 AM Juergen Gross wrote:
> On 23/03/17 13:52, Juergen Gross wrote:
> > Connecting to the backend isn't working reliably in xen-fbfront: in
> > case XenbusStateInitWait of the backend has been missed the backend
> > transition to XenbusStateConnected will t
On Wednesday, April 05, 2017 10:18:43 AM Juergen Gross wrote:
> On 23/03/17 13:53, Juergen Gross wrote:
> > Today xen-fbfront supports specifying the display size via module
> > parameters only. Add support for specifying the size via Xenstore in
> > order to enable doing this easily via the domain
On 04/03/2017 06:42 PM, Rob Herring wrote:
> On Fri, Mar 31, 2017 at 01:45:04PM +0200, Fabrice Gasnier wrote:
>> Document STMicroelectronics STM32 DAC (digital-to-analog converter).
>>
>> Signed-off-by: Fabrice Gasnier
>> ---
>> .../devicetree/bindings/iio/dac/st,stm32-dac.txt | 56
>>
Russell,
On 04/05/2017 09:33 AM, Tony Lindgren wrote:
* Russell King - ARM Linux [170405 07:02]:
On Tue, Apr 04, 2017 at 09:11:52AM -0700, Tony Lindgren wrote:
Russell,
* Dave Gerlach [170328 13:57]:
Certain SoCs like Texas Instruments AM335x and AM437x require parts
of the EMIF PM code to
On Wed, Apr 05, 2017 at 11:24:27AM +0200, Michal Hocko wrote:
On Wed 05-04-17 08:42:39, Michal Hocko wrote:
On Tue 04-04-17 16:43:39, Reza Arbab wrote:
> It's new. Without this patchset, I can repeatedly
> add_memory()->online_movable->offline->remove_memory() all of a node's
> memory.
This is
> -Original Message-
> From: Borislav Petkov [mailto:b...@alien8.de]
> Sent: Wednesday, April 05, 2017 9:40 AM
> To: Ghannam, Yazen
> Cc: linux-e...@vger.kernel.org; Tony Luck ;
> x...@kernel.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH v2 1/2] x86/mce/AMD: Redo use of SMCA
> MC
From: Niklas Cassel
Date: Tue, 4 Apr 2017 14:18:54 +0200
> From: Niklas Cassel
>
> Setting ethtool ops for stmmac is only allowed when the interface is up.
> Setting MTU (a netdev op) for stmmac is only allowed when the interface
> is down.
>
> It seems that the only reason why MTU cannot be c
On Wed, 05 Apr 2017, Quentin Schulz wrote:
> This patch removes the sun4i touchscreen controller binding
> documentation since it has been merged with the sun4i GPADC binding
> documentation.
>
> Signed-off-by: Quentin Schulz
> Acked-by: Rob Herring
> Acked-by: Dmitry Torokhov
> ---
>
> v4:
>
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