Re: [patch v3 2/3] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver

-core-driver/20170818-114739 config: um-allyesconfig (attached as .config) compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901 reproduce: # save the attached .config to linux build tree make ARCH=um All errors (new ones prefixed by >>): arch/um/drivers/vde.o: In fu

Re: [RFC PATCH v3] pci: Concurrency issue during pci enable bridge

On Wed, Aug 16, 2017 at 10:33:12PM +0530, Srinath Mannam wrote: > Hi Bjorn, > > Thank you for the feedback. > > My comments are in lined. > > On Wed, Aug 16, 2017 at 7:13 PM, Bjorn Helgaas wrote: > > On Fri, Aug 04, 2017 at 08:27:28PM +0530, Srinath Mannam wrote: > >>

[PATCH] ipr: Set no_report_opcodes for RAID arrays

Since ipr RAID arrays do not support the MAINTENANCE_IN / MI_REPORT_SUPPORTED_OPERATION_CODES, set no_report_opcodes to prevent it from being sent. Signed-off-by: Brian King --- Index: linux-2.6.git/drivers/scsi/ipr.c

Re: [PATCH] perf tools: Add ARM Statistical Profiling Extensions (SPE) support

On Fri, 18 Aug 2017 17:59:25 +0100 Mark Rutland wrote: > On Mon, Jul 17, 2017 at 07:48:22PM -0500, Kim Phillips wrote: > > On Fri, 30 Jun 2017 15:02:41 +0100 Mark Rutland > > wrote: > > > On Wed, Jun 28, 2017 at 08:43:10PM -0500, Kim Phillips wrote:

RE: [PATCH net-next 3/3] hv_sock: implements Hyper-V transport for Virtual Sockets (AF_VSOCK)

> From: Stefan Hajnoczi [mailto:stefa...@redhat.com] > Sent: Thursday, August 17, 2017 07:56 > To: Dexuan Cui > On Tue, Aug 15, 2017 at 10:18:41PM +, Dexuan Cui wrote: > > +static u32 hvs_get_local_cid(void) > > +{ > > + return VMADDR_CID_ANY; > > +} > > Interesting

Re: [PATCH] selftests: timers: Fix run_destructive_tests target to handle skipped tests

On 08/18/2017 04:13 PM, John Stultz wrote: > On Thu, Aug 17, 2017 at 3:48 PM, Shuah Khan wrote: >> When a test exits with skip exit code of 4, "make run_destructive_tests" >> halts testing. Fix run_destructive_tests target to handle error exit codes. >> >> Reported-by:

Re: [PATCH v3] net: inet: diag: expose sockets cgroup classid

From: "Levin, Alexander (Sasha Levin)" Date: Thu, 17 Aug 2017 00:35:11 + > From: "Levin, Alexander (Sasha Levin)" > > This is useful for directly looking up a task based on class id rather than > having to scan through all open

[PATCH] net: ibm: emac: Fix some error handling path in 'emac_probe()'

If 'irq_of_parse_and_map()' or 'of_address_to_resource()' fail, 'err' is known to be 0 at this point. So return -ENODEV instead in the first case and propagate the error returned by 'of_address_to_resource()' in the 2nd case. While at it, turn a 'err != 0' test into an equivalent 'err' to be more

[PATCH v8 23/28] x86: Add emulation code for UMIP instructions

The feature User-Mode Instruction Prevention present in recent Intel processor prevents a group of instructions (sgdt, sidt, sldt, smsw, and str) from being executed with CPL > 0. Otherwise, a general protection fault is issued. Rather than relaying to the user space the general protection fault

[PATCH v8 21/28] x86/insn-eval: Add support to resolve 16-bit addressing encodings

Tasks running in virtual-8086 mode, in protected mode with code segment descriptors that specify 16-bit default address sizes via the D bit, or via an address override prefix will use 16-bit addressing form encodings as described in the Intel 64 and IA-32 Architecture Software Developer's Manual

[PATCH v8 24/28] x86/umip: Force a page fault when unable to copy emulated result to user

fixup_umip_exception() will be called from do_general_protection(). If the former returns false, the latter will issue a SIGSEGV with SEND_SIG_PRIV. However, when emulation is successful but the emulated result cannot be copied to user space memory, it is more accurate to issue a SIGSEGV with

[PATCH v8 05/28] x86/mpx: Use signed variables to compute effective addresses

Even though memory addresses are unsigned, the operands used to compute the effective address do have a sign. This is true for ModRM.rm, SIB.base, SIB.index as well as the displacement bytes. Thus, signed variables shall be used when computing the effective address from these operands. Once the

[PATCH v8 22/28] x86/cpufeature: Add User-Mode Instruction Prevention definitions

User-Mode Instruction Prevention is a security feature present in new Intel processors that, when set, prevents the execution of a subset of instructions if such instructions are executed in user mode (CPL > 0). Attempting to execute such instructions causes a general protection exception. The

[PATCH v8 20/28] x86/insn-eval: Handle 32-bit address encodings in virtual-8086 mode

It is possible to utilize 32-bit address encodings in virtual-8086 mode via an address override instruction prefix. However, the range of the effective address is still limited to [0x-0x]. In such a case, return error. Also, linear addresses in virtual-8086 mode are limited to 20 bits.

[PATCH] staging: lustre: uapi: properly include lustre_errno.h

The path for lustre_errno.h was not updated to the new path for errno.c. Also the header lustre_net.h uses code found in lustre_errno.h but doesn't include the header directly. It is easy to forget to add the header lustre_errno.h before including lustre_net.h so it is just easier to include

RE: [PATCH net-next 2/3] vsock: fix vsock_dequeue/enqueue_accept race

> From: Stefan Hajnoczi [mailto:stefa...@redhat.com] > Sent: Thursday, August 17, 2017 07:06 > > On Tue, Aug 15, 2017 at 10:15:39PM +, Dexuan Cui wrote: > > With the current code, when vsock_dequeue_accept() is removing a sock > > from the list, nothing prevents vsock_enqueue_accept() from

[PATCH v11 2/4] PCI: Factor out pci_bus_wait_crs()

From: Sinan Kaya Configuration Request Retry Status (CRS) was previously hidden inside pci_bus_read_dev_vendor_id(). We want to add support for CRS in other situations, such as waiting for a device to become ready after a Function Level Reset. Move CRS handling into

[PATCH v11 1/4] PCI: Don't ignore valid response before CRS timeout

While waiting for a device to become ready (i.e., to return a non-CRS completion to a read of its Vendor ID), if we got a valid response to the very last read before timing out, we printed a warning and gave up on the device even though it was actually ready. For a typical 60s timeout, we wait

[PATCH v11 0/4] PCI: Use CRS Software Visibility to wait for device to become ready

This is another rev of Sinan's series to fix an FLR issue seen with an Intel 750 NVMe drive. It seems that the 750 requires more time than we currently allow after the FLR to become ready for use. The biggest remaining issue is that I *think* this does not fix the issue on systems where CRS

[PATCH v11 3/4] PCI: Handle CRS ("device not ready") returned by device after FLR

From: Sinan Kaya XXX I think this needs to somehow use the same timeout for the PCI_COMMAND loop as for the CRS part, so this works on machines without CRS Software Visibility. -- bhelgaas Sporadic reset issues have been observed with Intel 750 NVMe drive while assigning

[PATCH] Makefile: add kselftest-clean to PHOMY target list

kselftest-clean isn't in the PHONY target list. Add it. Signed-off-by: Shuah Khan --- Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/Makefile b/Makefile index b4fb9a1d1594..eccb8d704c23 100644 --- a/Makefile +++ b/Makefile @@ -1184,6 +1184,7 @@ PHONY +=

Re: [BUG][bisected 270065e] linux-next fails to boot on powerpc

On Fri, 2017-08-18 at 16:04 -0500, Brian King wrote: > I think I have an understanding what is going on and why Bart's patch is > causing problems for ipr. > I can work around the boot hang in ipr, but ultimately I think we need to > figure out a fix > in scsi / block. I added some tracing and

[PATCH RFC 1/2] Revert "sched/fair: Drop always true parameter of update_cfs_rq_load_avg()"

This reverts commit 3a12310d54dbdde6ccbbd519c74c91ba2f52. Its needed by the series for controlling whether cpufreq is notified about updating frequency during an update to the utilization. Cc: Srinivas Pandruvada Cc: Len Brown Cc:

Re: [PATCH] selftests: timers: Fix run_destructive_tests target to handle skipped tests

On Thu, Aug 17, 2017 at 3:48 PM, Shuah Khan wrote: > When a test exits with skip exit code of 4, "make run_destructive_tests" > halts testing. Fix run_destructive_tests target to handle error exit codes. > > Reported-by: John Stultz >

mmotm 2017-08-18-15-43 uploaded

The mm-of-the-moment snapshot 2017-08-18-15-43 has been uploaded to http://www.ozlabs.org/~akpm/mmotm/ mmotm-readme.txt says README for mm-of-the-moment: http://www.ozlabs.org/~akpm/mmotm/ This is a snapshot of my -mm patch queue. Uploaded at random hopefully more than once a week. You

Re: [PATCH] arm64: dts: rk3399: init vop clock rates

Am Mittwoch, 16. August 2017, 10:51:09 CEST schrieb Kever Yang: > We need to init vop aclk and hclk incase the U-Boot does not do > the initialize. > > Signed-off-by: Kever Yang applied for 4.14 with Marks review-tag after adapting the patch subject and moving the

Re: [PATCH net] rxrpc: Fix oops when discarding a preallocated service call

From: David Howells Date: Fri, 18 Aug 2017 00:19:42 +0100 > rxrpc_service_prealloc_one() doesn't set the socket pointer on any new call > it preallocates, but does add it to the rxrpc net namespace call list. > This, however, causes rxrpc_put_call() to oops when the call is

Re: [PATCH] platform/x86: intel_pmc_core: Add Package C-states residency info

Hello, On Fri, Aug 18, 2017 at 10:47 AM, Rajneesh Bhardwaj wrote: > On Fri, Aug 18, 2017 at 08:17:32PM +0300, Andy Shevchenko wrote: >> +PeterZ (since I mentioned his name) >> >> On Fri, Aug 18, 2017 at 5:58 PM, Rajneesh Bhardwaj >>

[RFC][PATCH] kselftests: timers: leap-a-day: Change default arguments to help test runs

Change default arguments for leap-a-day to always set the time each iteration (rather then waiting for midnight UTC), and to only run 10 interations (rather then infinite). If one wants to wait for midnight UTC, they can use the new -w flag, and we add a note to the argument help that -i -1 will

Re: [PATCH] mlx5: ensure 0 is returned when vport is zero

From: Colin King Date: Fri, 18 Aug 2017 14:49:25 +0100 > From: Colin Ian King > > Currently, if vport is zero then then an uninialized return status > in err is returned. Since the only return status at the end of the > function

[PATCH v8 17/28] x86/insn-eval: Incorporate segment base in linear address computation

insn_get_addr_ref() returns the effective address as defined by the section 3.7.5.1 Vol 1 of the Intel 64 and IA-32 Architectures Software Developer's Manual. In order to compute the linear address, we must add to the effective address the segment base address as set in the segment descriptor. The

[PATCH v8 18/28] x86/insn-eval: Add support to resolve 32-bit address encodings

32-bit and 64-bit address encodings are identical. Thus, the same logic could be used to resolve the effective address. However, there are two key differences: address size and enforcement of segment limits. If running a 32-bit process on a 64-bit kernel, it is best to perform the address

[PATCH v8 08/28] x86/mpx, x86/insn: Relocate insn util functions to a new insn-eval file

Other kernel submodules can benefit from using the utility functions defined in mpx.c to obtain the addresses and values of operands contained in the general purpose registers. An instance of this is the emulation code used for instructions protected by the Intel User-Mode Instruction Prevention

[PATCH v8 10/28] x86/insn-eval: Add a utility function to get register offsets

The function get_reg_offset() returns the offset to the register the argument specifies as indicated in an enumeration of type offset. Callers of this function would need the definition of such enumeration. This is not needed. Instead, add helper functions for this purpose. These functions are

Re: [PATCH 0/3] MIPS,bpf: Improvements for MIPS eBPF JIT

On 08/19/2017 01:40 AM, David Daney wrote: Here are several improvements and bug fixes for the MIPS eBPF JIT. The main change is the addition of support for JLT, JLE, JSLT and JSLE ops, that were recently added. Also fix WARN output when used with preemptable kernel, and a small

[PATCH] iio: accel: mma8452: code improvements to handle more than one event

This driver supports multiple devices like mma8653, mma8652, mma8452, mma8453 and fxls8471. Almost all these devices have more than one event. Current driver design hardcodes the event specific information, so only one event can be supported by this driver and current design doesn't have the

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[PATCH net-next] i40e: fix a typo in i40e_pf documentation.

This patch fixes a typo in i40e_pf object documentation; num_req_vfs refers to the number of VFs requested for the PF. Signed-off-by: Rami Rosen --- drivers/net/ethernet/intel/i40e/i40e.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

Re: [PATCH] um: Fix check for _xstate for older hosts

On 07/24/2017 05:46 AM, Richard Weinberger wrote: > On Wed, Jul 19, 2017 at 1:43 AM, Florian Fainelli > wrote: >> Commit 0a987645672e ("um: Allow building and running on older >> hosts") attempted to check for PTRACE_{GET,SET}REGSET under the premise >> that these ptrace(2)

Re: [PATCH 4/4] drm/tegra: Use u64_to_user_ptr helper

On 18.08.2017 19:15, Mikko Perttunen wrote: > Use the u64_to_user_ptr helper macro to cast IOCTL argument u64 values > to user pointers instead of writing out the cast manually. > > Signed-off-by: Mikko Perttunen > --- > drivers/gpu/drm/tegra/drm.c | 9 - > 1 file

Re: [PATCH v4 6/8] ARM: dts: rockchip: add pwm backlight for rv1108 evb

Am Montag, 14. August 2017, 16:42:47 CEST schrieb Andy Yan: > RV1108 EVB uses pwm0 modulate the backlight, add dt > node to enable it. > > Signed-off-by: Andy Yan applied for 4.14 after adapting to the mainline chosen node above it. Thanks Heiko

Re: [PATCH v3] sctp: fully initialize the IPv6 address in sctp_v6_to_addr()

From: Alexander Potapenko Date: Wed, 16 Aug 2017 20:16:40 +0200 > KMSAN reported use of uninitialized sctp_addr->v4.sin_addr.s_addr and > sctp_addr->v6.sin6_scope_id in sctp_v6_cmp_addr() (see below). > Make sure all fields of an IPv6 address are initialized, which >

Re: Urgent

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Re: [PATCH] staging: lustre: fix structure size for ARM OABI

On Aug 17, 2017, at 10:26, Greg KH wrote: > > On Wed, Aug 16, 2017 at 05:44:15PM +0300, Cihangir Akturk wrote: >> When building the kernel for the ARM architecture without setting >> CONFIG_AEABI, size of struct lov_user_md_v3 and struct lov_mds_md_v3 >> differs, due

[PATCH v8 16/28] x86/insn-eval: Indicate a 32-bit displacement if ModRM.mod is 0 and ModRM.rm is 101b

Section 2.2.1.3 of the Intel 64 and IA-32 Architectures Software Developer's Manual volume 2A states that when ModRM.mod is zero and ModRM.rm is 101b, a 32-bit displacement follows the ModRM byte. This means that none of the registers are used in the computation of the effective address. A return

[PATCH v8 14/28] x86/insn-eval: Add utility functions to get segment descriptor base address and limit

With segmentation, the base address of the segment is needed to compute a linear address. This base address is obtained from the applicable segment descriptor. Such segment descriptor is referenced from a segment selector. The segment selector is stored in the segment register associated with

[PATCH v8 04/28] uprobes/x86: Use existing definitions for segment override prefixes

Rather than using hard-coded values of the segment override prefixes, leverage the existing definitions provided in inat.h. Suggested-by: Borislav Petkov Cc: Andy Lutomirski Cc: Andrew Morton Cc: Borislav Petkov Cc:

[PATCH v8 19/28] x86/insn-eval: Add wrapper function for 32 and 64-bit addresses

The function insn_get_addr_ref() is capable of handling only 64-bit addresses. A previous commit introduced a function to handle 32-bit addresses. Invoke these two functions from a third wrapper function that calls the appropriate routine based on the address size specified in the instruction

Re: [PATCH v2 3/3] vfio/pci: Don't probe devices that can't be reset

On Fri, 18 Aug 2017 08:57:09 -0700 David Daney wrote: > On 08/18/2017 07:12 AM, Alex Williamson wrote: > > On Fri, 18 Aug 2017 15:42:31 +0200 > > Jan Glauber wrote: > > > >> On Thu, Aug 17, 2017 at 07:00:17AM -0600, Alex Williamson

[PATCH v2 1/1] usb:xhci: update condition to select bus->sysdev from parent device

From: "Thang Q. Nguyen" For commit 4c39d4b949d3 ("usb: xhci: use bus->sysdev for DMA configuration"), sysdev points to devices known to the system firmware or hardware for DMA parameters. However, the parent of the system firmware/hardware device checking logic does not work in

[PATCH] X.509: Fix the buffer overflow in the utility function for OID string

From: Takashi Iwai The sprint_oid() utility function doesn't properly check the buffer size that it causes that the warning in vsnprintf() be triggered. For example on v4.1 kernel: [ 49.612536] [ cut here ] [ 49.612543] WARNING: CPU: 0 PID: 2357 at

Re: [PATCH v2] sched/fair: Make PELT signal more accurate

On Fri, 2017-08-18 at 16:50 -0700, Joel Fernandes wrote: > The PELT signal (sa->load_avg and sa->util_avg) are not updated if the amount > accumulated during a single update doesn't cross a period boundary. This is > fine in cases where the amount accrued is much smaller than the size of a >

Re: 32-bit powerpc, aty128fb: vmap allocation for size 135168 failed

> Meelis Roos writes: > > > I was trying 4.13.0-rc5-00075-gac9a40905a61 on my PowerMac G4 with 1G > > RAM and after some time of sddm respawning and X trying to restart, > > dmesg is full of messages about vmap allocation failures. > > Did it just start happening? ie. did rc4

Re: [PATCH] staging: lustre: uapi: properly include lustre_errno.h

On Fri, Aug 18, 2017 at 11:04:14PM -0400, James Simmons wrote: > The path for lustre_errno.h was not updated to the new path > for errno.c. Also the header lustre_net.h uses code found in > lustre_errno.h but doesn't include the header directly. It > is easy to forget to add the header

[PATCH v2] membarrier: Document scheduler barrier requirements

Document the membarrier requirement on having a full memory barrier in __schedule() after coming from user-space, before storing to rq->curr. It is provided by smp_mb__before_spinlock() in __schedule(). Document that membarrier requires a full barrier on transition from kernel thread to userspace

Re: [PATCH] X.509: Fix the buffer overflow in the utility function for OID string

On Sat, 19 Aug 2017 06:19:44 +0200, Lee, Chun-Yi wrote: > > From: Takashi Iwai > > The sprint_oid() utility function doesn't properly check the buffer > size that it causes that the warning in vsnprintf() be triggered. > For example on v4.1 kernel: > > [ 49.612536]

Re: [f2fs-dev] [PATCH v3] f2fs: add cur_reserved_blocks to support soft block reservation

On 2017/8/18 23:09, Yunlong Song wrote: > This patch adds cur_reserved_blocks to extend reserved_blocks sysfs > interface to be soft threshold, which allows user configure it exceeding > current available user space. To ensure there is enough space for > supporting system's activation, this patch

Re: [PATCH v2 09/16] dmaengine: bcm-sba-raid: Improve sba_issue_pending() run duration

On Thu, Aug 17, 2017 at 12:06 PM, Vinod Koul wrote: > On Tue, Aug 01, 2017 at 04:07:53PM +0530, Anup Patel wrote: >> The pending sba_request list can become very long in real-life usage >> (e.g. setting up RAID array) which can cause sba_issue_pending() to >> run for long

Re: [PATCH 0/5] add support for relative references in special sections

On 18 August 2017 at 07:29, Sergey Senozhatsky wrote: > Hi Ard, > > On (08/18/17 07:12), Ard Biesheuvel wrote: >> Hi Sergey, >> >> Thanks for taking a look >> >> On 18 August 2017 at 06:56, Sergey Senozhatsky >> wrote: >> > On

[PATCH v7 2/2] sched/rt: Add support for SD_PREFER_SIBLING on find_lowest_rq()

It would be better to avoid pushing tasks to other cpu within a SD_PREFER_SIBLING domain, instead, get more chances to check other siblings. Signed-off-by: Byungchul Park --- kernel/sched/rt.c | 56 --- 1 file changed,

Re: [PATCH 1/2] hwmon: (ltq-cputemp) add cpu temp sensor for xrx200

On 08/17/2017 05:53 AM, Florian Eckert wrote: Add the lantiq cpu temperature sensor support for xrx200. Signed-off-by: Florian Eckert --- drivers/hwmon/Kconfig | 8 +++ drivers/hwmon/Makefile | 1 + drivers/hwmon/ltq-cputemp.c | 155

[PATCH v7 1/2] sched/deadline: Add support for SD_PREFER_SIBLING on find_later_rq()

It would be better to avoid pushing tasks to other cpu within a SD_PREFER_SIBLING domain, instead, get more chances to check other siblings. Signed-off-by: Byungchul Park --- kernel/sched/deadline.c | 55 ++--- 1 file changed,

Re: [PATCH v2 03/16] dmaengine: bcm-sba-raid: Common flags for sba_request state and fence

On Fri, Aug 18, 2017 at 10:55 AM, Vinod Koul wrote: > On Fri, Aug 18, 2017 at 10:26:54AM +0530, Anup Patel wrote: >> On Thu, Aug 17, 2017 at 9:15 AM, Vinod Koul wrote: >> > On Tue, Aug 01, 2017 at 04:07:47PM +0530, Anup Patel wrote: >> >> This patch

[PATCH v3 net 0/2] net: ixgbe: Use new flag to disable Relaxed Ordering

From: Mao Wenan The new flag PCI_DEV_FLAGS_NO_RELAXED_ORDERING has been added to indicate that Relaxed Ordering Attributes (RO) should not be used for Transaction Layer Packets (TLP) targeted toward these affected Root Port, it will clear the bit4 in the PCIe Device Control

[PATCH v3 net 1/2] Revert commit 1a8b6d76dc5b ("net:add one common config...")

The new flag PCI_DEV_FLAGS_NO_RELAXED_ORDERING has been added to indicate that Relaxed Ordering Attributes (RO) should not be used for Transaction Layer Packets (TLP) targeted toward these affected Root Port, it will clear the bit4 in the PCIe Device Control register, so the PCIe device drivers

[PATCH v3 net 2/2] net: ixgbe: Use new PCI_DEV_FLAGS_NO_RELAXED_ORDERING flag

The ixgbe driver use the compile check to determine if it can send TLPs to Root Port with the Relaxed Ordering Attribute set, this is too inconvenient, now the new flag PCI_DEV_FLAGS_NO_RELAXED_ORDERING has been added to the kernel and we could check the bit4 in the PCIe Device Control register to

RE: [PATCH v7 0/2] Make find_later_rq() choose a closer cpu in topology

From: Byungchul Park [mailto:byungchul.p...@lge.com] > Change from v6 >-. add a comment about selection of fallback_cpu incase more than one > exist >-. modify a comment explaining what we do wrt PREFER_SIBLING I could add supplementary comments, thank to Steven and Joel. Thank you very

Re: [PATCH v4] bcache: Don't reinvent the wheel but use existing llist API

On 2017/8/18 上午9:24, Byungchul Park wrote: > On Fri, Aug 11, 2017 at 01:42:23PM +0900, Byungchul Park wrote: >> Although llist provides proper APIs, they are not used. Make them used. > > Any opinions about this? > The patch is good. If Eric has no time, I will take care of it later. Thanks.

Re: [PATCH 0/5] add support for relative references in special sections

Hi Ard, On (08/18/17 07:12), Ard Biesheuvel wrote: > Hi Sergey, > > Thanks for taking a look > > On 18 August 2017 at 06:56, Sergey Senozhatsky > wrote: > > On (08/14/17 11:52), Ard Biesheuvel wrote: > >> This adds support for emitting special sections such

Re: [linux-sunxi] [PATCH 2/4] drivers: soc: sunxi: fix error processing on base address when claiming

On Fri, Aug 18, 2017 at 2:23 PM, Icenowy Zheng wrote: > > > 于 2017年8月18日 GMT+08:00 下午2:21:07, Chen-Yu Tsai 写到: >>Hi, >> >>On Wed, Aug 9, 2017 at 4:56 PM, Icenowy Zheng wrote: >>> When claiming SRAM, if the base is set to an error, it means that

[PATCH v7 0/2] Make find_later_rq() choose a closer cpu in topology

When cpudl_find() returns any among free_cpus, the cpu might not be closer than others, considering sched domain. For example: this_cpu: 15 free_cpus: 0, 1,..., 14 (== later_mask) best_cpu: 0 topology: 0 --+ +--+ 1 --+ | +-- ... --+ 2 --+ | |

Re: [linux-sunxi] [PATCH 4/4] drivers: soc: sunxi: add support for A64 and its SRAM C

On Mon, Aug 14, 2017 at 5:48 PM, Chen-Yu Tsai wrote: > On Wed, Aug 9, 2017 at 4:56 PM, Icenowy Zheng wrote: >> Allwinner A64's display engine claims the SRAM C section to work. >> >> Add support for the A64 SRAM controller and the SRAM C section of it. >> >>

Re: [PATCH v4] bcache: Don't reinvent the wheel but use existing llist API

On Fri, Aug 18, 2017 at 02:04:20PM +0800, Coly Li wrote: > On 2017/8/18 上午9:24, Byungchul Park wrote: > > On Fri, Aug 11, 2017 at 01:42:23PM +0900, Byungchul Park wrote: > >> Although llist provides proper APIs, they are not used. Make them used. > > > > Any opinions about this? > > > > The

[PATCH v2 1/2] Input: Add driver for Cypress Generation 5 touchscreen

This is the basic driver for the Cypress TrueTouch Gen5 touchscreen controllers. This driver supports only the I2C bus but it uses regmap so SPI support could be added later. The touchscreen can retrieve some defined zone that are handled as buttons (according to the hardware). That is why it

[PATCH v2 0/2] Input: Add Cypress Gen5 Touchscreen driver

Hi everyone, Here is a V2 serie to add the driver of the touchscreen Cypress, TrueTouch Generation 5. Based on last linux-next tag (next-20170817), last commit bb70832dd42b. This touchscreen is similar to Cypress generation 4 but the registers are different. This driver uses regmap as it is

Re: [linux-sunxi] [PATCH 2/4] drivers: soc: sunxi: fix error processing on base address when claiming

于 2017年8月18日 GMT+08:00 下午2:21:07, Chen-Yu Tsai 写到: >Hi, > >On Wed, Aug 9, 2017 at 4:56 PM, Icenowy Zheng wrote: >> When claiming SRAM, if the base is set to an error, it means that the >> SRAM controller has been probed, but failed to remap the controller >>

[PATCH v2 2/2] dt-bindings: input: Add documentation for cyttsp5

Add the Cypress TrueTouch Generation 5 touchscreen device tree bindings documentation. It can use I2C or SPI bus. This touchscreen can handle some defined zone that are designed and sent as button. To be able to customize the keycode sent, the "linux,keycodes" property can be used. Signed-off-by:

Re: [PATCH 0/5] add support for relative references in special sections

Hi Sergey, Thanks for taking a look On 18 August 2017 at 06:56, Sergey Senozhatsky wrote: > On (08/14/17 11:52), Ard Biesheuvel wrote: >> This adds support for emitting special sections such as initcall arrays, >> PCI fixups and tracepoints as relative

[PATCH v11 4/4] PCI: Warn periodically while waiting for device to become ready

From: Sinan Kaya Add a print statement in pci_bus_wait_crs() so that user observes the progress of device polling instead of silently waiting for timeout to be reached. Signed-off-by: Sinan Kaya [bhelgaas: check for timeout first so we don't print

Re: [PATCH] um: Fix check for _xstate for older hosts

Am Freitag, 18. August 2017, 23:40:36 CEST schrieb Florian Fainelli: > On 07/24/2017 05:46 AM, Richard Weinberger wrote: > > On Wed, Jul 19, 2017 at 1:43 AM, Florian Fainelli wrote: > >> Commit 0a987645672e ("um: Allow building and running on older > >> hosts") attempted to

Re: [GIT PULL] apparmor updates for next

On 08/18/2017 02:22 PM, James Morris wrote: > On Fri, 18 Aug 2017, John Johansen wrote: > >> Hi James, >> >> Please pull these apparmor changes for next. >> >> Thanks! >> >> -Kees >> > > Just wondering why this is signed '-Kees' -- copy & paste from Kees' > seccomp pull request? > > haha

Re: [BUG][bisected 270065e] linux-next fails to boot on powerpc

On 08/18/2017 04:41 PM, Bart Van Assche wrote: > On Fri, 2017-08-18 at 16:04 -0500, Brian King wrote: >> I think I have an understanding what is going on and why Bart's patch is >> causing problems for ipr. >> I can work around the boot hang in ipr, but ultimately I think we need to >> figure

Re: [PATCH v4 4/8] ARM: dts: rockchip: add pwm dt node for rv1108

Am Montag, 14. August 2017, 16:40:26 CEST schrieb Andy Yan: > Add pwm device tree node for rv1108 soc > > Signed-off-by: Andy Yan > applied for 4.14, after properly sorting properties and adding a missing newline. Thanks Heiko

Re: [PATCH 4.12 47/65] usb:xhci:Add quirk for Certain failing HP keyboard on reset after resume

On Fri, Aug 18, 2017 at 09:02:48PM +0100, Ben Hutchings wrote: > On Mon, 2017-08-14 at 18:19 -0700, Greg Kroah-Hartman wrote: > > 4.12-stable review patch.  If anyone has any objections, please let me know. > > > > -- > > > > From: Sandeep Singh > > > >

Re: [PATCH v2 09/22] fpga: intel: pcie: adds fpga_for_each_port callback for fme device

On Thu, Aug 17, 2017 at 04:31:56PM -0500, Alan Tull wrote: > On Sun, Jun 25, 2017 at 8:52 PM, Wu Hao wrote: > > Hi Hao, > > > For FPGA Management Engine (FME), it requires fpga_for_each_port callback > > for actions on ports, so export this function from PCIe driver by adding

Re: [PATCH v4 0/5] iio: srf08: add support for similar devices and triggered buffers

On Fri, 18 Aug 2017 00:08:29 +0200 Andreas Klinger wrote: For some reason my laptop hadn't picked up this posting until just now. Too many random wifi hotspots I guess. Anyhow given the rebase was trivial I'll stick with V3 for everything. Wolfram can pickup patch 1 whenever

[PATCH v1] [media] uvcvideo: mark buffer error where overflow

Some cameras post inaccurate frame where next frame data overlap it. this results in screen flicker, and it need to be prevented. So this patch marks the buffer error to discard the frame where buffer overflow. Signed-off-by: Baoyou Xie ---

[PATCH v9 3/3] PCI: dwc: qcom: Add support for IPQ8074 PCIe controller

Add support for the IPQ8074 PCIe controller. IPQ8074 supports Gen 1/2, one lane, two PCIe root complex with support for MSI and legacy interrupts, and it conforms to PCI Express Base 2.1 specification. The core init is the similar to the existing SoC, however the clocks and reset lines differ.

[PATCH v9 2/3] dt-bindings: pci: qcom: Add support for IPQ8074

Add support for the IPQ8074 PCIe controller. IPQ8074 supports Gen 1/2, one lane, two PCIe root complex with support for MSI and legacy interrupts, and it conforms to PCI Express Base 2.1 specification. Acked-by: Rob Herring Signed-off-by: Varadarajan Narayanan

[PATCH v9 1/3] PCI: dwc: qcom: Use block IP version for operations

Presently, when support for a new SoC is added, the driver ops structures and functions are versioned with plain 1, 2, 3 etc. Instead use the block IP version number. Acked-by: Stanimir Varbanov Signed-off-by: Varadarajan Narayanan ---

[PATCH v9 0/3] Add support for IPQ8074 PCIe phy and controller

v9: Incorporate Stanimir's feedback for PCI: dwc: qcom: Add support for IPQ8074 PCIe controller Add Stanimir's Ack for PCI: dwc: qcom: Use block IP version for operations PCI: dwc: qcom: Add support for IPQ8074 PCIe controller Add Rob's Ack for dt-bindings:

[GIT PULL] a dma-mapping for 4.13-rc

The following changes since commit ef954844c7ace62f773f4f23e28d2d915adc419f: Linux 4.13-rc5 (2017-08-13 16:01:32 -0700) are available in the git repository at: git://git.infradead.org/users/hch/dma-mapping.git tags/dma-mapping-4.13-3 for you to fetch changes up to

Re: [PATCH v14 3/5] virtio-balloon: VIRTIO_BALLOON_F_SG

On 08/18/2017 10:22 AM, Michael S. Tsirkin wrote: +static void send_balloon_page_sg(struct virtio_balloon *vb, +struct virtqueue *vq, +void *addr, +uint32_t size) +{ + unsigned int len; +

[PATCH 09/13] ALSA: ppc: constify snd_pcm_ops structures

snd_pcm_ops are not supposed to change at runtime. All functions working with snd_pcm_ops provided by work with const snd_pcm_ops. So mark the non-const structs as const. Signed-off-by: Arvind Yadav --- sound/ppc/pmac.c| 4 ++-- sound/ppc/snd_ps3.c | 2 +- 2

[PATCH 11/13] ALSA: sparc: constify snd_pcm_ops structures

snd_pcm_ops are not supposed to change at runtime. All functions working with snd_pcm_ops provided by work with const snd_pcm_ops. So mark the non-const structs as const. Signed-off-by: Arvind Yadav --- sound/sparc/amd7930.c | 4 ++-- sound/sparc/cs4231.c | 4 ++--

[PATCH 13/13] ALSA: usb: constify snd_pcm_ops structures

snd_pcm_ops are not supposed to change at runtime. All functions working with snd_pcm_ops provided by work with const snd_pcm_ops. So mark the non-const structs as const. Signed-off-by: Arvind Yadav --- sound/usb/6fire/pcm.c | 2 +- sound/usb/caiaq/audio.c

[PATCH 12/13] ALSA: spi: constify snd_pcm_ops structures

snd_pcm_ops are not supposed to change at runtime. All functions working with snd_pcm_ops provided by work with const snd_pcm_ops. So mark the non-const structs as const. Signed-off-by: Arvind Yadav --- sound/spi/at73c213.c | 2 +- 1 file changed, 1 insertion(+), 1

[PATCH 06/13] ALSA: mips: constify snd_pcm_ops structures

snd_pcm_ops are not supposed to change at runtime. All functions working with snd_pcm_ops provided by work with const snd_pcm_ops. So mark the non-const structs as const. Signed-off-by: Arvind Yadav --- sound/mips/hal2.c | 4 ++-- sound/mips/sgio2audio.c | 6

[PATCH 10/13] ALSA: sh: constify snd_pcm_ops structures

snd_pcm_ops are not supposed to change at runtime. All functions working with snd_pcm_ops provided by work with const snd_pcm_ops. So mark the non-const structs as const. Signed-off-by: Arvind Yadav --- sound/sh/aica.c | 2 +- sound/sh/sh_dac_audio.c | 2 +-

[PATCH 07/13] ALSA: parisc: constify snd_pcm_ops structures

snd_pcm_ops are not supposed to change at runtime. All functions working with snd_pcm_ops provided by work with const snd_pcm_ops. So mark the non-const structs as const. Signed-off-by: Arvind Yadav --- sound/parisc/harmony.c | 4 ++-- 1 file changed, 2

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