On Fri, Nov 10, 2017 at 02:36:04PM +0800, Chunyan Zhang wrote:
> This file defines all SC9860 clock indexes, it should be included in the
> device tree in which there's device using the clocks.
>
> Signed-off-by: Chunyan Zhang
> ---
> include/dt-bindings/clock/sprd,sc9860-clk.h | 408
>
x86 can return to user-space through sysexit and sysretq, which are not
core serializing. This breaks expectations from user-space about
sequential consistency from a single-threaded self-modifying program
point of view in specific migration patterns.
Feedback is welcome,
Thanks,
Mathieu
Introduce an architecture function that ensures the current CPU
issues a core serializing instruction before returning to usermode.
This is needed to fix an existing core serialization bug on
thread migration, and also needed by the membarrier "sync_core" command.
Architectures defining the
x86 has a missing core serializing instruction in migration scenarios.
Given that x86-32 can return to user-space with sysexit, and x86-64
through sysretq and sysexit, which are not core serializing, the
following user-space self-modifiying code (JIT) scenario can occur:
CPU 0
On 07.11.2017 18:29, Dmitry Osipenko wrote:
> On 07.11.2017 16:11, Mikko Perttunen wrote:
>> On 05.11.2017 19:14, Dmitry Osipenko wrote:
>>> On 05.11.2017 14:01, Mikko Perttunen wrote:
Add an option to host1x_channel_request to interruptibly wait for a
free channel. This allows IOCTLs
Hello all,
I'm looking at the file ipc/mqueue.c and I found what I believe to be a
bug, but I would love it if someone corrected me or confirmed this.
In the wq_add() function, it appears that the task is added to the wait
queue using the static priority, which I believe equates to the
On Tue, Nov 07, 2017 at 03:20:53PM +0800, Ran Wang wrote:
> Adds qoriq usb 3.0 phy driver to implement erratum related workaround
> for qoriq SoC.
>
> Signed-off-by: Sriram Dash
> Signed-off-by: Ran Wang
> ---
> Change in v2:
> - Replace funciont __raw_writel() by iowrite32be()
> -
Dear Friend,
I am Mr. James Udo, a computer scientist with UBA Bank. I am 29 years old, just
started work with UBA Bank. I came across your (B) file which was marked X and
your released D disk painted RED, I took time to study it and found out that
you have paid VIRTUALLY all fees and
> -Original Message-
> From: Kishon Vijay Abraham I [mailto:kis...@ti.com]
> Sent: Friday, November 10, 2017 12:22 AM
> To: Xiaowei Bao ; robh...@kernel.org;
> mark.rutl...@arm.com; catalin.mari...@arm.com; will.dea...@arm.com;
> bhelg...@google.com; shawn...@kernel.org; Madalin-cristian
On Tue, Nov 07, 2017 at 10:10:20PM +0800, Yixun Lan wrote:
> From: Xingyu Chen
>
> Update the doc as the SAR ADC modules doesn't require "sana" clock.
>
> Singed-off-by: Xingyu Chen
> Signed-off-by: Yixun Lan
> ---
> Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt | 1 -
>
On Fri, Nov 10, 2017 at 01:57:11PM -0600, Andrew F. Davis wrote:
This looks mostly good, a few small issues though:
> + dev_info(>dev, "%s() i2c->addr=%d\n", __func__, i2c->addr);
No need for this as standard, we already have I2C level logging
facilities if they're really needed. It's OK
On Tue, Nov 07, 2017 at 04:30:58PM +0100, Lukasz Majewski wrote:
> Signed-off-by: Lukasz Majewski
>
> ---
> Changes for v2:
> - Provide more detailed ./Documentation/devicetree/bindings/display/panel
> entry to describe this panel device.
> ---
>
2017-10-26 09:13+0200, Paolo Bonzini:
> For many years some users of assigned devices have reported worse
> performance on AMD processors with NPT than on AMD without NPT,
> Intel or bare metal.
>
> The reason turned out to be that SVM is discarding the guest PAT
> setting and uses the default
On Fri, 10 Nov 2017, Kees Cook wrote:
> > +EXPORT_SYMBOL_GPL(ktime_get_real_fast_ns);
>
> I was going to add this to the pstore tree, but
> ktime_get_real_fast_ns() doesn't exist. In which tree is
> ktime_get_real_fast_ns() added? This should be carried there:
>
> Acked-by: Kees Cook
it's in
The patch
ASoC: rt5514: mark PM functions as __maybe_unused
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and
The patch
ASoC: rt5514: work around link error
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus
The patch
ASoC: add mclk-fs to audio graph card binding
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent
The patch
regulator: tps65218: Fix strobe assignment
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and
On Fri, 10 Nov 2017, Linus Torvalds wrote:
> On Wed, Nov 8, 2017 at 9:19 PM, Fengguang Wu wrote:
> >
> > Yes it's accessing the list. Here is the faddr2line output.
>
> Ok, so it's a corrupted timer list. Which is not a big surprise.
>
> It's
>
> next->pprev = pprev;
>
> in
The patch
regulator: tps65218: remove unused tps_info structure
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24
The patch
ASoC: add mclk-fs support to audio graph card
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent
On Tue, Nov 07, 2017 at 09:52:15PM -0600, David Lechner wrote:
> This adds a new binding for display panels that use an Ilitek ILI9225
> controller.
>
> The "generic,2.2in-176x220-ili9225-tft" device listed has no identification
> markings whatsoever and an hour of googling turned up nothing,
On 11/09/2017 03:56 PM, Paul E. McKenney wrote:
> On Thu, Nov 09, 2017 at 03:13:24PM -0500, Jason Baron wrote:
>> On 11/08/2017 02:01 AM, Fengguang Wu wrote:
>>> On Tue, Nov 07, 2017 at 05:17:38PM -0500, Jason Baron wrote:
On 11/07/2017 04:27 AM, Fengguang Wu wrote:
> Hello,
2017-11-06 13:31+0100, Paolo Bonzini:
> It turns out that Core 2 Duo machines only had virtual NMIs in some SKUs.
> Patch 1 adds back emulation of the NMI window, patch 2 allows testing
> it on modern processors as well. One eventinj.flat test (NMI after iret)
> fails as expected.
Applied,
On Fri, Nov 10, 2017 at 1:12 PM, Mathieu Desnoyers
wrote:
> x86 can return to user-space through sysexit and sysretq, which are not
> core serializing. This breaks expectations from user-space about
> sequential consistency from a single-threaded self-modifying program
> point of view in specific
There are two places where core serialization is needed by membarrier:
1) When returning from the membarrier IPI,
2) After scheduler updates curr to a thread with a different mm, before
going back to user-space, since the curr->mm is used by membarrier to
check whether it needs to send an
Those are the membarrier changes I plan to submit for 4.15.
This series includes selftests improvements for sys_membarrier,
improvement of powerpc handling of the memory barrier required
by sys_membarrier in switch_mm(), and adds a new core serializing
membarrier, currently only implemented on
Test the new MEMBARRIER_CMD_SHARED_EXPEDITED and
MEMBARRIER_CMD_REGISTER_SHARED_EXPEDITED commands.
Signed-off-by: Mathieu Desnoyers
CC: Shuah Khan
CC: Greg Kroah-Hartman
CC: Peter Zijlstra
CC: Paul E. McKenney
CC: Boqun Feng
CC: Andrew Hunter
CC: Maged Michael
CC: Avi Kivity
CC:
x86 has a missing core serializing instruction in migration scenarios.
Given that x86-32 can return to user-space with sysexit, and x86-64
through sysretq and sysretl, which are not core serializing, the
following user-space self-modifiying code (JIT) scenario can occur:
CPU 0
Allow expedited membarrier to be used for data shared between processes
(shared memory).
Processes wishing to receive the membarriers register with
MEMBARRIER_CMD_REGISTER_SHARED_EXPEDITED. Those which want to issue
membarrier invoke MEMBARRIER_CMD_SHARED_EXPEDITED.
This allows extremely simple
Test the new MEMBARRIER_CMD_PRIVATE_EXPEDITED_SYNC_CORE and
MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED_SYNC_CORE commands.
Signed-off-by: Mathieu Desnoyers
CC: Shuah Khan
CC: Greg Kroah-Hartman
CC: Peter Zijlstra
CC: Paul E. McKenney
CC: Boqun Feng
CC: Andrew Hunter
CC: Maged Michael
CC:
Provide core serializing membarrier command to support memory reclaim
by JIT.
Each architecture needs to explicitly opt into that support by
documenting in their architecture code how they provide the core
serializing instructions required when returning from the membarrier
IPI, and after the
Test the new MEMBARRIER_CMD_PRIVATE_EXPEDITED and
MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED commands.
Add checks expecting specific error values on system calls expected to
fail.
Signed-off-by: Mathieu Desnoyers
Acked-by: Shuah Khan
Acked-by: Greg Kroah-Hartman
CC: Peter Zijlstra
CC: Paul E.
Allow PowerPC to skip the full memory barrier in switch_mm(), and
only issue the barrier when scheduling into a task belonging to a
process that has registered to use expedited private.
Threads targeting the same VM but which belong to different thread
groups is a tricky case. It has a few
Document the membarrier requirement on having a full memory barrier in
__schedule() after coming from user-space, before storing to rq->curr.
It is provided by smp_mb__after_spinlock() in __schedule().
Document that membarrier requires a full barrier on transition from
kernel thread to userspace
Introduce an architecture function that ensures the current CPU
issues a core serializing instruction before returning to usermode.
This is needed to fix an existing core serialization bug on
thread migration, and also needed by the membarrier "sync_core" command.
Architectures defining the
Applied all three, thanks.
2017-11-10 10:49+0100, Paolo Bonzini:
> Sometimes, a processor might execute an instruction while another
> processor is updating the page tables for that instruction's code page,
> but before the TLB shootdown completes. The interesting case happens
> if the page is in the TLB.
>
> In general,
On Wed, Nov 08, 2017 at 01:16:41PM +0530, Raveendra Padasalagi wrote:
> Add devicetree binding document for broadcom's
> Cygnus SoC specific usb phy controller driver.
>
> Signed-off-by: Raveendra Padasalagi
> ---
> .../bindings/phy/brcm,cygnus-usb-phy.txt | 106
>
On 11/09/2017 04:52 PM, Randy Dunlap wrote:
> From: Randy Dunlap
>
> line-range is supposed to treat "1-" as "1-endoffile", so
> handle the special case by setting last_lineno to UINT_MAX.
>
> Fixes this error:
>
> dynamic_debug:ddebug_parse_query: last-line:0 < 1st-line:1
>
On Wed, Nov 08, 2017 at 04:26:15PM +0800, andy.t...@nxp.com wrote:
> From: Yuantian Tang
>
> More divider clocks are needed by IP. So enlarge the PLL divider
> array to accommodate more divider clocks.
>
> Signed-off-by: Tang Yuantian
> ---
>
2017-11-06 14:38-0600, Janakarajan Natarajan:
> I forgot to add Boris's Reviewed-by Tag. If the patchset is acceptable,
> please let me know if I should send another version with the Tag or if
> the Tag can be added when it is merged.
No problem, I have added that while applying, thanks for
From: Stephen Barber
The EC can function as a simple RT, this patch adds the RTC related
definitions needed by the rtc-cros-ec driver.
Signed-off-by: Stephen Barber
Signed-off-by: Enric Balletbo i Serra
Acked-by: Lee Jones
Acked-by: Benson Leung
---
include/linux/mfd/cros_ec_commands.h | 8
rockchip_usb2phy_probe() does not disable clock in case of failure in
devm_of_phy_provider_register() and it ignores if clk_prepare_enable() fails.
Found by Linux Driver Verification project (linuxtesting.org).
Signed-off-by: Alexey Khoroshilov
---
drivers/phy/rockchip/phy-rockchip-inno-usb2.c
From: Stephen Barber
On platforms with a Chrome OS EC, the EC can function as a simple RTC.
Add a basic driver with this functionality.
Signed-off-by: Stephen Barber
Signed-off-by: Enric Balletbo i Serra
Acked-by: Alexandre Belloni
Acked-by: Benson Leung
---
drivers/rtc/Kconfig | 10
Dear all,
This is an attempt to revive some patches from that [1] patchset, some
of them are still under discussion but I think there is no reason to not
have the other two in this fourth version to land upstream meanwhile we
discuss about the others.
[1] https://lkml.org/lkml/2017/7/12/182
- On Nov 10, 2017, at 4:36 PM, Linus Torvalds torva...@linux-foundation.org
wrote:
> On Fri, Nov 10, 2017 at 1:12 PM, Mathieu Desnoyers
> wrote:
>> x86 can return to user-space through sysexit and sysretq, which are not
>> core serializing. This breaks expectations from user-space about
>>
On Fri, Nov 10, 2017 at 1:37 PM, Mathieu Desnoyers
wrote:
> Introduce an architecture function that ensures the current CPU
> issues a core serializing instruction before returning to usermode.
>
> This is needed to fix an existing core serialization bug on
> thread migration, and also needed by
On Fri, Nov 10, 2017 at 11:31 AM, Dave Hansen
wrote:
>
> From: Dave Hansen
>
> There are effectively two ASID types:
> 1. The one stored in the mmu_context that goes from 0->5
> 2. The one programmed into the hardware that goes from 1->6
>
> This consolidates the locations where converting
> On Nov 10, 2017, at 8:02 AM, Hector Martin 'marcan' wrote:
>
>> On 2017-11-10 23:57, Andy Lutomirski wrote:
>> This code is so wrong I don't even no where to start. Seriously, sub,
>> orq, add? How about just orq with an offset? How about a *load*
>> instead of a store?
>
> Stores should be
> On Nov 10, 2017, at 8:36 AM, Hector Martin 'marcan' wrote:
>
>> On 2017-11-11 01:02, Hector Martin 'marcan' wrote:
>> Not entirely sure what's going on here.
>
> Actually, if you think about it, it doesn't matter that it skips the
> first page, since it's probing one page more. That just means
Make use of the swap macro instead of _manually_ swapping values
and remove unnecessary variable tmp.
This makes the code easier to read and maintain.
This code was detected with the help of Coccinelle.
Signed-off-by: Gustavo A. R. Silva
---
drivers/tty/vt/selection.c | 6 +-
1 file
This patch addresses shortcoming in current boot process on machines
that supports 5-level paging.
If bootloader enables 64-bit mode with 4-level paging, we need to
switch over to 5-level paging. The switching requires disabling paging.
It works fine if kernel itself is loaded below 4G.
If
If bootloader enables 64-bit mode with 4-level paging, we might need to
switch over to 5-level paging. The switching requires disabling paging.
It works fine if kernel itself is loaded below 4G.
If bootloader put the kernel above 4G (not sure if anybody does this),
we would loose control as soon
This patch prepare decompression code to boot-time switching between 4-
and 5-level paging.
Signed-off-by: Kirill A. Shutemov
---
arch/x86/boot/compressed/Makefile | 1 +
arch/x86/boot/compressed/head_64.S| 16
arch/x86/boot/compressed/pgtable_64.c | 18
On Thu, Nov 9, 2017 at 10:31 PM, Dave Hansen
wrote:
> On 11/09/2017 06:25 PM, Andy Lutomirski wrote:
>> Here are two proposals to address this without breaking vsyscalls.
>>
>> 1. Set NX on low mappings that are _PAGE_USER. Don't set NX on high
>> mappings but, optionally, warn if you see
The name of the file -- pagetable.c -- is misleading: it only contains
helpers used for KASLR in 64-bin mode.
Let's rename the file to reflect its content.
Signed-off-by: Kirill A. Shutemov
---
arch/x86/boot/compressed/Makefile| 2 +-
arch/x86/boot/compressed/{pagetable.c
Hi Ingo,
Here's updated changes that prepare the code to boot-time switching between
paging modes and handle booting in 5-level mode when bootloader put kernel
image above 4G, but haven't enabled 5-level paging for us.
I've updated patches based on your feedback.
Please review and consider
On 11/10/2017 02:03 PM, Andy Lutomirski wrote:
>> +static inline u16 kern_asid(u16 asid)
>> +{
>> + VM_WARN_ON_ONCE(asid > MAX_ASID_AVAILABLE);
>> + /*
>> +* If PCID is on, ASID-aware code paths put the ASID+1 into the PCID
>> +* bits. This serves two purposes. It
On Fri, Nov 10, 2017 at 2:09 PM, Dave Hansen
wrote:
> On 11/10/2017 02:03 PM, Andy Lutomirski wrote:
>>> +static inline u16 kern_asid(u16 asid)
>>> +{
>>> + VM_WARN_ON_ONCE(asid > MAX_ASID_AVAILABLE);
>>> + /*
>>> +* If PCID is on, ASID-aware code paths put the ASID+1 into the
As Dan pointed out, the rework I did makes it harder for smatch and other
static checkers to figure out what is going on with the uninitialized
pointers.
By open-coding the call in create_udata(), we make it more readable for
both humans and tools.
Reported-by: Dan Carpenter
Fixes: 12f727721eee
On Fri, Nov 10, 2017 at 1:57 PM, Mathieu Desnoyers
wrote:
>
> That core serializing instruction is not that much about I$ vs D$
> consistency, but rather about the processor speculatively executing code
> ahead of its retirement point. Ref. Intel Architecture Software Developer's
> Manual, Volume
Make use of the swap macro instead of _manually_ swapping values
and remove unnecessary variable tmp.
This makes the code easier to read and maintain.
This code was detected with the help of Coccinelle.
Signed-off-by: Gustavo A. R. Silva
---
drivers/staging/speakup/selection.c | 9 ++---
Hi Michael, Tobin,
On 11/08/17 04:10, Michael Ellerman wrote:
> "Tobin C. Harding" writes:
>> Currently we are leaking addresses from the kernel to user space. This
>> script is an attempt to find some of those leakages. Script parses
>> `dmesg` output and /proc and /sys files for hex strings
On Fri, 10 Nov 2017 13:54:59 +
Jean-Philippe Brucker wrote:
> On 09/11/17 19:36, Jacob Pan wrote:
> > On Tue, 7 Nov 2017 11:38:50 +
> > Jean-Philippe Brucker wrote:
> >
> >> I think the IOMMU should pass the struct device associated to the
> >> BDF to the fault handler. The fault
- On Nov 10, 2017, at 5:02 PM, Andy Lutomirski l...@kernel.org wrote:
> On Fri, Nov 10, 2017 at 1:37 PM, Mathieu Desnoyers
> wrote:
>> Introduce an architecture function that ensures the current CPU
>> issues a core serializing instruction before returning to usermode.
>>
>> This is needed
Make use of the swap macro instead of _manually_ swapping values
and remove unnecessary variable swap.
This makes the code easier to read and maintain.
This code was detected with the help of Coccinelle.
Signed-off-by: Gustavo A. R. Silva
---
.../drm/amd/display/dc/dce110/dce110_mem_input_v.c
- On Nov 10, 2017, at 5:20 PM, Mathieu Desnoyers
mathieu.desnoy...@efficios.com wrote:
> - On Nov 10, 2017, at 5:02 PM, Andy Lutomirski l...@kernel.org wrote:
>
>> On Fri, Nov 10, 2017 at 1:37 PM, Mathieu Desnoyers
>> wrote:
>>> Introduce an architecture function that ensures the
On 2017-11-09 04:12, Harinath Nampally wrote:
> This patch adds following related changes:
> - defines pulse event related registers
> - enables and handles single pulse interrupt for fxls8471
> - handles IIO_EV_DIR_EITHER in read/write callbacks (because
> event direction for pulse is either
> On Nov 10, 2017, at 2:20 PM, Mathieu Desnoyers
> wrote:
>
> - On Nov 10, 2017, at 5:02 PM, Andy Lutomirski l...@kernel.org wrote:
>
>> On Fri, Nov 10, 2017 at 1:37 PM, Mathieu Desnoyers
>> wrote:
>>> Introduce an architecture function that ensures the current CPU
>>> issues a core
On Fri, Nov 10, 2017 at 04:32:45PM -0500, Jason Baron wrote:
>
> On 11/09/2017 03:56 PM, Paul E. McKenney wrote:
> > On Thu, Nov 09, 2017 at 03:13:24PM -0500, Jason Baron wrote:
> >> On 11/08/2017 02:01 AM, Fengguang Wu wrote:
> >>> On Tue, Nov 07, 2017 at 05:17:38PM -0500, Jason Baron wrote:
>
On Fri, Nov 10, 2017 at 04:02:55PM -0500, Mimi Zohar wrote:
> If the kernel is locked down and IMA-appraisal is not enabled, prevent
> loading of unsigned firmware.
>
> Signed-off-by: Mimi Zohar
> ---
>
> Changelog v1:
> - Lots of minor changes Kconfig, Makefile, fw_lsm.c for such a small patch
- On Nov 10, 2017, at 5:36 PM, Andy Lutomirski l...@amacapital.net wrote:
>> On Nov 10, 2017, at 2:20 PM, Mathieu Desnoyers
>>
>> wrote:
>>
>> - On Nov 10, 2017, at 5:02 PM, Andy Lutomirski l...@kernel.org wrote:
>>
>>> On Fri, Nov 10, 2017 at 1:37 PM, Mathieu Desnoyers
>>> wrote:
get/put_timespec64() interfaces will eventually be used for
conversions between the new y2038 safe struct __kernel_timespec
and struct timespec64.
The new y2038 safe syscalls have a common entry for native
and compat interfaces.
On compat interfaces, the high order bits of nanoseconds are
should
Change over clock_settime, clock_gettime and clock_getres
syscalls to use __kernel_timespec times. This will enable
changing over of these syscalls to use new y2038 safe syscalls
when the architectures define the CONFIG_64BIT_TIME.
Cc: linux-...@vger.kernel.org
Signed-off-by: Deepa Dinamani
---
From: Arnd Bergmann
There are a total of 53 system calls (aside from ioctl) that pass a time_t
or derived data structure as an argument, and in order to extend time_t
to 64-bit, we have to replace them with new system calls and keep providing
backwards compatibility.
To avoid adding completely
The new struct __kernel_timespec is similar to current
internal kernel struct timespec64 on 64 bit architecture.
The compat structure however is similar to below on little
endian systems (padding and tv_nsec are switched for big
endian systems):
typedef s32compat_long_t;
typedef s64
Change over clock_nanosleep syscalls to use y2038 safe
__kernel_timespec times. This will enable changing over
of these syscalls to use new y2038 safe syscalls when
the architectures define the CONFIG_64BIT_TIME.
Note that nanosleep syscall is deprecated and does not have a
plan for making it
clock_gettime, clock_settime, clock_getres and clock_nanosleep
compat syscalls are also repurposed to provide backward compatibility
to support 32 bit time_t on 32 bit systems.
Note that nanosleep compat syscall will also be treated the same way
as the above syscalls as it shares common handler
All the current architecture specific defines for these
are the same. Refactor these common defines to a common
header file.
The new common linux/compat_time.h is also useful as it
will eventually be used to hold all the defines that
are needed for compat time types that support non y2038
safe
Many of the compat time syscalls are also repurposed as 32 bit
native syscalls to provide backward compatibility while adding
new y2038 safe sycalls.
Enabling the helpers makes this possible.
Signed-off-by: Deepa Dinamani
---
include/linux/compat.h | 4
1 file changed, 4 insertions(+)
These functions are used in the repurposed compat syscalls
to provide backward compatibility for using 32 bit time_t
on 32 bit systems.
Signed-off-by: Deepa Dinamani
---
include/linux/compat.h | 2 -
include/linux/compat_time.h | 4 ++
kernel/Makefile | 2 +-
kernel/compat.c
The series is a preparation series for individual architectures
to use 64 bit time_t syscalls in compat and 32 bit emulation modes.
This is a follow up to the series Arnd Bergmann posted:
https://sourceware.org/ml/libc-alpha/2015-05/msg00070.html
Big picture is as per the lwn article:
On 11/10/2017 1:02 PM, Mimi Zohar wrote:
> If the kernel is locked down and IMA-appraisal is not enabled, prevent
> loading of unsigned firmware.
>
> Signed-off-by: Mimi Zohar
> ---
>
> Changelog v1:
> - Lots of minor changes Kconfig, Makefile, fw_lsm.c for such a small patch
>
>
Make use of the swap macro instead of _manually_ swapping values
and remove unnecessary variable temp.
This makes the code easier to read and maintain.
This code was detected with the help of Coccinelle.
Signed-off-by: Gustavo A. R. Silva
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
On 11/10/2017 02:06 PM, Andy Lutomirski wrote:
> On Thu, Nov 9, 2017 at 10:31 PM, Dave Hansen
> wrote:
>> On 11/09/2017 06:25 PM, Andy Lutomirski wrote:
>>> Here are two proposals to address this without breaking vsyscalls.
>>>
>>> 1. Set NX on low mappings that are _PAGE_USER. Don't set NX on
On Fri, Nov 10, 2017 at 8:11 PM, Linus Torvalds
wrote:
> On Thu, Nov 9, 2017 at 2:30 PM, Rafael J. Wysocki wrote:
>>
>> c_start() can run aperfmperf_snapshot_khz() on all CPUs upfront (say
>> in parallel), then wait for a while (say 5 ms; the current 20 ms wait
>> is overkill) and then
- On Nov 10, 2017, at 5:32 PM, Mathieu Desnoyers
mathieu.desnoy...@efficios.com wrote:
> - On Nov 10, 2017, at 5:20 PM, Mathieu Desnoyers
> mathieu.desnoy...@efficios.com wrote:
>
>> - On Nov 10, 2017, at 5:02 PM, Andy Lutomirski l...@kernel.org wrote:
>>
>>> On Fri, Nov 10, 2017
On Mon, 2017-11-06 at 13:49 +0200, Alexander Shishkin wrote:
> On Fri, Nov 03, 2017 at 11:00:05AM -0700, Megha Dey wrote:
> > +static int intel_bm_event_init(struct perf_event *event)
> > +{
>
> ...
>
> > + /*
> > +* Find a hardware counter for the target task
> > +*/
> > + for (i =
On 2017-11-10 10:42 AM, Linus Torvalds wrote:
> On Thu, Nov 9, 2017 at 5:58 PM, Patrick McLean wrote:
>>
>> Something must have changed since 4.13.8 to trigger this though.
>
> Arnd pointed to some commits that might be relevant for the cp210x
> module, but those are all already in 4.13.8, so
On Fri, Nov 10, 2017 at 10:08:19PM +0100, Pali Rohár wrote:
> On Friday 10 November 2017 21:26:01 Luis R. Rodriguez wrote:
> > On Fri, Nov 10, 2017 at 12:38:27AM +0100, Pali Rohár wrote:
> > > This function works pretty much like request_firmware(), but it prefer
> > > usermode helper. If usermode
On Fri, Nov 10, 2017 at 10:09 AM, Ulf Hansson wrote:
> On 8 November 2017 at 14:25, Rafael J. Wysocki wrote:
>> From: Rafael J. Wysocki
>>
>> Define and document a new driver flag, DPM_FLAG_LEAVE_SUSPENDED, to
>> instruct the PM core and middle-layer (bus type, PM domain, etc.)
>> code that it
On Fri, Oct 20, 2017 at 09:33:31PM +0200, Christophe JAILLET wrote:
> If 'write' is 0, we can avoid a call to spin_lock/spin_unlock.
>
> Signed-off-by: Christophe JAILLET
Thanks for the patch!
Acked-by: Luis R. Rodriguez
I'll bounce a copy to Andrew for integration next.
Luis
> ---
>
The mm-of-the-moment snapshot 2017-11-10-15-56 has been uploaded to
http://www.ozlabs.org/~akpm/mmotm/
mmotm-readme.txt says
README for mm-of-the-moment:
http://www.ozlabs.org/~akpm/mmotm/
This is a snapshot of my -mm patch queue. Uploaded at random hopefully
more than once a week.
You
On Fri, 10 Nov 2017 13:54:59 +
Jean-Philippe Brucker wrote:
> /*
> * Note: I tried to synthesize what I believe would be useful to
> device
> * drivers and guests, with regards to the kind of faults that the ARM
> * SMMU is capable of reporting. Other IOMMUs may report more or less
> *
On Sat, 4 Nov 2017 21:20:04 +0100
Wolfram Sang wrote:
> Those two functions are very similar, the only differences are that one
> needs the I2C_M_RD flag for its message while the other one needs the
> buffer casted to drop the const. Introduce a generic helper which
> allows to specify the
On Sat, 4 Nov 2017 21:20:05 +0100
Wolfram Sang wrote:
> Use the new helper to create variants of i2c_master_{send|recv} which
> mark their buffers as DMA safe.
>
> Signed-off-by: Wolfram Sang
Can't really argue with such a simple patch ;)
Acked-by: Jonathan Cameron
> ---
>
This is a fix on top of the KAISER [v3] patches I posted earlier.
It is a fix for:
[PATCH 05/30] x86, kaiser: prepare assembly for entry/exit CR3 switching
I made a mistake and stopped running the 32-bit selftests at
some point. My changes from one of Borislav's review comments
ended
si_pkey is now #defined to be the name of the new siginfo field that
protection keys uses. Rename it not to conflict.
---
b/tools/testing/selftests/x86/protection_keys.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff -puN
From: Dave Hansen
write() is marked as having a must-check return value. Check it and
abort if we fail to write an error message from a signal handler.
Signed-off-by: Dave Hansen
---
b/tools/testing/selftests/x86/pkey-helpers.h |5 -
1 file changed, 4 insertions(+), 1 deletion(-)
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