Hi Paul,
On 2 January 2018 at 20:38, Paul Cercueil wrote:
> This makes sure that 'mips_machtype' will be initialized to the SoC
> version used on the board.
>
> Signed-off-by: Paul Cercueil
> ---
> arch/mips/Kconfig | 1 +
>
On Thu, Dec 28, 2017 at 11:49:11AM +0100, Bartosz Golaszewski wrote:
> Make formatting and style consistent for the entire document.
>
> This patch doesn't change the content of the binding.
>
> Signed-off-by: Bartosz Golaszewski
> Reviewed-by: Javier Martinez Canillas
On 12/22/2017 02:31 PM, Faiz Abbas wrote:
> From: Franklin S Cooper Jr
>
> Add support for PM Runtime which is the new way to handle managing clocks.
> However, to avoid breaking SoCs not using PM_RUNTIME leave the old clk
> management approach in place.
There is no PM_RUNTIME
Am 02.01.2018 um 16:39 schrieb Chris Wilson:
Quoting Christian König (2018-01-02 12:13:58)
TTM tries to allocate coherent memory in chunks of 2MB first to improve
TLB efficiency and falls back to allocating 4K pages if that fails.
Suppress the warning when the 2MB allocations fails since there
Hi PrasannaKumar,
Le mar. 2 janv. 2018 à 17:02, PrasannaKumar Muralidharan
a écrit :
Hi Paul,
On 2 January 2018 at 20:38, Paul Cercueil
wrote:
This makes sure that 'mips_machtype' will be initialized to the SoC
version used on the board.
Hi Paul,
On 30 December 2017 at 19:21, Paul Cercueil wrote:
> Also remove the watchdog platform_device from platform.c, since it
> wasn't used anywhere anyway.
>
> Signed-off-by: Paul Cercueil
> ---
> arch/mips/boot/dts/ingenic/jz4740.dtsi | 8
On Fri, Dec 22, 2017 at 11:43:08AM -0800, Florian Fainelli wrote:
> We are doing a blind write to SATA_TOP_CTRL_BUS_CTRL to set the system
> endian, but in doing so, we are also overwriting other bits, such as the
> SATA_SCB_BURST_SIZE and SATA_FIFO_SIZE bits, which impact performance.
> Do a
From: Colin Ian King
Currently a bool is being used to get and check for a -ve error
return from the call to ocfs2_get_clusters but the check for ret < 0 is
never true for a bool. Fix this by using an int type for an error return
instead.
Detected by CoverityScan,
From: Bai Ping
On i.MX 6ULL, the pin MUX and CTRL register of BOOT_MODEx and TAMPERx
pins are available through IOMUXC_SNVS. Add additional pinfunc defines.
Signed-off-by: Bai Ping
Signed-off-by: Stefan Agner
---
Hi, sorry for the late reply,
2017-12-14 17:36 GMT+00:00 Peter Zijlstra :
> On Thu, Dec 14, 2017 at 08:19:36AM -0800, Andy Lutomirski wrote:
>> On Thu, Dec 14, 2017 at 3:27 AM, Peter Zijlstra wrote:
>> > It makes no sense to ever prod at special
On 29/12/17 08:18, Christoph Hellwig wrote:
> So that they don't need to indirect through the operation vector.
>
> Signed-off-by: Christoph Hellwig
> ---
> arch/arm/mm/dma-mapping-nommu.c | 9 +++--
> include/linux/dma-direct.h | 5 +
> lib/dma-direct.c
Hi Paul,
On 2 January 2018 at 20:38, Paul Cercueil wrote:
> From: Maarten ter Huurne
>
> We have seen MMC DMA transfers read corrupted data from SDRAM when
> a burst interval ends at physical address 0x1000. To avoid this
> problem, we remove
On Mon, Jan 01, 2018 at 03:31:37PM +0100, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.9.74 release.
> There are 75 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me
On Fri 22-12-17 07:05:56, Jeff Layton wrote:
> From: Jeff Layton
>
> Since i_version is mostly treated as an opaque value, we can exploit that
> fact to avoid incrementing it when no one is watching. With that change,
> we can avoid incrementing the counter on writes, unless
On Tue, Jan 2, 2018 at 4:08 PM, Paul Cercueil wrote:
> From: Paul Burton
>
> Platforms using DT will typically call __dt_setup_arch from
> plat_mem_setup. This in turn calls early_init_dt_scan. When
> CONFIG_CMDLINE is set, this leads to its value
On 01/02/2018 09:10 AM, Adam Ford wrote:
On Sun, Dec 31, 2017 at 5:39 PM, David Lechner wrote:
This series converts mach-davinci to use the common clock framework.
Basically, this series does some cleanup and rearranging to get things
ready for the conversion. Then there
On 1/2/18 12:03 AM, Sagar Arun Kamble wrote:
On 12/28/2017 10:19 PM, Richard Cochran wrote:
On Tue, Dec 26, 2017 at 01:07:35PM +0530, Sagar Arun Kamble wrote:
Or can we provide simpler versions for covering some defaults? At
least reducing the number of arguments would make things easier.
The following changes since commit 30a7acd573899fd8b8ac39236eff6468b195ac7d:
Linux 4.15-rc6 (2017-12-31 14:47:43 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/efi/efi.git tags/efi-urgent
for you to fetch changes up to
Commit 82c3768b8d68 ("efi/capsule-loader: Use a cached copy of the
capsule header") refactored the capsule loading code that maps the
capsule header, to avoid having to map it several times. However,
as it turns out, the vmap() call we ended up removing did not just
map the header, but the entire
From: Dave Young
'add_efi_memmap' is an early param, but do_add_efi_memmap() has no
chance to run because the code path is before parse_early_param().
I believe it worked when the param was introduced but probably later
some other changes caused the wrong order and nobody
On Tue, Jan 02, 2018 at 12:02:18PM +0100, Rafael J. Wysocki wrote:
> On Tue, Jan 2, 2018 at 11:51 AM, Lukas Wunner wrote:
> > On Tue, Jan 02, 2018 at 01:56:28AM +0100, Rafael J. Wysocki wrote:
> >> + if (atomic_read(>power.usage_count) <= 1 &&
> >> +
On Mon, 01 Jan 2018 17:14:25 +0100,
Takashi Iwai wrote:
>
> On Mon, 01 Jan 2018 11:29:51 +0100,
> Lars-Peter Clausen wrote:
> >
> > On 01/01/2018 10:03 AM, Takashi Iwai wrote:
> > [...]
> > >> CPU: 0 PID: 3502 Comm: syzkaller781065 Not tainted 4.15.0-rc5+ #154
> > >> Hardware name: Google Google
Hi Peter,
Il 31/12/2017 10:43, Claudio Scordino ha scritto:
Hi all,
Il 20/12/2017 16:56, Peter Zijlstra ha scritto:
On Wed, Dec 20, 2017 at 04:30:29PM +0100, Peter Zijlstra wrote:
So I ended up with the below (on top of Juri's cpufreq-dl patches).
It compiles, but that's about all the
I'm announcing the release of the 3.2.97 kernel.
All users of the 3.2 kernel series should upgrade.
The updated 3.2.y git tree can be found at:
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git
linux-3.2.y
and can be browsed at the normal kernel.org git web
Hi Greg,
On 12/19/2017 12:38 AM, Sinan Kaya wrote:
> i7300_idle.h is not being called by any source file and contains calls to
> pci_get_bus_and_slot() that we are trying to deprecate. Remove unused file.
>
> Signed-off-by: Sinan Kaya
Do you think you can pick this up?
On 12/19/2017 12:38 AM, Sinan Kaya wrote:
> pci_get_bus_and_slot() is restrictive such that it assumes domain=0 as
> where a PCI device is present. This restricts the device drivers to be
> reused for other domain numbers.
>
> Getting ready to remove pci_get_bus_and_slot() function in favor of
>
This driver creates a const structure that it stores in the data
field of an of_device_id array.
Add const to the declaration of the location that receives a value
from the data field to ensure that the compiler will continue to check
that the value is not modified and remove the const-dropping
The data field of an of_device_id structure has type const void *, so
there is no need for a const-discarding cast when putting const values
into such a structure.
Done using Coccinelle.
Signed-off-by: Julia Lawall
---
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c |4
This driver creates various const structures that it stores in the
data field of an of_device_id array.
Adding const to the declaration of the location that receives the
const value from the data field ensures that the compiler will
continue to check that the value is not modified. Furthermore,
Hi Ulf,
On Tue, Jan 2, 2018 at 2:02 PM, Ulf Hansson wrote:
Signed-off-by: Geert Uytterhoeven
[Ulf: Converted to use the WAKEUP_PATH driver PM flag]
>>
>> Ulf: + killing the DEV_PM_OPS define, increasing kernel size if PM_SUSPEND=n?
>
>
This driver creates a number of const structures that it stores in the
data field of an of_device_id array.
Add const to the declaration of the location that receives a value
from the data field to ensure that the compiler will continue to check
that the value is not modified and remove the
This driver creates a number of const structures that it stores in the
data field of an of_device_id array.
The data field of an of_device_id structure has type const void *, so
there is no need for a const-discarding cast when putting const values
into such a structure.
Done using Coccinelle.
On Tue, 2018-01-02 at 13:13 +0100, Christian König wrote:
>
> v2: suppress warnings from swiotlb_tbl_map_single as well
Thanks, dmesg spam is history.
-Mike
> -Original Message-
> From: Greg KH [mailto:gre...@linuxfoundation.org]
> Sent: Friday, December 29, 2017 11:23 AM
> To: Stanislav Nijnikov
> Cc: linux-s...@vger.kernel.org; linux-kernel@vger.kernel.org; Alex Lemberg
>
> Subject: Re:
Hi Arnd,
On Tue, Jan 2, 2018 at 11:56 AM, Arnd Bergmann wrote:
> All other architectures use 'unsigned int' as the data in readl/write,
> but m32r uses 'unsigned long', leading to lots of harmless build warnings
> like:
>
> drivers/mmc/host/dw_mmc.c: In function
From: Ludovic Barre
This patch adds STM32MP157 SoC bindings.
Signed-off-by: Ludovic Barre
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/arm/stm32.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Ludovic Barre
This patch prepares the STM32 machine for the integration of Cortex-A
based microprocessor (MPU), on top of the existing Cortex-M
microcontroller family (MCU). Since both MCUs and MPUs are sharing
common hardware blocks we can keep using ARCH_STM32 flag
Hi Anson,
On Tue, Jan 2, 2018 at 3:07 PM, Anson Huang wrote:
> Add 696MHz operating point according to datasheet
> (Rev. 0, 12/2015).
There is a newer version from 05/2017:
https://www.nxp.com/docs/en/data-sheet/IMX6ULAEC.pdf
>
> Signed-off-by: Anson Huang
From: Ludovic Barre
Add support of stm32mp157c evaluation board (part number: STM32MP157C-EV1)
split in 2 elements:
-Daughter board (part number: STM32MP157C-ED1)
which includes CPU, memory and power supply
-Mother board (part number: STM32MP157C-EM1)
which includes
From: Paul Burton
Platforms using DT will typically call __dt_setup_arch from
plat_mem_setup. This in turn calls early_init_dt_scan. When
CONFIG_CMDLINE is set, this leads to its value being copied into
boot_command_line by early_init_dt_scan_chosen. If this happens
Add support for the clocks provided by the CGU in the Ingenic JZ4770
SoC.
Signed-off-by: Paul Cercueil
Signed-off-by: Maarten ter Huurne
Acked-by: Stephen Boyd
---
drivers/clk/ingenic/Makefile | 1 +
This commit permits the PLLs to be dynamically enabled and disabled when
their children clocks are enabled and disabled.
Signed-off-by: Paul Cercueil
Acked-by: Stephen Boyd
---
drivers/clk/ingenic/cgu.c | 89
On Sun, Dec 31, 2017 at 5:39 PM, David Lechner wrote:
> This series converts mach-davinci to use the common clock framework.
>
> Basically, this series does some cleanup and rearranging to get things
> ready for the conversion. Then there is a patch to add new driver in
>
Add a machtype ID for the JZ4780 SoC, which was missing, and one for the
newly supported JZ4770 SoC.
Signed-off-by: Paul Cercueil
---
arch/mips/include/asm/bootinfo.h | 2 ++
1 file changed, 2 insertions(+)
v2: No change
v3: No change
v5: No change
diff --git
On Tue, Jan 02, 2018 at 12:44:29PM +0100, Arnd Bergmann wrote:
> On Sun, Nov 19, 2017 at 12:04 PM, Geert Uytterhoeven
> wrote:
> > With gcc-4.1.2:
> >
> > drivers/thermal/hisi_thermal.c: In function ‘hisi_thermal_probe’:
> > drivers/thermal/hisi_thermal.c:530:
On Tue, 2 Jan 2018, Ulf Hansson wrote:
> > While I acknowledge that Ulf doesn't appear to be convinced by my
> > arguments, I also see no technical reason why this cannot go in.
>
> Correct, I am not convinced this is the right path as a general
> optimization, at least in it's current form. The
On Thu, Dec 28, 2017 at 11:49:10AM +0100, Bartosz Golaszewski wrote:
> Current description of the compatible property for at24 is quite vague.
>
> State explicitly that any "," pair is accepted as
> long as a correct fallback is used for non-atmel chips.
>
> Signed-off-by: Bartosz Golaszewski
On 29/12/17 08:18, Christoph Hellwig wrote:
> This means it uses whatever linear remapping scheme that the architecture
> provides is used in the generic dma_direct ops.
>
> Signed-off-by: Christoph Hellwig
> ---
> lib/dma-direct.c | 18 +++---
> 1 file changed, 7
On 29/12/17 08:18, Christoph Hellwig wrote:
> The trivial direct mapping implementation already does a virtual to
> physical translation which isn't strictly a noop, and will soon learn
> to do non-direct but linear physical to dma translations through the
> device offset and a few small tricks.
On Tue, Jan 02, 2018 at 05:27:41PM +0100, Vladimir Rutsky wrote:
> Signed-off-by: Vladimir Rutsky
Applied to cgroup/for-4.16.
Thanks.
--
tejun
On Mon, Jan 01, 2018 at 03:22:07PM +0100, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 3.18.91 release.
> There are 32 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me
Getting ready to return an error from pci_reset_bridge_secondary_bus() when
device is unreachable.
Signed-off-by: Sinan Kaya
Reviewed-by: Christoph Hellwig
---
drivers/pci/pci.c | 4 +++-
include/linux/pci.h | 2 +-
2 files changed, 4 insertions(+), 2
> On Dec 30, 2017, at 7:28 AM, Himanshu Jha wrote:
>
> Use dma_zalloc_coherent and vzalloc instead of dma_alloc_coherent and
> vmalloc respectively, followed by memset 0.
>
> Generated-by: scripts/coccinelle/api/alloc/kzalloc-simple.cocci
>
> Suggested-by: Luis R.
On Tue, Jan 02, 2018 at 08:25:08AM -0500, Sinan Kaya wrote:
> > 2. A DPC event suppresses the error message required for the Linux
> > AER driver to run. How can AER and DPC run concurrently?
> >
>
> As we briefly discussed in previous email exchanges, I think you are
> looking at a use case
> Actually, changes just to inet_gso_segment and ipv6_gso_segment
> will suffice:
>
>bool udpfrag = false, fixedid = false, gso_partial, encap;
> struct sk_buff *segs = ERR_PTR(-EINVAL);
> + unsigned int offset = 0, gso_type;
> const struct net_offload *ops;
> -
On Tue, Jan 02, 2018 at 02:06:36PM +0100, Pavel Machek wrote:
> Hi!
>
> > In Documentation/misc-devices/bh1770glc.txt, there is a description of the
> > sysfs
> > interface which could be moved to Documentation/ABI.
> >
> > Would such a change be useful?
>
> Not at the moment.
>
> > The ABI
On Mon, Dec 18, 2017 at 05:21:24PM -0800, Florian Fainelli wrote:
> On 12/18/2017 08:52 AM, Arnd Bergmann wrote:
> > The new conditionally compiled code leaves some labels and one
> > variable unreferenced when CONFIG_HOTPLUG_CPU and CONFIG_PM_SLEEP
> > are disabled:
> >
> >
This commit adds a power_supply class instance to represent a
PD source's voltage and current properties. This provides an
interface for reading these properties from user-space or other
drivers.
For PPS enabled Sources, this also provides write access to set
the current and voltage and allows
This commit adds sink side support for Get_Status, Status,
Get_PPS_Status and PPS_Status handling. As there's the
potential for a partner to respond with Not_Supported
handling of this message is also added. Sending of
Not_Supported is added is added to handle messages
received but not yet
This patch set adds sink side support for the PPS feature introduced in the
USB PD 3.0 specification.
The source PPS supply is represented using the Power Supply framework to provide
access and control APIs for dealing with it's operating voltage and current,
and switching between a standard PDO
This commit adds the 'connected_type' property to represent supplies
which can report a number of different types of supply based on a
connection event.
Examples of this already exist in drivers whereby the existing 'type'
property is updated, based on an event, to represent what was
connected
This commit adds a header providing definitions for handling Alert
messages. Currently the header only focuses on handling incoming
alerts.
Signed-off-by: Adam Thomson
---
include/linux/usb/pd_ado.h | 42 ++
1 file
On Mon, 01 Jan 2018, Paul Cercueil wrote:
> This header contains macros for the registers that are present in the
> regmap shared by all the drivers related to the TCU (Timer Counter Unit)
> of the Ingenic JZ47xx SoCs.
>
> Signed-off-by: Paul Cercueil
> ---
>
This commit adds a header providing definitions for handling
Status messages. Currently the header only focuses on handling
incoming Status messages.
Signed-off-by: Adam Thomson
---
include/linux/usb/pd_ext_sdb.h | 31 +++
1 file
Hi Paul,
On 2 January 2018 at 20:38, Paul Cercueil wrote:
> Provide just enough bits (clocks, clocksource, uart) to allow a kernel
> to boot on the JZ4770 SoC to a initramfs userspace.
>
> Signed-off-by: Paul Cercueil
> ---
>
On 12/22/2017 02:31 PM, Faiz Abbas wrote:
> From: Franklin S Cooper Jr
>
> Various CAN or CAN-FD IP may be able to run at a faster rate than
> what the transceiver the CAN node is connected to. This can lead to
> unexpected errors. However, CAN transceivers typically have fixed
>
On Tue, Jan 2, 2018 at 4:36 PM, Wang, Haiyue
wrote:
> On 2018-01-02 23:13, Arnd Bergmann wrote:
>>> On 2017-12-31 07:10, Arnd Bergmann wrote:
It also seems rather inflexible to have a single driver that is
responsible both
for the transport (eSPI
Signed-off-by: Vladimir Rutsky
---
Documentation/cgroup-v2.txt | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/Documentation/cgroup-v2.txt b/Documentation/cgroup-v2.txt
index 2cddab7..eb0b679 100644
--- a/Documentation/cgroup-v2.txt
+++
On Wed, Dec 27, 2017 at 06:43:27PM +0900, Jaehoon Chung wrote:
> pci-exynos had updated to use the PHY framework.
> (drivers/phy/samsung/phy-exynos-pcie.c)
> Removed the depreccated codes relevant to phy in pci-exynos.c.
> Instead, use the phy-exynos-pcie.c file.
>
> Modified the binding
In i.MX 6ULL UART8 is part of the AIPS-3 memory map instead of
AIPS-1. Clocks and interrupts remain the same.
Signed-off-by: Stefan Agner
---
arch/arm/boot/dts/imx6ull.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ull.dtsi
The i.MX 6ULL features another IOMUX Controller called IOMUXC
SNVS which allows to control BOOT_MODE and TAMPER pins. Add the
controller to the i.MX 6ULL specific imx6ull.dtsi device tree.
Signed-off-by: Stefan Agner
---
arch/arm/boot/dts/imx6ull.dtsi | 17 +
1
Hi PrasannaKumar,
Le mar. 2 janv. 2018 à 17:37, PrasannaKumar Muralidharan
a écrit :
Hi Paul,
On 30 December 2017 at 19:21, Paul Cercueil
wrote:
Also remove the watchdog platform_device from platform.c, since it
wasn't used anywhere
On Fri 22-12-17 07:05:53, Jeff Layton wrote:
> From: Jeff Layton
>
> We only really need to update i_version if someone has queried for it
> since we last incremented it. By doing that, we can avoid having to
> update the inode if the times haven't changed.
>
> If the times
On Mon, Jan 1, 2018 at 9:31 AM, Greg Kroah-Hartman
wrote:
> This is the start of the stable review cycle for the 4.9.74 release.
> There are 75 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied,
On Fri 22-12-17 18:54:57, Jeff Layton wrote:
> On Sat, 2017-12-23 at 10:14 +1100, NeilBrown wrote:
> > > +#include
> > > +
> > > +/*
> > > + * The change attribute (i_version) is mandated by NFSv4 and is mostly
> > > for
> > > + * knfsd, but is also used for other purposes (e.g. IMA). The
On Tue, Jan 02, 2018 at 01:58:01AM -0800, syzbot wrote:
> Hello,
>
> syzkaller hit the following crash on
> 5aa90a84589282b87666f92b6c3c917c8080a9bf
> git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/master
> compiler: gcc (GCC) 7.1.1 20170620
> .config is attached
> Raw console
pci_flr_wait() and pci_af_flr() functions assume graceful return even
though the device is inaccessible under error conditions.
Return -ENOTTY in error cases so that __pci_reset_function_locked() can
try other reset types if AF_FLR/FLR reset fails.
Signed-off-by: Sinan Kaya
Rev 3.1 Sec 2.3.1 Request Handling Rules indicates that a device can issue
CRS following secondary bus reset. Handle device presence gracefully.
Signed-off-by: Sinan Kaya
Reviewed-by: Christoph Hellwig
---
drivers/pci/pci.c | 2 +-
1 file changed, 1
On Tue, Jan 2, 2018 at 4:08 PM, Paul Cercueil wrote:
> The GCW Zero (http://www.gcw-zero.com) is a retro-gaming focused
> handheld game console, successfully kickstarted in ~2012, running Linux.
>
> Signed-off-by: Paul Cercueil
> ---
>
On January 2, 2018 7:05:35 AM PST, Marcin Wojtas wrote:
>2018-01-02 15:08 GMT+01:00 Andrew Lunn :
>>> Indeed in of_mdio_bus_register_phy, there is of_irq_get. This is
>more
>>> a discussion for a MDIO bus / ACPI patchset, but we either find a
>way
>>> to use
Hi,
On Tue, Jan 02, 2018 at 02:17:22PM +0100, Pavel Machek wrote:
> This adds dts support for magnetometer and touchscreen on Nokia N9.
I think it makes sense to have this splitted.
> Signed-off-by: Pavel Machek
>
> diff --git a/arch/arm/boot/dts/omap3-n9.dts
On 01/02/2018 02:16 AM, Arnd Bergmann wrote:
> The newly added callback pointers cause a warning for some configurations:
>
> In file included from net/ipv6/af_inet6.c:45:0:
> include/linux/netfilter_ipv6.h:38:51: error: 'struct nf_queue_entry' declared
> inside parameter list will not be
When Rayd touchscreen resumed from S3, it issues too many errors like:
i2c_hid i2c-RAYD0001:00: i2c_hid_get_input: incomplete report (58/5442)
And all the report data are corrupted, touchscreen is unresponsive.
Fix this by re-sending report description command after resume.
Add device ID as a
When convert char array with signed int, if the inbuf[x] is negative then
upper bits will be set to 1. Fix this by using u8 instead of char.
ret_size has to be at least 3, hid_input_report use it after minus 2 bytes.
size should be more than 0 to keep memset safe.
Cc: sta...@vger.kernel.org
From: Jia-Ju Bai
Date: Sat, 30 Dec 2017 19:09:47 +0800
> sky2_vpd_wait is not called in an interrupt handler nor holding a spinlock.
> The function mdelay in it can be replaced with msleep, to reduce busy wait.
>
> Signed-off-by: Jia-Ju Bai
On Mon, Jan 01, 2018 at 03:36:31PM +0100, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.14.11 release.
> There are 146 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me
: samba-techni...@lists.samba.org (moderated for non-subscribers)
---
fs/cifs/Kconfig |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- linux-next-20180102.orig/fs/cifs/Kconfig
+++ linux-next-20180102/fs/cifs/Kconfig
@@ -197,7 +197,7 @@ config CIFS_SMB311
config CIFS_SMB_DIRECT
On Tue, Jan 02, 2018 at 08:16:56AM -0800, Tejun Heo wrote:
> Hello,
>
> On Fri, Dec 29, 2017 at 02:07:16AM +0530, Prateek Sood wrote:
> > task T is waiting for cpuset_mutex acquired
> > by kworker/2:1
> >
> > sh ==> cpuhp/2 ==> kworker/2:1 ==> sh
> >
> > kworker/2:3 ==> kthreadd ==> Task T ==>
> Can you describe how you autogenerate the JSONs? Do you have some internal
> proprietary HW file format describing events, with files supplied from HW
> designer, which you can just translate into a JSON? Would the files support
> deferencing events to improve scalability?
For Intel JSON is an
On Thu, Dec 28, 2017 at 11:49:12AM +0100, Bartosz Golaszewski wrote:
> Add other variants of at24 EEPROMs we support in the driver to the
> list of allowed compatible fallbacks.
>
> Signed-off-by: Bartosz Golaszewski
> Reviewed-by: Javier Martinez Canillas
>
On Tue, 02 Jan 2018, Ryder Lee wrote:
> Add a common driver for the top block of the MediaTek audio subsystem.
> This is a wrapper which manages resources for audio components.
>
> Signed-off-by: Ryder Lee
> ---
> drivers/mfd/Kconfig | 9
>
sta...@suse.de>
---
Compile-tested only (with inspection of compiler output on x86_64).
Applicable to linux-next-20180102.
net/ipv4/raw.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/net/ipv4/raw.c b/net/ipv4/raw.c
index 5b9bd5c33d9d..e84290c28c0c 100644
---
The Cortex-A7 and its GIC support virtualization extensions. To
make use of them the CPU private interrupt needs to be specified.
Signed-off-by: Stefan Agner
---
arch/arm/boot/dts/imx6ul.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi
From: Fugang Duan
Update i.MX 6UltraLite IOMUXC pin defines.
Signed-off-by: Fugang Duan
Signed-off-by: Stefan Agner
---
arch/arm/boot/dts/imx6ul-pinfunc.h | 169 +
1 file changed, 97 insertions(+),
On 29/12/17 08:18, Christoph Hellwig wrote:
> If we got back an allocation that wasn't inside the support coherent mask,
> retry the allocation using GFP_DMA.
>
> Based on the x86 code.
>
> Signed-off-by: Christoph Hellwig
> ---
> lib/dma-direct.c | 25 -
>
Add per-core ARM architected timer. Unfortunately bootloaders (U-Boot)
currently do not make the necessary initialization. Also specifing the
clock manually using the clock-frequency property seems not to help.
Therefor leave the timer disabled by default for now.
Signed-off-by: Stefan Agner
When the CPU is in ARM power off state the ARM architected
timers are stopped. The flag is already present in the higher
power WAIT mode.
This allows to use the ARM generic timer on i.MX 6UL/6ULL SoC.
Without the flag the kernel freezes when the timer enters the
first time ARM power off mode.
Rev 3.1 Sec 2.3.1 Request Handling Rules says a device can issue CRS
following a D3hot->D0 transition. Add pci_dev_wait() call to see if
device is available before returning.
Signed-off-by: Sinan Kaya
Reviewed-by: Christoph Hellwig
---
drivers/pci/pci.c | 2
Commit b014e96d1abb ("PCI: Protect pci_error_handlers->reset_notify() usage
with device_lock()") added protection around pci_dev_restore() function so
that device specific remove callback does not cause a race condition
against hotplug.
pci_dev_lock() usage has been forgotten in two different
Rev 3.1 Sec 2.3.1 Request Handling Rules:
Valid reset conditions after which a device is permitted to return CRS
are:
* Cold, Warm, and Hot Resets,
* FLR
* A reset initiated in response to a D3hot to D0 uninitialized
Try to reuse FLR implementation towards other reset types.
Signed-off-by: Sinan
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