On Mon 26-03-18 15:22:32, Joe Perches wrote:
> mm/*.c files use symbolic and octal styles for permissions.
>
> Using octal and not symbolic permissions is preferred by many as more
> readable.
>
> https://lkml.org/lkml/2016/8/2/1945
>
> Prefer the direct use of octal for permissions.
>
> Done
Enabling virtual mapped kernel stacks breaks the thunderx_zip
driver. On compression or decompression the executing CPU hangs
in an endless loop. The reason for this is the usage of __pa
by the driver which does no longer work for an address that is
not part of the 1:1 mapping.
The zip driver
After issuing a request an endless loop was used to read the
completion state from memory which is asynchronously updated
by the ZIP coprocessor.
Add an upper bound to the retry attempts to prevent a CPU getting stuck
forever in case of an error. Additionally, add a read memory barrier
and a
God dag,
Jeg er Mr. Yuehan Pan, direktør for Bank of China
Jeg leder efter en leder / investeringspartner, der vil arbejde sammen med
mig for
en fælles virksomhed.
Kontakt mig i min private email for flere detaljer.
email (yuehanpa...@gmail.com)
Venter på at høre fra dig.
Tak skal du have,
Fix to return error code -ENOMEM from the eviction fence create fail
error handling case instead of 0, as done elsewhere in this function.
Fixes: a46a2cd103a8 ("drm/amdgpu: Add GPUVM memory management functions for
KFD")
Signed-off-by: Wei Yongjun
---
Hi Niklas,
On 28/03/2018 12:50, Niklas Cassel wrote:
> Since a 64-bit BAR consists of a BAR pair, we need to write to both
> BARs in the BAR pair to clear the BAR properly.
>
> Signed-off-by: Niklas Cassel
> ---
> drivers/pci/dwc/pcie-designware-ep.c | 4
> 1 file
On Thursday, March 15, 2018 06:16:24 PM Colin King wrote:
> From: Colin Ian King
>
> There is a missing indentation following an if statement, fix this.
>
> Detected by Coccinelle:
> drivers/video/fbdev/aty/mach64_ct.c:183:2-15: code aligned with
> following code on
On Wed 28-03-18 01:11:55, Sasha Levin wrote:
> On Tue, Mar 27, 2018 at 09:06:37AM +0200, Michal Hocko wrote:
> >On Mon 26-03-18 19:54:31, Sasha Levin wrote:
> >[...]
> >> About half a year ago. I'm not sure about the no visibility part -
> >> maintainers and authors would receive at least 3 mails
Hi all,
this restores previous __GFP_ZERO passthrough behavior for now as arc and
s390 rely on it. Needs more work to sort out the API mess in the long run.
On 03/27/2018 09:26 AM, Greg Kroah-Hartman wrote:
This is the start of the stable review cycle for the 4.14.31 release.
There are 101 patches in this series, all will be posted as a response
to this one. If anyone has any issues with these being applied, please
let me know.
Responses should be
On 03/27/2018 09:26 AM, Greg Kroah-Hartman wrote:
This is the start of the stable review cycle for the 4.15.14 release.
There are 105 patches in this series, all will be posted as a response
to this one. If anyone has any issues with these being applied, please
let me know.
Responses should be
On 03/28/2018 12:07 PM, Colin King wrote:
> From: Colin Ian King
>
> Trivial fix to spelling mistake in error message text
>
> Signed-off-by: Colin Ian King
Applied to bpf-next, thanks Colin!
From: Aniruddha Banerjee
The kernel documentation states that the locking of the irq-chip
registers should be handled by the irq-chip driver. In the irq-gic,
the accesses to the irqchip are seemingly not protected and multiple
writes to SPIs from different irq descriptors
On Mon, Mar 26, 2018 at 10:29 PM, Masahiro Yamada
wrote:
> Run scripts/gcc-plugin.sh from Kconfig. Users can enable GCC_PLUGINS
> only when it is supported.
>
> Signed-off-by: Masahiro Yamada
> ---
>
> Changes in v2: None
>
>
PCI endpoint fixes to improve the way 64-bit BARs are handled.
There are still future improvements that could be made:
pci-epf-test.c always allocates space for
6 BARs, even when using 64-bit BARs (which
really only requires us to allocate 3 BARs).
pcitest.sh will print "NOT OKAY" for BAR1,
Setting a BAR size > 4 GB is invalid if PCI_BASE_ADDRESS_MEM_TYPE_64
flag is not set.
This sanity check is done in pci_epc_set_bar(), so that we don't need
to do this sanity check in all epc->ops->set_bar() implementations.
Signed-off-by: Niklas Cassel
---
If a BAR supports 64-bit width or not depends on the hardware,
and should thus not depend on sizeof(dma_addr_t).
If a certain hardware doesn't support 64-bit BARs, its
epc->ops->set_bar() implementation should return -EINVAL
when PCI_BASE_ADDRESS_MEM_TYPE_64 is set.
We can't change
Hi Chintan,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on v4.16-rc7]
[also build test ERROR on next-20180328]
[cannot apply to arm64/for-next/core tip/x86/core asm-generic/master]
[if your patch is applied to the wrong git tree, please drop us a note to help
On Mon, Mar 26, 2018 at 10:29 PM, Masahiro Yamada
wrote:
> This becomes much neater in Kconfig.
>
> Signed-off-by: Masahiro Yamada
Is there a reason this doesn't have a cc-option test, or was this a
silent addition to the compiler?
Add barno and flags to struct epf_bar.
That way we can simplify epc->ops->set_bar()/pci_epc_set_bar()
by passing a struct *epf_bar instead of a whole lot of arguments.
This is needed so that epc->ops->set_bar() implementations can
modify BAR flags. Will be utilized in a succeeding patch.
Smatch complains that idx can be used uninitialized when we check if
(idx < 0). It has to be the first iteration through the loop and the
HIST_FIELD_FL_STACKTRACE bit has to be clear and the HIST_FIELD_FL_VAR
bit has to be set to reach the bug.
Fixes: 30350d65ac56 ("tracing: Add variable support
On Wed, Mar 28, 2018 at 09:34:54AM +0200, Boris Brezillon wrote:
> Hi Peter,
>
> On Mon, 26 Mar 2018 09:35:02 +0200
> Peter Rosin wrote:
>
> > I have an sama5d31-based system with 64MB of memory and a 1920x1080
> > LVDS display wired for 16-bpp. When I enable legacy fbdev
On Wed, Mar 28, 2018 at 2:04 PM, Christoph Hellwig wrote:
>> +#ifdef CONFIG_INITRAMFS_GENERIC_UNLOAD
>> +void free_initrd_mem(unsigned long start, unsigned long end)
>> +{
>> + free_reserved_area((void *)start, (void *)end, -1, "initrd");
>> +}
>> +#endif
>
> Given how
On 3/28/2018 5:20 PM, kbuild test robot wrote:
@725 if (!pmd_free_pte_page([i]))
My bad ! Will fix this in v7
Chintan
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center,
Inc. is a member of the Code Aurora Forum, a Linux Foundation
Collaborative
On 03/28/2018 08:14 AM, Dr. Greg Wettstein wrote:
On Wed, Mar 28, 2018 at 07:10:12AM -0400, Stefan Berger wrote:
Good morning, I hope the day is starting out well for everyone.
On 03/27/2018 07:01 PM, Eric W. Biederman wrote:
Stefan Berger writes:
From: Yuqiong
On Tue, Mar 27, 2018 at 12:05:23PM -0400, Mathieu Desnoyers wrote:
> diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h
> index fb5fc458547f..66b070444a7e 100644
> --- a/kernel/sched/sched.h
> +++ b/kernel/sched/sched.h
> @@ -1249,6 +1249,7 @@ static inline void __set_task_cpu(struct
>From the HPG:
In some platform, SDCC controller can be connected to either an eMMC device or
an SD card. The PADs for SD card are dual-voltage that support 3v/1.8v. Those
PADs have a control signal (io_pad_pwr_switch/mode18 ) that indicates whether
the PAD works in 3v or 1.8v.
For SD usage the
From: Krishna Konda
The PADs for SD card are dual-voltage that support 3v/1.8v. Those PADs
have a control signal (io_pad_pwr_switch/mode18 ) that indicates
whether the PAD works in 3v or 1.8v.
SDHC core on msm platforms should have IO_PAD_PWR_SWITCH bit set/unset
based
During probe check whether the vdd-io regulator of sdhc platform device
can support 1.8V and 3V and store this information as a capability of
platform device.
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 36 +++-
1
On 28/03/2018 12:29, Alexander Dahl wrote:
> Hello Daniel,
>
> Am Dienstag, 27. März 2018, 13:30:22 CEST schrieb Daniel Lezcano:
>> Can you can give a rough amount for the irq rate on the timer ?
>
> I used itop [1] now to get a rough estimate. First with kernel v4.14.29-rt25
> (fully preempt
+Arnd
On Wed, Mar 28, 2018 at 3:32 AM, Libor Pechacek wrote:
> Support for CRIS and Meta was dropped.
>
> Signed-off-by: Libor Pechacek
> Fixes: bb6fb6dfcc17 ("metag: Remove arch/metag/")
> Fixes: c690eddc2f3b ("CRIS: Drop support for the CRIS port")
>
>From the HPG:
In some platform, SDCC controller can be connected to either an eMMC device or
an SD card. The PADs for SD card are dual-voltage that support 3v/1.8v. Those
PADs have a control signal (io_pad_pwr_switch/mode18 ) that indicates whether
the PAD works in 3v or 1.8v.
For SD usage the
On 03/28/2018 03:06 AM, Lee Jones wrote:
On Tue, 27 Mar 2018, Guenter Roeck wrote:
On 03/27/2018 07:19 AM, Andrey Gusakov wrote:
The uid and die temperature can be read out on the ADIN7 using
input mux. Map uid and die temperature sensor to channels 16
and 17.
Signed-off-by: Andrey Gusakov
On 26/03/2018 00:10, David Rientjes wrote:
> On Wed, 21 Mar 2018, Laurent Dufour wrote:
>
>> I found the root cause of this lockdep warning.
>>
>> In mmap_region(), unmap_region() may be called while vma_link() has not been
>> called. This happens during the error path if call_mmap() failed.
>>
Revert the clearing of __GFP_ZERO in dma_alloc_attrs and move it to
dma_direct_alloc for now. While most common architectures always zero dma
cohereny allocations (and x86 did so since day one) this is not documented
and at least arc and s390 do not zero without the explicit __GFP_ZERO
argument.
On Mon, Mar 26, 2018 at 05:45:55AM -0700, Paul E. McKenney wrote:
> On Sun, Mar 25, 2018 at 11:11:54PM +0300, Yury Norov wrote:
> > On Sun, Mar 25, 2018 at 12:23:28PM -0700, Paul E. McKenney wrote:
> > > On Sun, Mar 25, 2018 at 08:50:04PM +0300, Yury Norov wrote:
> > > > kick_all_cpus_sync()
On Sunday, January 07, 2018 12:58:47 PM SF Markus Elfring wrote:
> From: Markus Elfring
> Date: Sun, 7 Jan 2018 12:34:22 +0100
>
> Omit an extra message for a memory allocation failure in this function.
>
> This issue was detected by using the Coccinelle software.
From: Colin Ian King
The pointer ndev is being dereferenced before it is being null checked,
hence there is a potential null pointer deference. Fix this by only
dereferencing ndev after it has been null checked
Detected by CoverityScan, CID#1467010 ("Dereference before
On Wed, Mar 28, 2018 at 09:00:14AM +0100, M A Young wrote:
> On Tue, 27 Mar 2018, Eric Biggers wrote:
>
> > Hi Michael,
> >
> > On Tue, Mar 27, 2018 at 11:06:14PM +0100, Michael Young wrote:
> > > NFS mounts stopped working on one of my computers after a kernel update
> > > from
> > > 4.15.3 to
This patch fixes the clang warning of extraneous parentheses, with the
following coccinelle script.
@@
identifier i;
constant c;
@@
(
-((i == c))
+i == c
|
-((i <= c))
+i <= c
)
Signed-off-by: Varsha Rao
---
drivers/crypto/cavium/zip/zip_regs.h | 42
On Wed, 2018-03-28 at 21:07 +0200, Michal Hocko wrote:
> I wasn't aware that checkpatch can perform changes as well.
Someone (probably me) should write some better documentation
for checkpatch one day.
The command-line --help output isn't obvious.
Since the value of x is never intended to be read, declare it with gcc
attribute as unused. Fix warning treated as error with W=1:
arch/powerpc/platforms/powermac/bootx_init.c:471:21: error: variable ‘x’ set
but not used [-Werror=unused-but-set-variable]
Signed-off-by: Mathieu Malaterre
2018-03-24 21:18-0700, Wanpeng Li:
> From: Wanpeng Li
>
> PV TLB FLUSH can be turned on when steal time is enabled. The condition
> reverse when the patch is sent out for several rounds review by mistake.
It was just one round and the m/l patch actually looks correct,
On Wed, Mar 28, 2018 at 10:00 AM, Guenter Roeck wrote:
> On Wed, Mar 28, 2018 at 08:14:02AM -0700, Tim Harvey wrote:
>> The Gateworks System Controller has a hwmon sub-component that exposes
>> up to 16 ADC's, some of which are temperature sensors, others which are
>> voltage
2018-03-26 14:42+0200, Vitaly Kuznetsov:
> Vitaly Kuznetsov writes:
>
> > Changes since v5:
> > - Fix a couple of issues reported by kbuild test robot, both in
> > PATCH7 (hope Radim's Reviewed-by: stands).
> >
> > When running nested KVM on Hyper-V it's possible to use so
On Wed, Mar 28, 2018 at 12:17:34PM -0700, Tim Harvey wrote:
> On Wed, Mar 28, 2018 at 9:24 AM, Guenter Roeck wrote:
> > On Wed, Mar 28, 2018 at 08:14:00AM -0700, Tim Harvey wrote:
> >> This patch adds documentation of device-tree bindings for the
> >> Gateworks System
This file is used both for setting the wakeup device without kernel
command line as well as for actually waking the system (when appropriate
swap header is in place).
To avoid confusion on incorrect logs in system log downgrade the
message to debug and make it clearer.
Signed-off-by: Mario
On Wed, Mar 28, 2018 at 01:31:34PM -0300, Thadeu Lima de Souza Cascardo wrote:
> On Tue, Mar 27, 2018 at 06:26:40PM +0200, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 4.15.14 release.
> > There are 105 patches in this series, all will be posted as a response
Add gpio driver for Actions Semi OWL family S900 SoC. Set of registers
controlling the gpio shares the same register range with pinctrl block.
GPIO registers are organized as 6 banks and each bank controls the
maximum of 32 gpios.
Signed-off-by: Manivannan Sadhasivam
Since I'll be working on improving support for ACTIONS platforms, adding
myself as the reviewer.
Signed-off-by: Manivannan Sadhasivam
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9a7f76eadae9..640dabc4c311
Add S900 pinctrl and gpio entries under ARCH_ACTIONS
Signed-off-by: Manivannan Sadhasivam
---
MAINTAINERS | 4
1 file changed, 4 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 640dabc4c311..d63793ee545e 100644
--- a/MAINTAINERS
+++
From: Hans Verkuil
commit 486c521510c44a04cd756a9267e7d1e271c8a4ba upstream.
These helper functions do not really help. Move the code to the
__get/put_v4l2_format32 functions.
Signed-off-by: Hans Verkuil
Acked-by: Sakari Ailus
From: Hans Verkuil
commit a751be5b142ef6bcbbb96d9899516f4d9c8d0ef4 upstream.
put_v4l2_window32() didn't copy back the clip list to userspace.
Drivers can update the clip rectangles, so this should be done.
Signed-off-by: Hans Verkuil
Acked-by:
On Wed, 28 Mar 2018, mike.tra...@hpe.com wrote:
> A critical error was found testing the fixed UV4 HUB in that an MMR
> address was found to be incorrect. This causes the virtual address
> space for accessing the MMIOH1 region to be allocated with the
> incorrect size.
Even if this is not
From: Daniel Mentz
commit 025a26fa14f8fd55d50ab284a30c016a5be953d0 upstream.
Commit b2787845fb91 ("V4L/DVB (5289): Add support for video output
overlays.") added the field global_alpha to struct v4l2_window but did
not update the compat layer accordingly. This change
The new challenge is to remove VLAs from the kernel
(see https://lkml.org/lkml/2018/3/7/621) to eventually
turn on -Wvla.
Using a kmalloc array is the easy way to fix this but kmalloc is still
more expensive than stack allocation. Introduce a fast path with a
fixed size stack array to cover most
From: Hans Verkuil
commit 3ee6d040719ae09110e5cdf24d5386abe5d1b776 upstream.
The result of the VIDIOC_PREPARE_BUF ioctl was never copied back
to userspace since it was missing in the switch.
Signed-off-by: Hans Verkuil
Acked-by: Sakari Ailus
On Wed, Mar 28, 2018 at 11:14:56AM -0700, Matthias Kaehlcke wrote:
> El Wed, Mar 28, 2018 at 08:05:56PM +0200 Greg Kroah-Hartman ha dit:
>
> >
> > A: Because it messes up the order in which people normally read text.
> > Q: Why is top-posting such a bad thing?
> > A: Top-posting.
> > Q: What is
Commit-ID: e2efacb6a54ab54626da3507be1008d0040492cc
Gitweb: https://git.kernel.org/tip/e2efacb6a54ab54626da3507be1008d0040492cc
Author: Yazen Ghannam
AuthorDate: Mon, 26 Mar 2018 14:15:25 -0500
Committer: Thomas Gleixner
CommitDate: Wed, 28
On Fri, 16 Mar 2018 05:00:28 -0400
Richard Guy Briggs wrote:
> Implement the proc fs write to set the audit container ID of a process,
> emitting an AUDIT_CONTAINER record to document the event.
A little detail, but still...
> +static int audit_set_containerid_perm(struct
Hi all,
This patch series contains two API changes to PHYLINK which will later be used
by DSA to migrate to PHYLINK. Because these are API changes that impact other
outstanding work (e.g: MVPP2) I would rather get them included sooner to
minimize
conflicts.
Thank you!
Florian Fainelli (1):
On Wed, Mar 28, 2018 at 10:06:46AM +0200, Christoph Hellwig wrote:
> For PCIe devices the right policy is not a round robin but to use
> the pcie device closer to the node. I did a prototype for that
> long ago and the concept can work. Can you look into that and
> also make that policy used
Am 28.03.2018 um 20:57 schrieb Logan Gunthorpe:
On 28/03/18 12:28 PM, Christian König wrote:
I'm just using amdgpu as blueprint because I'm the co-maintainer of it
and know it mostly inside out.
Ah, I see.
The resource addresses are translated using dma_map_resource(). As far
as I know that
Signed-off-by: Jürg Billeter
---
man2/io_submit.2 | 10 ++
man2/readv.2 | 10 ++
2 files changed, 20 insertions(+)
diff --git a/man2/io_submit.2 b/man2/io_submit.2
index 397fd0b75..79fcdfee4 100644
--- a/man2/io_submit.2
+++ b/man2/io_submit.2
@@ -111,6
Directly use fault_in_pages_readable instead of manual __get_user code. Fix
warning treated as error with W=1:
arch/powerpc/kernel/kvm.c:675:6: error: variable ‘tmp’ set but not used
[-Werror=unused-but-set-variable]
Suggested-by: Christophe Leroy
Signed-off-by:
Good day,
I am Mr. Yuehan Pan, Director of the Bank of China
I am looking for a manager / investment partner who will work with me for
a joint venture.
Contact me in my private email for more details.
email (yuehanpa...@gmail.com)
Waiting to hear from you.
Thank you,
Mr.Yuehan Pan`
2018-03-16 16:37-0400, Babu Moger:
> This patch brings some of the code from vmx to x86.h header file. Now, we
> can share this code between vmx and svm. Modified couple functions to make
> it common.
>
> Signed-off-by: Babu Moger
> ---
> diff --git a/arch/x86/kvm/vmx.c
On Wed, Mar 28, 2018 at 08:14:02AM -0700, Tim Harvey wrote:
> The Gateworks System Controller has a hwmon sub-component that exposes
> up to 16 ADC's, some of which are temperature sensors, others which are
> voltage inputs. The ADC configuration (register mapping and name) is
> configured via
On 2018-03-28 20:40, Colin King wrote:
From: Colin Ian King
The pointer ndev is being dereferenced before it is being null checked,
hence there is a potential null pointer deference. Fix this by only
dereferencing ndev after it has been null checked
Detected by
Add pinctrl driver for Actions Semi S900 SoC. The driver supports
pinctrl, pinmux and pinconf functionalities through a range of registers
common to both gpio driver and pinctrl driver.
Pinmux functionality is available only for the pin groups while the
pinconf functionality is available for both
Add gpio nodes for Actions Semi S900 SoC.
Signed-off-by: Manivannan Sadhasivam
---
.../devicetree/bindings/gpio/actions,owl-gpio.txt | 87 ++
1 file changed, 87 insertions(+)
create mode 100644
Add gpio line names to Actions Semi S900 based Bubblegum-96 board.
Signed-off-by: Manivannan Sadhasivam
Reviewed-by: Linus Walleij
---
arch/arm64/boot/dts/actions/s900-bubblegum-96.dts | 195 ++
1 file changed, 195
- On Mar 28, 2018, at 11:22 AM, Peter Zijlstra pet...@infradead.org wrote:
> On Tue, Mar 27, 2018 at 12:05:31PM -0400, Mathieu Desnoyers wrote:
>
>> 1) Allow algorithms to perform per-cpu data migration without relying on
>>sched_setaffinity()
>>
>> The use-cases are migrating memory
Nagarathnam Muthusamy writes:
> Hi Eric,
>
> From
> https://git.kernel.org/pub/scm/linux/kernel/git/ebiederm/user-namespace.git/tree/ipc/shm.c?h=for-next
>
> It looks like if the following condition in Line 616 succeeds
>
> error = PTR_ERR(file);
> if
Add gpio nodes for Actions Semi S900 SoC.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm64/boot/dts/actions/s900.dtsi | 51 +++
1 file changed, 51 insertions(+)
diff --git a/arch/arm64/boot/dts/actions/s900.dtsi
Select PINCTRL for Actions Semi SoCs
Signed-off-by: Manivannan Sadhasivam
Reviewed-by: Linus Walleij
---
arch/arm64/Kconfig.platforms | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/Kconfig.platforms
On 28/03/2018 00:12, David Rientjes wrote:
> On Tue, 13 Mar 2018, Laurent Dufour wrote:
>
>> diff --git a/include/linux/mm.h b/include/linux/mm.h
>> index 88042d843668..ef6ef0627090 100644
>> --- a/include/linux/mm.h
>> +++ b/include/linux/mm.h
>> @@ -2189,16 +2189,24 @@ void
From: Hans Verkuil
commit 8ed5a59dcb47a6f76034ee760b36e089f3e82529 upstream.
The struct v4l2_plane32 should set m.userptr as well. The same
happens in v4l2_buffer32 and v4l2-compliance tests for this.
Signed-off-by: Hans Verkuil
Acked-by: Sakari
On 3/28/2018 11:17 AM, Thomas Gleixner wrote:
On Wed, 28 Mar 2018, mike.tra...@hpe.com wrote:
A critical error was found testing the fixed UV4 HUB in that an MMR
address was found to be incorrect. This causes the virtual address
space for accessing the MMIOH1 region to be allocated with the
Am 28.03.2018 um 18:25 schrieb Logan Gunthorpe:
On 28/03/18 10:02 AM, Christian König wrote:
Yeah, that looks very similar to what I picked up from the older
patches, going to read up on that after my vacation.
Yeah, I was just reading through your patchset and there are a lot of
From: Thomas Richter
Add CPU measurement counter facility event description files (json
files) for IBM zEC12 and zBC12.
Signed-off-by: Thomas Richter
Reviewed-by: Hendrik Brueckner
Cc: Heiko Carstens
From: Thomas Richter
Add CPU measurement counter facility event description files (json
files) for IBM z196.
Signed-off-by: Thomas Richter
Reviewed-by: Hendrik Brueckner
Cc: Heiko Carstens
El Wed, Mar 28, 2018 at 08:19:36PM +0200 Greg Kroah-Hartman ha dit:
> On Wed, Mar 28, 2018 at 11:14:56AM -0700, Matthias Kaehlcke wrote:
> > El Wed, Mar 28, 2018 at 08:05:56PM +0200 Greg Kroah-Hartman ha dit:
> >
> > >
> > > A: Because it messes up the order in which people normally read text.
From: Arnaldo Carvalho de Melo
The previous patch is insufficient to cure the reported 'perf trace'
segfault, as it only cures the perf_mmap__read_done() case, moving the
segfault to perf_mmap__read_init() functio, fix it by doing the same
refcount check.
Cc: Adrian Hunter
On Sun, 4 Mar 2018 22:24:08 -0700
k...@exchange.microsoft.com wrote:
> From: Michael Kelley
>
> Fix bugs in signaling the Hyper-V host when freeing space in the
> host->guest ring buffer:
>
> 1. The interrupt_mask must not be used to determine whether to signal
>on
Hi Murali,
On 03/27/2018 11:31 AM, Murali Karicheri wrote:
> Navigator Subsystem (NSS) available on K2G SoC has a cut down
> version of QMSS with less number of queues, internal linking ram
> with lesser number of buffers etc. It doesn't have status and
> explicit push register space as in QMSS
These functions can all be static, make it so. Fix warnings treated as
errors with W=1:
arch/powerpc/platforms/powermac/pci.c:1022:6: error: no previous prototype
for ‘pmac_pci_fixup_ohci’ [-Werror=missing-prototypes]
arch/powerpc/platforms/powermac/pci.c:1057:6: error: no previous prototype
> -Original Message-
> From: Moore, Robert [mailto:robert.mo...@intel.com]
> Sent: Wednesday, March 28, 2018 2:53 PM
> To: Limonciello, Mario ;
> alexander.le...@microsoft.com; linux-kernel@vger.kernel.org;
> sta...@vger.kernel.org
> Cc: Schmauss, Erik
On Wed, Mar 28, 2018 at 01:23:59PM -0700, Tim Harvey wrote:
> On Wed, Mar 28, 2018 at 10:00 AM, Guenter Roeck wrote:
> > On Wed, Mar 28, 2018 at 08:14:02AM -0700, Tim Harvey wrote:
> >> The Gateworks System Controller has a hwmon sub-component that exposes
> >> up to 16 ADC's,
MKTME claims several upper bits of the physical address in a page table
entry to encode KeyID. It effectively shrinks number of bits for
physical address. We should exclude KeyID bits from physical addresses.
For instance, if CPU enumerates 52 physical address bits and number of
bits claimed for
Modify several page allocation routines to pass down encryption KeyID to
be used for the allocated page.
There are two basic use cases:
- alloc_page_vma() use VMA's KeyID to allocate the page.
- Page migration and NUMA balancing path use KeyID of original page as
KeyID for newly allocated
On 03/28/2018 09:55 AM, Kirill A. Shutemov wrote:
> +static inline int page_keyid(struct page *page)
> +{
> + if (!mktme_nr_keyids)
> + return 0;
> +
> + return lookup_page_ext(page)->keyid;
> +}
This doesn't look very optimized. Don't we normally try to use
X86_FEATURE_* for
On Wed, Mar 28, 2018 at 8:21 AM, James Hogan wrote:
> On Wed, Mar 28, 2018 at 04:48:53PM +0800, Huacai Chen wrote:
>> diff --git a/arch/mips/boot/compressed/decompress.c
>> b/arch/mips/boot/compressed/decompress.c
>> index fdf99e9..81df904 100644
>> ---
shmem/tmpfs uses pseudo vma to allocate page with correct NUMA policy.
The pseudo vma doesn't have vm_page_prot set. We are going to encode
encryption KeyID in vm_page_prot. Having garbage there causes problems.
Zero out all unused fields in the pseudo vma.
Signed-off-by: Kirill A. Shutemov
Pages for encrypted VMAs have to be allocated in a special way:
we would need to propagate down not only desired NUMA node but also
whether the page is encrypted.
It complicates not-so-trivial routine of huge page allocation in
khugepaged even more. It also puts more pressure on page allocator:
Some panels (i.e. N116BGE-L41), in their power sequence specifications,
request a delay between set the PWM signal and enable the backlight and
between clear the PWM signal and disable the backlight. Add support for
the new post-pwm-on-delay-ms and pwm-off-delay-ms proprieties to meet
the timings.
For veyron the binding should provide both PWM timings, the delay between
you enable the PWM and set the enable signal, and the delay between you
disable the PWM signal and clear the enable signal. Update the binding
accordingly, in this case the panels connected to the veyron boards have
a
A critical error was found testing the fixed UV4 HUB in that an MMR
address was found to be incorrect. This causes the virtual address
space for accessing the MMIOH1 region to be allocated with the
incorrect size.
Signed-off-by: Mike Travis
---
arch/x86/include/asm/uv/uv_mmrs.h
Updates to UV4 fix patches.
--
On Wed, 28 Mar 2018, Paul E. McKenney wrote:
> On Wed, Mar 28, 2018 at 11:01:25AM -0400, Alan Stern wrote:
> > On Wed, 28 Mar 2018, Paul E. McKenney wrote:
> >
> > > Hello!
> > >
> > > The prototype patch shown below provides files required to allow herd7 to
> > > evaluate C-language litmus
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