On 23/05/18 13:36, Oleksandr Andrushchenko wrote:
> From: Oleksandr Andrushchenko
>
> Building for a 32-bit target results in warnings from casting
> between a 32-bit pointer and a 64-bit integer. Fix the warnings
> by casting those pointers to uintptr_t first.
>
> Signed-off-by: Oleksandr Andru
The nvmem will return EPROBE_DEFER, and so will my driver's init. But then no
one will call the init again.
> -Original Message-
> From: Viresh Kumar
> Sent: Wednesday, May 23, 2018 14:46
> To: Ilia Lin
> Cc: Sudeep Holla ; Viresh Kumar
> ; Nishanth Menon ; Stephen Boyd
> ; Rob Herring
On Tue, 22 May 2018 17:07:53 +0200
Geert Uytterhoeven wrote:
> The comment about offset zero was not updated when changing behavior:
> - Automatic offset calculation is indicated by OFFSET_CONTINUOUS,
> - Zero really means offset zero.
>
> Fixes: b175d03dd2072836 ("[PATCH] mtd cmdlinepart: a
On 23/05/18 08:52, Scott Branden wrote:
On 18-05-22 04:24 PM, Ray Jui wrote:
Hi Guenter,
On 5/22/2018 1:54 PM, Guenter Roeck wrote:
On Tue, May 22, 2018 at 11:47:18AM -0700, Ray Jui wrote:
If the watchdog hardware is already enabled during the boot process,
when the Linux watchdog driver lo
On Thu, May 17, 2018 at 6:59 AM, H. Nikolaus Schaller
wrote:
> The register constants are so far defined in a way that they fit
> for the pcal9555a when shifted by the number of banks, i.e. are
> multiplied by 2 in the accessor function.
>
> Now, the pcal6524 has 3 banks which means the relative
On Wed, May 23, 2018 at 01:42:25PM +0200, Marek Vasut wrote:
> The PMIC_DA9063 is a complete misnomer, it denotes the value of the
> DA9063 chip ID register, so rename it as such. It is also the value
> of chip ID register of DA9063L though, so drop the enum as all the
Acked-by: Mark Brown
sign
On Wed, May 23, 2018 at 01:42:26PM +0200, Marek Vasut wrote:
> The model number stored in the struct da9063 is the same for all
> variants of the da9063 since it is the chip ID, which is always
> the same. Replace that with a separate identifier instead, which
Acked-by: Mark Brown
signature.asc
On Wed, May 23, 2018 at 01:42:29PM +0200, Marek Vasut wrote:
> Move the LDOs present only on DA9063 at the end of the list, so that
> the DA9063L can simply indicate less LDOs and still share the list of
> regulators with DA9063.
Acked-by: Mark Brown
signature.asc
Description: PGP signature
On Wed, May 23, 2018 at 01:42:30PM +0200, Marek Vasut wrote:
> Add support for DA9063L, which is a reduced variant of the DA9063
> with less regulators and without RTC.
Acked-by: Mark Brown
signature.asc
Description: PGP signature
On 23 May 2018 at 17:17, wrote:
> The nvmem will return EPROBE_DEFER, and so will my driver's init. But then no
> one will call the init again.
So even your driver needs to be registered as a platform driver then
and you can create its device
from the init function, and add a comment on why you
Introduce the family of LED devices that can
drive a torch, strobe or IR LED.
The LED driver can be configured with a strobe
timer to execute a strobe flash. The IR LED
brightness is controlled via the torch brightness
register.
The data sheet for each the LM36010 and LM36011
LED drivers can be
Introduce the device tree bindings for the lm3601x
family of LED torch, flash and IR drivers.
Reviewed-by: Rob Herring
Signed-off-by: Dan Murphy
---
v9 - No changes - https://patchwork.kernel.org/patch/10418729/
v8 - No changes - https://patchwork.kernel.org/patch/10416161/
v7 - Removed led-so
On 23.05.2018 11:59, Andrey Ryabinin wrote:
>
>
> On 05/23/2018 12:07 AM, Andrew Morton wrote:
>> On Tue, 22 May 2018 22:50:12 +0300 Andrey Ryabinin
>> wrote:
>>
>>>
>>>
>>> On 05/22/2018 07:36 PM, David Hildenbrand wrote:
On 22.05.2018 18:26, Andrey Ryabinin wrote:
>
>
> On 05
On Wed, May 23, 2018 at 1:42 PM, Marek Vasut wrote:
> The PMIC_DA9063 is a complete misnomer, it denotes the value of the
> DA9063 chip ID register, so rename it as such. It is also the value
> of chip ID register of DA9063L though, so drop the enum as all the
> DA9063 "models" share the same chip
Hi Geert,
On Wed, 23 May 2018 at 12:18, Geert Uytterhoeven
wrote:
> Hi Michel,
> On Wed, May 23, 2018 at 11:20 AM, M P wrote:
> > On Wed, 23 May 2018 at 10:12, Geert Uytterhoeven
> > wrote:
> >> On Tue, May 22, 2018 at 12:01 PM, Michel Pollet
> >> wrote:
> >> > + #address-cells = <1>;
On Tue, May 22, 2018 at 8:28 PM, Nick Desaulniers
wrote:
> On Fri, May 18, 2018 at 11:13 AM Marc Zyngier wrote:
>> > - you have checked that with a released version of the compiler, you
>
> On Tue, May 22, 2018 at 10:58 AM Andrey Konovalov
> wrote:
>> Tested-by: Andrey Konovalov
>
> Hi Andrey,
> > For the ring, there is no requirement to allocate exactly the amount
> > specified by the user request. Safer than relying on shared memory
> > and simpler than the extra allocation in this patch would be to allocate
> > extra shadow memory at the end of the ring (and not mmap that).
> >
> > Th
On Wed, May 23, 2018 at 1:42 PM, Marek Vasut wrote:
> The model number stored in the struct da9063 is the same for all
> variants of the da9063 since it is the chip ID, which is always
> the same. Replace that with a separate identifier instead, which
> allows us to discern the DA9063 variants by
On Thu, Apr 19, 2018 at 11:58:43AM +0100, Dave Martin wrote:
> There are a number of bits of code sprinkled around the kernel to
> set a thread flag if a certain condition is true, and clear it
> otherwise.
>
> To help make those call sites terser and less cumbersome, this
> patch adds a new famil
On Wed, May 23, 2018 at 1:42 PM, Marek Vasut wrote:
> Add type for DA9063L, which is a reduced variant of the DA9063
> without RTC block and with less regulators.
>
> Signed-off-by: Marek Vasut
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterh
On Wed, May 23, 2018 at 1:42 PM, Marek Vasut wrote:
> The DA9063L does not contain RTC block, unlike the full DA9063.
> Do not allow binding RTC driver on this variant of the chip.
>
> Signed-off-by: Marek Vasut
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
On Thu, Apr 19, 2018 at 11:58:45AM +0100, Dave Martin wrote:
> This patch uses the new update_thread_flag() helpers to simplify a
> couple of if () set; else clear; constructs.
>
> No functional change.
>
> Signed-off-by: Dave Martin
> Cc: Catalin Marinas
> Cc: Will Deacon
> ---
> arch/arm64/
On Mon, May 21, 2018 at 7:57 PM, Laura Abbott wrote:
> The new challenge is to remove VLAs from the kernel
> (see https://lkml.org/lkml/2018/3/7/621) to eventually
> turn on -Wvla.
>
> Using a kmalloc array is the easy way to fix this but kmalloc is still
> more expensive than stack allocation. I
On Wed, May 23, 2018 at 1:42 PM, Marek Vasut wrote:
> Move the LDOs present only on DA9063 at the end of the list, so that
> the DA9063L can simply indicate less LDOs and still share the list of
> regulators with DA9063.
>
> Signed-off-by: Marek Vasut
Reviewed-by: Geert Uytterhoeven
Gr{oetje,e
On Wed, May 23, 2018 at 1:42 PM, Marek Vasut wrote:
> Add support for DA9063L, which is a reduced variant of the DA9063
> with less regulators and without RTC.
>
> Signed-off-by: Marek Vasut
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoev
Hi,
On 5/12/2018 1:45 AM, Doug Anderson wrote:
Hi,
On Wed, May 9, 2018 at 10:01 AM, Lina Iyer wrote:
+int rpmh_rsc_send_data(struct rsc_drv *drv, const struct tcs_request *msg)
+{
+ int ret;
+
+ if (!msg || !msg->cmds || !msg->num_cmds ||
+ msg->num_cmds > MAX_RPMH_PAYLO
he network
namespace across automounts.
The patches are tagged here:
git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-fs.git
afs-namespace-20180523
The patches can be found here also:
http://git.kernel.org/cgit/linux/kernel/git/dhowells/linux-fs.git/log/?h=
In fs/afs/proc.c, move functions that create and remove /proc files to the
end of the source file as a first stage in getting rid of all the forward
declarations.
Signed-off-by: David Howells
---
fs/afs/proc.c | 160 -
1 file changed, 79
Rearrange fs/afs/proc.c to get rid of all the remaining predeclarations.
Signed-off-by: David Howells
---
fs/afs/proc.c | 352 ++---
1 file changed, 160 insertions(+), 192 deletions(-)
diff --git a/fs/afs/proc.c b/fs/afs/proc.c
index b20098b
Rearrange fs/afs/proc.c by moving fops and open functions down so as to
remove predeclarations.
Signed-off-by: David Howells
---
fs/afs/proc.c | 71 ++---
1 file changed, 27 insertions(+), 44 deletions(-)
diff --git a/fs/afs/proc.c b/fs/afs
This patch introduces two configuration options,
BPF_JIT_HARDEN_BOOTPARAM and BPF_JIT_HARDEN_BOOTPARAM_VALUE, that allow
configuring the initial value of net.core.bpf_jit_harden sysctl knob,
which is useful for enforcing JIT hardening during the early boot.
Signed-off-by: Eugene Syromiatnikov
---
Implement network namespacing within AFS, but don't yet let mounts occur
outside the init namespace. An additional patch will be required propagate
the network namespace across automounts.
Signed-off-by: David Howells
---
fs/afs/cell.c |4 -
fs/afs/cmservice.c |2
fs/afs/intern
Provide two extra functions, proc_create_net_data_write() and
proc_create_net_single_write() that act like their non-write versions but
also set a write method in the proc_dir_entry struct.
An internal simple write function is provided that will copy its buffer and
hand it to the pde->write() meth
Sparse doesn't appear able to handle the conditionally-taken locks in
xdr_decode_AFSFetchStatus(), even though the lock and unlock are both
contingent on the same unvarying function argument.
Deal with this by interpolating a wrapper function that takes the lock if
needed and calls xdr_decode_AFSF
This patch introduces two configuration options,
BPF_JIT_KALLSYMS_BOOTPARAM and BPF_JIT_KALLSYMS_BOOTPARAM_VALUE, that
allow configuring the initial value of net.core.bpf_jit_kallsyms sysctl
knob. This enables export of addresses of JIT'ed BPF programs that
created during the early boot.
Signed-of
The afs_net::ws_cell member is sometimes used under RCU conditions from
within an seq-readlock. It isn't, however, marked __rcu and it isn't set
using the proper RCU barrier-imposing functions.
Fix this by annotating it with __rcu and using appropriate barriers to
make sure accesses are correctly
This patch introduces two configuration options,
UNPRIVILEGED_BPF_BOOTPARAM and UNPRIVILEGED_BPF_BOOTPARAM_VALUE, that
allow configuring the initial value of kernel.unprivileged_bpf_disabled
sysctl knob, which is useful for the cases when disabling unprivileged
bpf() access during the early boot is
Some BPF sysctl knobs affect the loading of BPF programs, and during
system boot/init stages these sysctls are not yet configured.
A concrete example is systemd, that has implemented loading of BPF
programs.
Thus, to allow controlling these setting at early boot, this patch set
adds the ability to
Hi,
On 5/15/2018 11:52 PM, Doug Anderson wrote:
Hi,
On Tue, May 15, 2018 at 10:47 AM, Lina Iyer wrote:
On Fri, May 11 2018 at 14:17 -0600, Doug Anderson wrote:
Hi,
On Wed, May 9, 2018 at 10:01 AM, Lina Iyer wrote:
+int rpmh_write(const struct device *dev, enum rpmh_state state,
+
Rearrange fs/afs/proc.c to move the show routines up to the top of each
block so the order is show, iteration, ops, file ops, fops.
Signed-off-by: David Howells
---
fs/afs/proc.c | 150 +
1 file changed, 75 insertions(+), 75 deletions(-)
On 05/18/2018 04:07 PM, Sean Young wrote:
> The kernel IR decoders (drivers/media/rc/ir-*-decoder.c) support the most
> widely used IR protocols, but there are many protocols which are not
> supported[1]. For example, the lirc-remotes[2] repo has over 2700 remotes,
> many of which are not supported
Hi,
On 5/12/2018 1:48 AM, Doug Anderson wrote:
Hi,
On Wed, May 9, 2018 at 10:01 AM, Lina Iyer wrote:
/**
* struct rpmh_request: the message to be sent to rpmh-rsc
*
@@ -54,9 +71,15 @@ struct rpmh_request {
* struct rpmh_ctrlr: our representation of the controller
*
* @drv: th
On 05/23/2018 01:55 PM, Geert Uytterhoeven wrote:
> On Wed, May 23, 2018 at 1:42 PM, Marek Vasut wrote:
>> The model number stored in the struct da9063 is the same for all
>> variants of the da9063 since it is the chip ID, which is always
>> the same. Replace that with a separate identifier instea
Hi all,
Today's linux-next merge of the arm-soc tree got a conflict in:
arch/arm/include/asm/cputype.h
between commit:
b2ccaa851e9882c10 ("ARM: add CPU part numbers for Cortex A73, A75 and Brahma
B15")
from the arm tree and several commits from the arm-soc tree:
842fa17d6c95368d7 ("ARM
On Wed, May 23, 2018 at 11:34:32AM +0200, Maarten Lankhorst wrote:
> Op 18-05-18 om 17:17 schreef Liviu Dudau:
> > Due to the fact that writeback connectors behave in a special way
> > in DRM (they always report being disconnected) we might confuse some
> > userspace. Add a client capability for wr
On 05/23/2018 10:56 AM, Cornelia Huck wrote:
On Tue, 22 May 2018 12:38:29 -0600
Alex Williamson wrote:
On Tue, 22 May 2018 19:17:07 +0200
Halil Pasic wrote:
From vfio-ccw perspective I join Connie's assessment: vfio-ccw should
be fine with these changes. I'm however not too deeply invol
Hi,
On 5/12/2018 1:46 AM, Doug Anderson wrote:
Hi,
On Wed, May 9, 2018 at 10:01 AM, Lina Iyer wrote:
/**
@@ -137,6 +140,8 @@ void rpmh_tx_done(const struct tcs_request *msg, int r)
dev_err(rpm_msg->dev, "RPMH TX fail in msg addr=%#x, err=%d\n",
rpm_
Hi Sean,
>>
>> [ ... ]
>>
- if (hci_dev_test_flag(hdev, HCI_SETUP)) {
+ if (hci_dev_test_flag(hdev, HCI_SETUP) ||
+ test_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks)) {
hci_sock_dev_event(hdev, HCI_DEV_SETUP);
>>>
>>> I am not 100% sure that we want t
On 05/23/2018 12:03 AM, Andrew Morton wrote:
> On Tue, 22 May 2018 19:44:06 +0300 Andrey Ryabinin
> wrote:
>
>>> Obviously we can't call vfree() to free memory that wasn't allocated via
>>> vmalloc(). Use find_vm_area() to see if we can call vfree().
>>>
>>> Unfortunately it's a bit tricky to
On 23/05/2018 13:46, Fabio Estevam wrote:
> Hi Daniel,
>
> On Wed, May 23, 2018 at 5:06 AM, Daniel Lezcano
> wrote:
>> On 23/05/2018 01:05, Fabio Estevam wrote:
>>> From: Fabio Estevam
>>>
>>> Adopt the SPDX license identifier headers to ease license compliance
>>> management.
>>>
>>> Signed-off
On Tue, May 22, 2018 at 09:18:19PM -0400, Kent Overstreet wrote:
> the new generic radix trees have a simpler API and implementation, and
> no limitations on number of elements, so all flex_array users are being
> converted
This doesn't really feel like it should be a flexarray / genradix user.
It
> Most changes are 1:1 replacements except for
> BUG_ON(atomic_inc_return(&sh->count) != 1);
That doesn't look right, 'inc_return == 1' implies inc-from-zero, which
is not allowed by refcount.
> which has been turned into
> refcount_inc(&sh->count);
> BUG_ON(refcount_read(&s
In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO processors,
the CPU frequency subset and voltage value of each OPP varies
based on the silicon variant in use. Qualcomm Process Voltage Scaling Tables
defines the voltage and frequency value based on the msm-id in SMEM
and speedbin blown
The qcom-cpufreq-kryo driver reads the msm-id and efuse value from the SoC
to provide the OPP framework with required information.
This is used to determine the voltage and frequency value for each OPP of
operating-points-v2 table when it is parsed by the OPP framework.
This change adds documentat
[v11]
* Addressed comment from Russel about device_node reference
* Addressed comment from Sudeep about the late_initcall
* Transformed init into probe to take care of deferals
[v10]
* Split the series into domains
* Addressed comments from Viresh and Sudeep about logical CPU numbering.
The
Hi,
On 23.05.2018 14:15, Alexander Kurtz wrote:
> [Please keep me CC'ed; I'm not subscribed to the list]
>
> Hi!
>
> The program shown below (also available at [0]) does the following:
>
> * Create two sockets
> * Enable SO_REUSEADDR on both
> * Bind both sockets to [::1]:12345
> * Spawn tw
Please find attached details of our T/T payment of EUR 47,631.35
to you
for outstanding payment.
Our sister company instructed we arrange payment to the attached
bank
details.
Best regards
Mit freundlichen Grüßen / Best regards
Fackelmann GmbH + Co. KG
Lena Hauenstein
Sebastian-Fackelmann-Str
On 2018-05-23 14:36:15 [+0200], Peter Zijlstra wrote:
> > Most changes are 1:1 replacements except for
> > BUG_ON(atomic_inc_return(&sh->count) != 1);
>
> That doesn't look right, 'inc_return == 1' implies inc-from-zero, which
> is not allowed by refcount.
>
> > which has been turned into
> >
On 23/05/18 07:02, Zhen Lei wrote:
No functional changes.
What's the mistake?
Signed-off-by: Zhen Lei
---
drivers/iommu/dma-iommu.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c
index ddcbbdb..4e885f7
Hi, Marek,
On 05/23/2018 12:56 PM, Marek Vasut wrote:
[...]
[...]
+while (len) {
+cmd = spi_nor_find_best_erase_cmd(map, region, addr, len);
+if (!cmd)
+return -EINVAL;
What would happen if you realize mid-way that you cannot erase some
sector , do you end up w
[v11]
* Split the series into domains
[v9]
* Addressed comments from Viresh and Russel about the error handling
[v8]
* Reordered the patch series into 4 groups
* Addressed comments from Amit about the comments and commit messages
* Addressed comments from Amit and Viresh about the resourses
The driver provides kernel level API for other drivers
to access the MSM8996 L2 cache registers.
Separating the L2 access code from the PMU driver and
making it public to allow other drivers use it.
The accesses must be separated with a single spinlock,
maintained in this driver.
Signed-off-by: Il
From: Rajendra Nayak
Allow clk_alpha_pll_configure to be called from loadable
kernel modules.
Signed-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
---
drivers/clk/qcom/clk-alpha-pll.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-
Each of the CPU clusters (Power and Perf) on msm8996 are
clocked via 2 PLLs, a primary and alternate. There are also
2 Mux'es, a primary and secondary all connected together
as shown below
+---+
XO | |
+-->0
Each of the CPU clusters (Power and Perf) on msm8996 are
clocked via 2 PLLs, a primary and alternate. There are also
2 Mux'es, a primary and secondary all connected together
as shown below
+---+
XO | |
+-->0
The CPU clock controller's primary PLL operates on a single VCO range,
between 600MHz and 3GHz. However the CPUs do support OPPs with
frequencies between 300MHz and 600MHz. In order to support running the
CPUs at those frequencies we end up having to lock the PLL at twice the
rate and drive the CPU
The PMUX for each duplex allows for selection of ACD clock source.
The DVM (Dynamic Variation Monitor) will flag an error
when a voltage droop event is detected. This flagged error
enables ACD to provide a div-by-2 clock, sourced from the primary PLL.
The duplex will be provided the divided clock
u
From: Rajendra Nayak
Each of the CPU clusters on msm8996 are powered via a primary
PLL and a secondary PLL. The primary PLL is what drives the
CPU clk, except for times when we are reprogramming the PLL
itself, when we temporarily switch to an alternate PLL.
Use clock rate change notifiers to sup
On 22/05/18 05:54, Boris Ostrovsky wrote:
> We are making calls to C code (e.g. xen_prepare_pvh()) which may use
> stack canary (stored in GS segment).
>
> Signed-off-by: Boris Ostrovsky
With the clearing of EDX (instead using CDQ) you can add my
Reviewed-by: Juergen Gross
Juergen
Use devm_clk_hw_register instead of clk_hw_register
to simplify the usage of this API. This way drivers that call
the clk_hw_register_fixed_factor won't need to maintain
a data structure for further cleanup.
Signed-off-by: Ilia Lin
---
drivers/clk/clk-fixed-factor.c | 2 +-
1 file changed, 1 ins
On Sat, May 19, 2018 at 03:42:40AM +1000, James Morris wrote:
> On Fri, 18 May 2018, Jarkko Sakkinen wrote:
>
> > The following changes since commit 5859cdf55063943192f316b3d6c673fd6fcbee46:
> >
> > smack: provide socketpair callback (2018-05-04 12:48:54 -0700)
> >
> > are available in the Git
On Wed, May 23, 2018 at 02:50:07PM +0200, Sebastian Andrzej Siewior wrote:
> On 2018-05-23 14:36:15 [+0200], Peter Zijlstra wrote:
> > > Most changes are 1:1 replacements except for
> > > BUG_ON(atomic_inc_return(&sh->count) != 1);
> >
> > That doesn't look right, 'inc_return == 1' implies inc-f
From: Michal Hocko
Oscar has reported:
: Due to an unfortunate setting with movablecore, memblocks containing bootmem
: memory (pages marked by get_page_bootmem()) ended up marked in zone_movable.
: So while trying to remove that memory, the system failed in do_migrate_range
: and __offline_pages
[Resending with the mailing lists CCed - sorry for spamming]
Hi Andrew,
Oscar has reported two issue when playing with the memory hotplug
[1][2]. The first one seems more serious and patch 1 should address it.
In short we are overly optimistic about zone movable not containing any
non-movable page
From: Michal Hocko
Oscar has noticed that we splat
linux kernel: WARNING: CPU: 0 PID: 64 at ./include/linux/gfp.h:467
vmemmap_alloc_block+0x4e/0xc9
[...]
linux kernel: CPU: 0 PID: 64 Comm: kworker/u4:1 Tainted: GW E
4.17.0-rc5-next-20180517-1-default+ #66
linux kernel: Hardware na
On Fri, May 18, 2018 at 03:30:32PM -0700, Jerry Snitselaar wrote:
> On Mon Mar 26 18, Jarkko Sakkinen wrote:
> > In order to make struct tpm_buf the first class object for constructing TPM
> > commands, migrate tpm2_shutdown() to use it. In addition, removed the klog
> > entry when tpm_transmit_cmd
On 22/05/18 05:54, Boris Ostrovsky wrote:
> We don't need to share PVH GDT layout with other GDTs, especially
> since we now have a PVH-speciific entry (for stack canary segment).
>
> Define PVH's own selectors.
>
> (As a side effect of this change we are also fixing improper
> reference to __KER
On Wed, May 09, 2018 at 09:36:37PM +0200, Sebastian Andrzej Siewior wrote:
> This series is a v2 of the atomic_dec_and_lock_irqsave(). Now refcount_*
> is used instead of atomic_* as suggested by Peter Zijlstra.
>
> Patch
> - 1-3 converts the user from atomic_* API to refcount_* API
> - 4 implemen
On Fri, May 04, 2018 at 05:45:28PM +0200, Sebastian Andrzej Siewior wrote:
> This series introduces atomic_dec_and_lock_irqsave() and converts a few
> users to use it. They were using local_irq_save() +
> atomic_dec_and_lock() before that series.
1,5-6:
Acked-by: Peter Zijlstra (Intel)
On 05/19/2018 04:22 AM, Mike Kravetz wrote:
> The current hugetlbfs maintainer has not been active for more than
> a few years. I have been been active in this area for more than
> two years and plan to remain active in the foreseeable future.
>
> Also, update the hugetlbfs entry to include linux
Hi Prasad,
On Tue, May 22, 2018 at 12:40:05PM -0700, Sodagudi Prasad wrote:
> When following test is executed on 4.14.41 stable kernel, observed that one
> of the core is waiting for tasklist_lock for long time with IRQs disabled.
> ./stress-ng-64 --get 8 -t 3h --times --metrics-brief
>
> Every t
s/Remove not longer/Remove no longer/
On Wed, 23 May 2018, Petr Mladek wrote:
> Semantic changes are possible since the commit d83a7cb375eec21f04
> ("livepatch: change to a per-task consistency model").
>
> Also data structures can be patched since the commit 439e7271dc2b63de37
> ("livepatch: i
On Wed, May 23, 2018 at 01:06:58PM +0300, Alexey Budankov wrote:
> Is the patch ready to be up streamed now?
Please post a new one where you modify the comment about the syscalls
not saving registers and ideally find the commit that made it so.
Also; I think Andy would appreciate a comment near
On 2018-05-23 15:01:25 [+0200], Peter Zijlstra wrote:
> 1-2, 4-6:
>
> Acked-by: Peter Zijlstra (Intel)
Thank you.
Sebastian
On Wed, May 23, 2018 at 03:07:05PM +0200, Miroslav Benes wrote:
>
> s/Remove not longer/Remove no longer/
>
> On Wed, 23 May 2018, Petr Mladek wrote:
>
> > Semantic changes are possible since the commit d83a7cb375eec21f04
> > ("livepatch: change to a per-task consistency model").
> >
> > Also d
Signed-off-by: Ilia Lin
Acked-by: Viresh Kumar
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 269 --
1 file changed, 260 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 37b7152c..e6cf29
[v11]
* Split the series into domains
The series adds OPP tables, thermal and CPU definitions in order to support
the CPU frequency scaling on msm8996 CPUs.
Ilia Lin (2):
dt: qcom: Add opp and thermal to the msm8996
dt: qcom: Add qcom-cpufreq-kryo driver configuration
arch/arm64/boot/dts/q
1. Add NVMEM node for the speedbin
2. Add definitions for all possible MSM8996 CPU OPPs.
The qcom-cpufreq-kryo driver will select the appropriate subset.
Signed-off-by: Ilia Lin
Acked-by: Viresh Kumar
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dts | 2 +-
arch/arm64/boot/dts/qcom/msm8996.dts
On Tue, May 22, 2018 at 09:56:18PM +, Song Liu wrote:
> Did this patch ever make into tip/perf/XX trees? If not, what shall I do
> to move it ahead?
Got it now, thanks for the reminder.
Reviewed-by: Pavel Tatashin
Reviewed-by: Pavel Tatashin
On Wed, May 09, 2018 at 04:33:24PM +0530, Vinayak Menon wrote:
> On 5/8/2018 2:31 AM, Johannes Weiner wrote:
> > + /* Kick the stats aggregation worker if it's gone to sleep */
> > + if (!delayed_work_pending(&group->clock_work))
>
> This causes a crash when the work is scheduled before system
On Tue, May 22, 2018 at 09:27:46AM +, Winkler, Tomas wrote:
> >
> > On Wed, May 16, 2018 at 10:46:00PM +0300, Tomas Winkler wrote:
> > > New wrappers are added tpm_cmd_ready() and tpm_go_idle() wrappers to
> > > streamline tpm_try_transmit code. TPM_TRANSMIT_UNLOCKED flag is
> > abused
> > > t
On Wed, May 23, 2018 at 02:49:19AM -0700, Vito Caputo wrote:
> On Mon, May 21, 2018 at 02:57:18PM -0700, Vito Caputo wrote:
> > On Mon, May 21, 2018 at 12:53:20PM -0700, Vito Caputo wrote:
> > > Hello all,
> > >
> > > 4.17-rc4 (my latest kernel ATM) consistently fails to start xgalaga
> > > withou
On 23/05/2018 11:55, Viresh Kumar wrote:
> On 23-05-18, 10:00, Daniel Lezcano wrote:
[ ... ]
> Maybe I wasn't able to explain the problem I see, but lemme retry
> that. Assume that there is only one use and that id cpu-idle-cooling.
> We are currently running the idle loop with idle duration X an
On 5/23/2018 6:47 PM, Johannes Weiner wrote:
> On Wed, May 09, 2018 at 04:33:24PM +0530, Vinayak Menon wrote:
>> On 5/8/2018 2:31 AM, Johannes Weiner wrote:
>>> + /* Kick the stats aggregation worker if it's gone to sleep */
>>> + if (!delayed_work_pending(&group->clock_work))
>> This causes a
On Wed, May 09, 2018 at 09:36:40PM +0200, Sebastian Andrzej Siewior wrote:
> refcount_t type and corresponding API should be used instead of atomic_t when
> the variable is used as a reference counter. This allows to avoid accidental
> refcounter overflows that might lead to use-after-free situatio
Hi Rob,
On Wed, May 23, 2018 at 12:21:18PM +0100, Robert Walker wrote:
> Hi Leo,
>
> On 22/05/18 10:52, Leo Yan wrote:
> >On Tue, May 22, 2018 at 04:39:20PM +0800, Leo Yan wrote:
> >
> >[...]
> >
> >Rather than the patch I posted in my previous email, I think below new
> >patch is more reasonable
On Tue, May 22, 2018 at 10:32:46AM -0700, Tadeusz Struk wrote:
> There is a race condition in tpm_common_write function allowing two
> threads on the same /dev/tpm, or two different applications on
> the same /dev/tpmrm to overwrite eachother requests/responses.
>
> Signed-off-by: Tadeusz Struk
On 23/05/18 13:38, Ilia Lin wrote:
> In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO processors,
> the CPU frequency subset and voltage value of each OPP varies
> based on the silicon variant in use. Qualcomm Process Voltage Scaling Tables
> defines the voltage and frequency value ba
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