On Tue, May 22, 2018 at 08:29:58PM -0700, Eric Biggers wrote:
> On Fri, May 18, 2018 at 06:02:23PM +0200, Guillaume Nault wrote:
> > On Sun, May 13, 2018 at 11:11:55PM -0700, Eric Biggers wrote:
> > > [+ppp list and maintainer]
> > >
> > > This is a bug in ppp_generic.c; it still happens on Linus'
Hi,
will reply on points other than what Lina has responded.
On 5/12/2018 1:49 AM, Doug Anderson wrote:
Hi,
On Wed, May 9, 2018 at 10:01 AM, Lina Iyer wrote:
/**
@@ -77,12 +82,14 @@ struct rpmh_request {
* @cache: the list of cached requests
* @lock: synchronize access to the control
On 22-05-18, 23:45, Robin Gong wrote:
> The legacy sdma driver has below limitations or drawbacks:
> 1. Hardcode the max BDs number as "PAGE_SIZE / sizeof(*)", and alloc
> one page size for one channel regardless of only few BDs needed
> most time. But in few cases, the max PAGE_SIZE ma
On Tue, May 22, 2018 at 04:23:13PM -0600, Logan Gunthorpe wrote:
> On 22/05/18 03:51 PM, Bjorn Helgaas wrote:
> > I don't think the question of when the aliases need to be added is
> > quite closed. Logan said "it seems pci_add_dma_alias() must be called
> > before the driver is initialized and th
On Wed, 23 May 2018 14:29:28 +0200
Halil Pasic wrote:
> On 05/23/2018 10:56 AM, Cornelia Huck wrote:
> > On Tue, 22 May 2018 12:38:29 -0600
> > Alex Williamson wrote:
> >
> >> On Tue, 22 May 2018 19:17:07 +0200
> >> Halil Pasic wrote:
> >>
> >>> From vfio-ccw perspective I join Connie's
On 23-05-18, 12:56, s.ha...@pengutronix.de wrote:
> Well, it's somewhat related to virtual dma support, but that's not my
> point. My point is that this patch is quite big and thus hard to review.
> If we find ways to make it smaller and to split it up in multiple
> patches then we should do so, b
vWhen atomic_inc_not_zero(v) isn't defined, will define
it as falling back to atomic_add_unless((v), 1, 0), so there's no need
for arch code to do so.
There should be no functional change as a result of this patch.
Signed-off-by: Mark Rutland
Cc: Boqun Feng
Cc: Peter Zijlstra
Cc: Will Deacon
We define a trivial fallback for atomic_inc_not_zero(), but don't do
the same for atmic64_inc_not_zero(), leading most architectures to
define the same boilerplate.
Let's add a fallback in , and remove the redundant
implementations. Note that atomic64_add_unless() is always defined in
, and promot
Currently architecture must implement atomic_fetch_add_unless(), with
common code providing atomic_add_unless(). Architectures must also
implement atmic64_add_unless() directly, with no corresponding
atomic64_fetch_add_unless().
This divergenece is unfortunate, and means that the APIs for atomic_t
Some of the atomics return the result of a test applied after the atomic
operation, and almost all architectures implement these as trivial
wrappers around the underlying atomic. Specifically:
* _inc_and_test(v) is (_inc_return(v) == 0)
* _dec_and_test(v) is (_dec_return(v) == 0)
* _sub_and_test
On 23-05-18, 11:44, Srinivas Kandagatla wrote:
> This patch is required when the pcie controller sits on a bus with
> its own power domain and clocks which are controlled via a bus driver
> like simple pm bus. As these bus driver have runtime pm enabled, it makes
> sense to update the usage counter
Gruß
In einer kurzen Einführung bin ich Rechtsanwalt Hengeler Mueller aus
Portugal, aber jetzt lebe ich in London, ich habe dir eine E-Mail über
deine verstorbene Verwandte geschickt, aber ich habe keine Antwort von
dir erhalten, verstorben ist ein Bürger deines Landes mit derselbe
Nachname mit di
As a step towards unifying the atomic/atomic64/atomic_long APIs, this
patch converts the arch/powerpc implementation of atomic64_add_unless()
into an implementation of atomic64_fetch_add_unless().
A wrapper in will build atomic_add_unless() atop of
this, provided it is given a preprocessor defini
On Wed, May 23, 2018 at 7:54 AM, Jon Rosen (jrosen) wrote:
>> > For the ring, there is no requirement to allocate exactly the amount
>> > specified by the user request. Safer than relying on shared memory
>> > and simpler than the extra allocation in this patch would be to allocate
>> > extra shad
As a step towards unifying the atomic/atomic64/atomic_long APIs, this
patch converts the arch/arc implementation of atomic64_add_unless() into
an implementation of atomic64_fetch_add_unless().
A wrapper in will build atomic_add_unless() atop of
this, provided it is given a preprocessor definition
While __atomic_add_unless was originally intended as a building-block
for atomic_add_unless, it's now used in a number of places around the
kernel. It's the only common atomic operation named __atomic*(), rather
than atomic_*(), and for consistency it would be better named
atomic_fetch_add_unless()
Architectures with atomic64_fetch_add_unless provide a preprocessor
symbol if they do so, and all other architectures have trivial C
implementations of atomic64_add_unless() which are near-identical.
Let's unify the trivial definitions of atomic64_fetch_add_unless() in
, so that we always have bot
As a step towards unifying the atomic/atomic64/atomic_long APIs, this
patch converts the generic implementation of atomic64_add_unless() into
a generic implementation of atomic64_fetch_add_unless().
A wrapper in will build atomic_add_unless() atop of
this, provided it is given a preprocessor defi
On Tue, 22 May 2018 21:18:21 -0400
Kent Overstreet wrote:
> All existing users have been converted to generic radix trees
>
> Signed-off-by: Kent Overstreet
> ---
> Documentation/core-api/flexible-arrays.rst | 130 ---
> Documentation/flexible-arrays.txt | 123 ---
> include/l
As a step towards unifying the atomic/atomic64/atomic_long APIs, this
patch converts the arch/arm implementation of atomic64_add_unless() into
an implementation of atomic64_fetch_add_unless().
A wrapper in will build atomic_add_unless() atop of
this, provided it is given a preprocessor definition
The __clear_user function is defined to return the number of bytes that
could not be cleared. From the underlying memset / bzero implementation
this means setting register a2 to that number on return. Currently if a
page fault is triggered within the MIPSr6 version of setting of initial
unaligned b
As a step towards unifying the atomic/atomic64/atomic_long APIs, this
patch converts the arch/alpha implementation of atomic64_add_unless() into
an implementation of atomic64_fetch_add_unless().
A wrapper in will build atomic_add_unless() atop of
this, provided it is given a preprocessor definiti
As a step towards unifying the atomic/atomic64/atomic_long APIs, this
patch converts the arch/riscv implementation of atomic64_add_unless()
into an implementation of atomic64_fetch_add_unless().
A wrapper in will build atomic_add_unless() atop of
this, provided it is given a preprocessor definiti
This series contains a few cleanups of the atomic API, fixing an
inconsistency between atomic_* and atomic64_*, and minimizing repetition
in arch code. This is nicer for arch code, and the improved regularity
will help when generating the atomic headers in future.
The bulk of the patches reorganis
Several architectures these have a near-identical implementation based
on atomic_read() and atomic_cmpxchg() that we can instead define in
, so let's do so, using something close to the existing
x86 implementation with try_cmpxchg().
Where an architecture provides its own atomic_fetch_add_unless()
On 5/23/18 3:24 AM, Mark Brown wrote:
On Tue, May 22, 2018 at 02:59:35PM -0500, Pierre-Louis Bossart wrote:
I am also not convinced by the notion that maintaining topology files is
only a userspace/distro issue. This would mean some distros will have access
to the required topology files, possi
On 05/23/2018 06:25 PM, Michal Hocko wrote:
> when adding memory to a node that is currently offline.
>
> The VM_WARN_ON is just too loud without a good reason. In this
> particular case we are doing
> alloc_pages_node(node, GFP_KERNEL|__GFP_RETRY_MAYFAIL|__GFP_NOWARN,
> order)
>
> so we d
On 22/05/18 12:46, Wei Yongjun wrote:
platform_get_resource() may fail and return NULL, so we should
better check it's return value to avoid a NULL pointer dereference
a bit later in the code.
This is detected by Coccinelle semantic patch.
@@
expression pdev, res, n, t, e, e1, e2;
@@
res = p
> On Tue, May 22, 2018 at 09:27:46AM +, Winkler, Tomas wrote:
> > >
> > > On Wed, May 16, 2018 at 10:46:00PM +0300, Tomas Winkler wrote:
> > > > New wrappers are added tpm_cmd_ready() and tpm_go_idle()
> wrappers
> > > > to streamline tpm_try_transmit code. TPM_TRANSMIT_UNLOCKED flag
> is
> >
On Wed, May 23, 2018 at 09:14:48AM +0100, James Hogan wrote:
> On Tue, May 22, 2018 at 08:11:42AM -0500, Bjorn Helgaas wrote:
> > From: Bjorn Helgaas
> >
> > Use the pci_info() and pci_err() wrappers for dev_printk() when possible.
> >
> > Signed-off-by: Bjorn Helgaas
> > ---
> > arch/mips/pci
It is not immediately obvious what the expected inputs to these fault
handlers is and how they calculate the number of unset bytes. Having
stared deeply at this in order to fix some corner cases, add some
comments to assist those who follow.
Signed-off-by: Matt Redfearn
---
Changes in v3:
- Upda
On 23/05/18 13:52, Ilia Lin wrote:
> The driver provides kernel level API for other drivers
> to access the MSM8996 L2 cache registers.
> Separating the L2 access code from the PMU driver and
> making it public to allow other drivers use it.
> The accesses must be separated with a single spinlock
Hi Srini,
On 05/23/2018 01:44 PM, Srinivas Kandagatla wrote:
> This patch is required when the pcie controller sits on a bus with
> its own power domain and clocks which are controlled via a bus driver
> like simple pm bus. As these bus driver have runtime pm enabled, it makes
> sense to update th
On 23/05/18 13:38, Ilia Lin wrote:
> [v11]
> * Addressed comment from Russel about device_node reference
> * Addressed comment from Sudeep about the late_initcall
> * Transformed init into probe to take care of deferals
>
> [v10]
> * Split the series into domains
> * Addressed comments from
On Tue, 22 May 2018 18:58:42 +0200,
Guenter Roeck wrote:
>
> +struct skl_dfw_v4_module_caps {
> + u32 set_params:2;
> + u32 rsvd:30;
> + u32 param_id;
> + u32 caps_size;
> + u32 caps[HDA_SST_CFG_MAX];
> +};
Missing __packed attribute?
And I'm wondering whether we should move
On Wed, May 23, 2018 at 2:08 AM, Peter Zijlstra wrote:
>
> Sorry for being late to the party..
>
> On Wed, May 23, 2018 at 12:03:57AM -0500, Gustavo A. R. Silva wrote:
>
>> +#define validate_index_nospec(index, size)\
>> +({
Hi Lukasz,
On Sat, May 19, 2018 at 9:02 AM, Lukasz Majewski wrote:
> After removing imx53-kp-ddc and imx53-kp-common iomux subnodes I do see
> following errors in the dmesg (v4.17-rc5):
>
> imx53-pinctrl 53fa8000.iomuxc: function 'iomuxc' not supported
> imx53-pinctrl 53fa8000.iomuxc: invalid fu
On Wed, May 23, 2018 at 03:54:54PM +0200, Takashi Iwai wrote:
> And I'm wondering whether we should move these definitions to uapi
> headers.
Yes, we should.
signature.asc
Description: PGP signature
On Wed, 23 May 2018 15:42:59 +0200,
Pierre-Louis Bossart wrote:
>
> On 5/23/18 3:24 AM, Mark Brown wrote:
> > On Tue, May 22, 2018 at 02:59:35PM -0500, Pierre-Louis Bossart wrote:
> >
> >> I am also not convinced by the notion that maintaining topology files is
> >> only a userspace/distro issue.
On Tue, May 22, 2018 at 08:59:52PM -0700, Eric Biggers wrote:
> From: Eric Biggers
>
> The PPPIOCDETACH ioctl effectively tries to "close" the given ppp file
> before f_count has reached 0, which is fundamentally a bad idea. It
> does check 'f_count < 2', which excludes concurrent operations on
Hi Chintan,
[as a side note: I'm confused on the status of this patch series, as part
of it was reposted separately by Toshi. Please can you work together?]
On Mon, Apr 30, 2018 at 01:11:33PM +0530, Chintan Pandya wrote:
> Implement pud_free_pmd_page() and pmd_free_pte_page().
>
> Implementatio
On Wed, May 23, 2018 at 3:35 PM, Mark Rutland wrote:
> While __atomic_add_unless was originally intended as a building-block
> for atomic_add_unless, it's now used in a number of places around the
> kernel. It's the only common atomic operation named __atomic*(), rather
> than atomic_*(), and for
On Wed, May 23, 2018 at 3:35 PM, Mark Rutland wrote:
> Several architectures these have a near-identical implementation based
> on atomic_read() and atomic_cmpxchg() that we can instead define in
> , so let's do so, using something close to the existing
> x86 implementation with try_cmpxchg().
>
>
On Wed, 23 May 2018, Nicolas Boichat wrote:
> The "old" enumeration scheme is considerably faster (it takes
> ~294ms instead of ~439ms to get the descriptor).
>
> It is currently only possible to use the old scheme globally
> (/sys/module/usbcore/parameters/old_scheme_first), which is not
> desir
On Wed, May 23, 2018 at 3:35 PM, Mark Rutland wrote:
> Some of the atomics return the result of a test applied after the atomic
> operation, and almost all architectures implement these as trivial
> wrappers around the underlying atomic. Specifically:
>
> * _inc_and_test(v) is (_inc_return(v) == 0
On 22/05/18 10:40, Miquel Raynal wrote:
> This is a cascaded interrupt controller in the AP806 GIC that collapses
> SEIs (System Error Interrupt) coming from the AP and the CPs (through
> the ICU).
>
> The SEI handles up to 64 interrupts. The first 21 interrupts are wired
> and come from the AP. T
On Wed 23-05-18 19:15:51, Anshuman Khandual wrote:
> On 05/23/2018 06:25 PM, Michal Hocko wrote:
> > when adding memory to a node that is currently offline.
> >
> > The VM_WARN_ON is just too loud without a good reason. In this
> > particular case we are doing
> > alloc_pages_node(node, GFP_KE
On Thu 2018-05-17 06:59:49, H. Nikolaus Schaller wrote:
> The register constants are so far defined in a way that they fit
> for the pcal9555a when shifted by the number of banks, i.e. are
> multiplied by 2 in the accessor function.
>
> Now, the pcal6524 has 3 banks which means the relative offset
On Wed 2018-05-16 11:18:52, Yury Norov wrote:
> Based on Andrew Pinski's patch-series.
>
> Signed-off-by: Yury Norov
So Andrew's signoff should be here?
> ---
> Documentation/arm64/ilp32.txt | 45 +++
> 1 file changed, 45 insertions(+)
> create mode 100644 Docu
On Wed 2018-05-23 00:56:38, Aaro Koskinen wrote:
> Hi,
>
> On Tue, May 22, 2018 at 10:58:26PM +0200, Pavel Machek wrote:
> > On Tue 2018-05-22 22:41:39, Aaro Koskinen wrote:
> > > My device worked with v4.17-rc1 (haven't found time to test newer
> > > kernels),
> > > but if you say the probe orde
On Wed, 2018-05-23 at 14:31 +0200, Marcel Holtmann wrote:
> Hi Sean,
>
> >>
> >> [ ... ]
> >>
> -if (hci_dev_test_flag(hdev, HCI_SETUP)) {
> +if (hci_dev_test_flag(hdev, HCI_SETUP) ||
> +test_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks)) {
>
This mostly a revert of commit b91473ff6e97 ("sched,tracing: Update
trace_sched_pi_setprio()") except for the XXX comments.
Since that commit I see during a deboost a task this:
|futex sched_pi_setprio: comm=futex_requeue_p pid=2234 oldprio=98 newprio=98
|futex sched_switch: prev_comm=futex_requeue
On Wed, 16 May 2018 11:00:25 -0400
Steven Rostedt wrote:
> From: "Steven Rostedt (VMware)"
>
> Add a couple of tests that test the trace_marker histogram triggers.
> One does a straight histogram test, the other will create a synthetic event
> and test the latency between two different writes (
On 5/22/18 5:49 PM, Kees Cook wrote:
> On Tue, May 22, 2018 at 4:42 PM, Jens Axboe wrote:
>> On May 22, 2018, at 5:31 PM, Kees Cook wrote:
>>>
On Tue, May 22, 2018 at 12:16 PM, Jens Axboe wrote:
> On 5/22/18 1:13 PM, Christoph Hellwig wrote:
>> On Tue, May 22, 2018 at 01:09:41PM -06
On Wed, 16 May 2018 11:00:26 -0400
Steven Rostedt wrote:
> From: "Steven Rostedt (VMware)"
>
> Add a test that tests a trigger that is initiated by a kernel event
> (sched_waking) and compared to a write to the trace_marker.
>
> Signed-off-by: Steven Rostedt (VMware)
> ---
> .../trigger/trig
On Wed, May 23, 2018 at 12:48 AM, Viresh Kumar wrote:
> On 22-05-18, 14:31, Rob Herring wrote:
>> On Sat, May 19, 2018 at 11:04:50PM +0530, Taniya Das wrote:
>> > + freq-domain-0 {
>> > + compatible = "cpufreq";
>> > + reg = <0x17d43920 0x4>,
>> > +
Hi Stefan,
On Tue, 22 May 2018 14:07:06 +0200
Stefan Agner wrote:
> +
> +struct tegra_nand {
> + void __iomem *regs;
> + struct clk *clk;
> + struct gpio_desc *wp_gpio;
> +
> + struct nand_chip chip;
> + struct device *dev;
> +
> + struct completion command_complete;
> +
Hi,
On 5/12/2018 1:47 AM, Doug Anderson wrote:
Hi,
On Wed, May 9, 2018 at 10:01 AM, Lina Iyer wrote:
Some RSCs may only have sleep and wake TCS, i.e, there is no dedicated
TCS for active mode request, but drivers may still want to make active
requests from these RSCs. In such cases re-purpose
On 05/22/2018 06:28 PM, Rajat Jain wrote:
> Define a structure to hold the AER statistics. There are 2 groups
> of statistics: dev_* counters that are to be collected for all AER
> capable devices and rootport_* counters that are collected for all
> (AER capable) rootports only. Allocate and free t
On 22/05/18 10:40, Miquel Raynal wrote:
> An SEI driver provides an MSI domain through which it is possible to
> raise SEIs.
>
> Handle the NSR probe function in a more generic way to support other
> type of interrupts (ie. the SEIs).
>
> For clarity we do not use tree IRQ domains for now but lin
From: Chao Yu
- rename is_valid_blkaddr() to is_valid_meta_blkaddr() for readability.
- introduce is_valid_blkaddr() for cleanup.
No logic change in this patch.
Signed-off-by: Chao Yu
---
fs/f2fs/checkpoint.c | 4 ++--
fs/f2fs/data.c | 18 +-
fs/f2fs/f2fs.h | 9 +
From: Chao Yu
This patch changes to detect synchronous writeback more earlier before,
in order to avoid unnecessary page writeback before exiting asynchronous
writeback.
Signed-off-by: Chao Yu
---
fs/f2fs/data.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/fs
On Wed, May 23, 2018 at 08:13:56AM -0600, Jens Axboe wrote:
> > Should I move to code to a new drivers/scsi/scsi_sense.c and add it to
> > drivers/scsi/Makefile as:
> >
> > obj-$(CONFIG_BLK_SCSI_REQUEST)+= scsi_sense.o
> >
> > Every place I want to use the code is already covered by
> > CONFI
On 05/23/2018 09:20 AM, Jes Sorensen wrote:
> On 05/22/2018 06:28 PM, Rajat Jain wrote:
>> new file mode 100644
>> index ..b9f251992209
>> --- /dev/null
>> +++ b/drivers/pci/pcie/aer/aerdrv_stats.c
>> @@ -0,0 +1,64 @@
>> +// SPDX-License-Identifier: GPL-2.0
>
> Fix the formatting pleas
On Wed, May 23, 2018 at 10:20:10AM -0400, Jes Sorensen wrote:
> > +++ b/drivers/pci/pcie/aer/aerdrv_stats.c
> > @@ -0,0 +1,64 @@
> > +// SPDX-License-Identifier: GPL-2.0
>
> Fix the formatting please - that gross // gibberish doesn't belong there.
Sorry, Jes. The Chief Penguin has Spoken, and th
Fix stack canary handling (in the first patch) and re-index PVH GDT to
make it explicit that the GDT PVH-specific
v5:
- Load canary's physical address and clear %edx for 64-bit mode
Boris Ostrovsky (2):
xen/PVH: Set up GS segment for stack canary
xen/PVH: Make GDT selectors PVH-specific
arc
We don't need to share PVH GDT layout with other GDTs, especially
since we now have a PVH-speciific entry (for stack canary segment).
Define PVH's own selectors.
(As a side effect of this change we are also fixing improper
reference to __KERNEL_CS)
Signed-off-by: Boris Ostrovsky
Reviewed-by: Ju
We are making calls to C code (e.g. xen_prepare_pvh()) which may use
stack canary (stored in GS segment).
Signed-off-by: Boris Ostrovsky
Reviewed-by: Juergen Gross
---
arch/x86/xen/xen-pvh.S | 26 +-
1 file changed, 25 insertions(+), 1 deletion(-)
diff --git a/arch/x86/
On 05/18/2018 04:55 AM, Pierre Morel wrote:
On 16/05/2018 15:48, Tony Krowiak wrote:
On 05/16/2018 09:15 AM, Pierre Morel wrote:
On 16/05/2018 15:12, Tony Krowiak wrote:
On 05/16/2018 03:48 AM, Pierre Morel wrote:
On 15/05/2018 18:07, Tony Krowiak wrote:
On 05/15/2018 10:55 AM, Pierre Morel
On 05/23/2018 10:26 AM, Alex G. wrote:
> On 05/23/2018 09:20 AM, Jes Sorensen wrote:
>> On 05/22/2018 06:28 PM, Rajat Jain wrote:
>>> new file mode 100644
>>> index ..b9f251992209
>>> --- /dev/null
>>> +++ b/drivers/pci/pcie/aer/aerdrv_stats.c
>>> @@ -0,0 +1,64 @@
>>> +// SPDX-License-I
On 5/23/18 8:25 AM, Christoph Hellwig wrote:
> On Wed, May 23, 2018 at 08:13:56AM -0600, Jens Axboe wrote:
>>> Should I move to code to a new drivers/scsi/scsi_sense.c and add it to
>>> drivers/scsi/Makefile as:
>>>
>>> obj-$(CONFIG_BLK_SCSI_REQUEST)+= scsi_sense.o
>>>
>>> Every place I want to
On 2018-05-17 19:19:43 [+0100], Dave Martin wrote:
> On Thu, May 17, 2018 at 02:40:06PM +0200, Sebastian Andrzej Siewior wrote:
> > In v4.16-RT I noticed a number of warnings from task_fpsimd_load(). The
> > code disables BH and expects that it is not preemptible. On -RT the
> > task remains preemp
On 05/23/2018 09:32 AM, Jes Sorensen wrote:
> On 05/23/2018 10:26 AM, Matthew Wilcox wrote:
>> On Wed, May 23, 2018 at 10:20:10AM -0400, Jes Sorensen wrote:
+++ b/drivers/pci/pcie/aer/aerdrv_stats.c
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: GPL-2.0
>>>
>>> Fix the formatting plea
On 05/23/2018 10:26 AM, Matthew Wilcox wrote:
> On Wed, May 23, 2018 at 10:20:10AM -0400, Jes Sorensen wrote:
>>> +++ b/drivers/pci/pcie/aer/aerdrv_stats.c
>>> @@ -0,0 +1,64 @@
>>> +// SPDX-License-Identifier: GPL-2.0
>>
>> Fix the formatting please - that gross // gibberish doesn't belong there.
>
On Wed, 2018-05-23 at 15:01 +0100, Will Deacon wrote:
> Hi Chintan,
>
> [as a side note: I'm confused on the status of this patch series, as part
> of it was reposted separately by Toshi. Please can you work together?]
I do not know the status of my patch series, either... That being said,
I mad
On 2018-05-18 13:46:36 [+0100], Dave Martin wrote:
> On Thu, May 17, 2018 at 07:19:43PM +0100, Dave Martin wrote:
>
> [...]
>
> > kernel_neon_begin() could then do
> >
> > local_fpsimd_context_lock();
> >
> > /* ... */
> >
> > preempt_disable();
> > local_unlock(fpsimd_context_
Hi,
This is second version of the remaining patches that fix various
problems I encountered while testing my USB Type-C Alternate Mode
patches with GPD Win board (Intel Cherry Trail based). In this version
I've addressed the problems pointed out by Hans and Guenter.
Link to the original version:
Removing the "fusb302" debugfs directory when unloading
the driver. That allows the driver to be loaded more then
ones. The directory will not get actually removed until it
is empty, so only after the last instance has been removed.
This fixes an issue where the driver can't be re-loaded if
it has
On 05/16/2018 03:55 AM, Pierre Morel wrote:
On 07/05/2018 17:11, Tony Krowiak wrote:
Provides a sysfs interface to view the AP matrix configured for the
mediated matrix device.
The relevant sysfs structures are:
/sys/devices/vfio_ap
... [matrix]
.. [mdev_supported_types]
. [vfio_ap
The driver will not probe unless bq24190 is loaded, so
making it a dependency.
Signed-off-by: Heikki Krogerus
Cc: Wolfram Sang
Cc: Darren Hart
Cc: Andy Shevchenko
---
drivers/i2c/busses/Kconfig | 3 +--
drivers/platform/x86/Kconfig | 4 ++--
2 files changed, 3 insertions(+), 4 deletions(-)
Trying to determine the USB port type with this mux is very
difficult. To simplify the situation, always allowing user
control, even if the port is USB Type-C port.
Signed-off-by: Heikki Krogerus
---
.../usb/roles/intel-xhci-usb-role-switch.c| 21 +--
1 file changed, 1 insert
On Tue, May 22, 2018 at 1:30 PM, Saravana Kannan wrote:
> On 05/22/2018 11:08 AM, Rob Herring wrote:
>>
>> On Fri, May 18, 2018 at 12:52:40AM -0700, Saravana Kannan wrote:
>>>
>>> The firmware present in some QCOM chipsets offloads the steps necessary
>>> for
>>> changing the frequency of some dev
On Mon, 2018-05-21 at 19:58 +0800, Yisheng Xie wrote:
> match_string() returns the index of an array for a matching string,
> which can be used intead of open coded variant.
>
> Cc: Mimi Zohar
> Cc: Dmitry Kasatkin
> Cc: James Morris
> Cc: "Serge E. Hallyn"
> Cc: linux-integr...@vger.kernel.or
On Tue, May 22, 2018 at 9:02 PM, Levin Du wrote:
> On 2018-05-23 2:02 AM, Rob Herring wrote:
>>
>> On Fri, May 18, 2018 at 11:52:05AM +0800, d...@t-chip.com.cn wrote:
>>>
>>> From: Levin Du
>>>
>>> Some GPIOs sit in the GRF_SOC_CON registers of Rockchip SoCs,
>>> which do not belong to the genera
Use new return type vm_fault_t for fault handler. For
now, this is just documenting that the function returns
a VM_FAULT value rather than an errno. Once all instances
are converted, vm_fault_t will become a distinct type.
Ref-> commit 1c8f422059ae ("mm: change return type to vm_fault_t")
Previou
On 05/16/2018 04:03 AM, Pierre Morel wrote:
On 07/05/2018 17:11, Tony Krowiak wrote:
Implements the open callback on the mediated matrix device.
The function registers a group notifier to receive notification
of the VFIO_GROUP_NOTIFY_SET_KVM event. When notified,
the vfio_ap device driver will g
On Wed, 23 May 2018 09:33:30 -0500
"Alex G." wrote:
> > Well I'll agree to disagree with Linus on this one. It's ugly as fsck
> > and allows for ambiguous statements in the code.
>
> You misspelled "fuck".
No, Jes is Danish. That's how they spell it.
-- Steve
On 23.05.2018 13:44, Dmitry Osipenko wrote:
> On 23.05.2018 08:58, Viresh Kumar wrote:
>> On 23-05-18, 00:14, Dmitry Osipenko wrote:
>>> Tegra20-cpufreq driver missed enabling the CPU clocks. This results in a
>>> clock-enable refcount disbalance on PLL_P <-> PLL_X reparent, causing
>>> PLL_X to ge
+ Tom and Brijesh.
On Mon, May 21, 2018 at 10:12:53AM -0500, Janakarajan Natarajan wrote:
> Use Kconfig imply 'option' when specifying SEV CRYPTO dependencies.
>
> Example configuration:
> .
> .
> CONFIG_CRYPTO_DEV_CCP=y
> CONFIG_CRYPTO_DEV_CCP_DD=m
> CONFIG_CRYPTO_DEV_SP_CCP=y
> CONFIG_CRYPTO_DE
Hi Bjorn,
On 5/23/2018 1:07 PM, Vinod wrote:
> On 22-05-18, 23:58, Bjorn Andersson wrote:
>> On Tue 22 May 23:05 PDT 2018, Vinod wrote:
>>
>>> On 22-05-18, 22:20, Bjorn Andersson wrote:
>>>
+static int q6v5_wcss_reset(struct q6v5_wcss *wcss)
+{
+ int ret;
+ u32 val;
+ i
Ternary operator have lower precedence then bitwise or, so 'cdw10' was
calculated wrong.
Signed-off-by: Ivan Bornyakov
---
drivers/nvme/host/core.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c
index b070c659391f..1eba
Keith, Sagi, Christoph ping?
--
Johannes Thumshirn Storage
jthumsh...@suse.de+49 911 74053 689
SUSE LINUX GmbH, Maxfeldstr. 5, 90409 Nürnberg
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)
Key fin
On Wed, May 23, 2018 at 04:31:56PM +0200, Sebastian Andrzej Siewior wrote:
> On 2018-05-17 19:19:43 [+0100], Dave Martin wrote:
> > On Thu, May 17, 2018 at 02:40:06PM +0200, Sebastian Andrzej Siewior wrote:
> > > In v4.16-RT I noticed a number of warnings from task_fpsimd_load(). The
> > > code dis
On Wed, 23 May 2018 16:49:35 +0200,
Guenter Roeck wrote:
>
> On Wed, May 23, 2018 at 6:56 AM Takashi Iwai wrote:
> >
> > >
> > > My point was a bit different: distributions like Gallium start without
> > > the relevant topology files and UCM settings, and we should have a
> > > reference to quick
Thanks for the ping. I started a new branch, nvme-4.18-2, based off of
Jens' for-next with this being the first new commit.
I'm certain we're still missing a lot of reviewed commits. I'll try to
go through the mail history and apply by the end of the week, but any
friendly reminders would not be u
On 5/23/2018 5:56 PM, Ivan Bornyakov wrote:
Ternary operator have lower precedence then bitwise or, so 'cdw10' was
calculated wrong.
Signed-off-by: Ivan Bornyakov
---
drivers/nvme/host/core.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/nvme/host/core.c b
On Wed, May 23, 2018 at 11:08:40AM +0200, Peter Zijlstra wrote:
>
> Sorry for being late to the party..
Likewise!
> On Wed, May 23, 2018 at 12:03:57AM -0500, Gustavo A. R. Silva wrote:
> > +#define validate_index_nospec(index, size)\
> > +({
On 05/01/2018 10:35 AM, Oleg Nesterov wrote:
On 04/30, Andrey Grodzovsky wrote:
On 04/30/2018 12:00 PM, Oleg Nesterov wrote:
On 04/30, Andrey Grodzovsky wrote:
What about changing PF_SIGNALED to PF_EXITING in
drm_sched_entity_do_release
- if ((current->flags & PF_SIGNALED) && current
The memory notifier has an important restriction right now: it only
works if offline_pages() is called with the same parameters as
online_pages().
To overcome this restriction, let's handle it per section. We could do
it in smaller granularity, but then we get more vm_area overhead and
cannot chec
Hi Rob, Levin,
sorry for being late to the party.
Am Mittwoch, 23. Mai 2018, 16:43:07 CEST schrieb Rob Herring:
> On Tue, May 22, 2018 at 9:02 PM, Levin Du wrote:
> > On 2018-05-23 2:02 AM, Rob Herring wrote:
> >> On Fri, May 18, 2018 at 11:52:05AM +0800, d...@t-chip.com.cn wrote:
> >>> From: Le
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