Hi,
On Thu, Jul 26, 2018 at 10:55:53PM +0300, Fancer's opinion wrote:
> Hello, folks
> Regarding the no_bootmem patchset I've sent earlier.
> I'm terribly sorry about huge delay with response. I got sucked in a new
> project, so just didn't have a time to proceed with the series, answer to the
> q
Commit-ID: 3ff4f80a74fd38398ae1bd8a458ba9c51aa0dd44
Gitweb: https://git.kernel.org/tip/3ff4f80a74fd38398ae1bd8a458ba9c51aa0dd44
Author: Zhong Jiang
AuthorDate: Wed, 1 Aug 2018 00:24:58 +0800
Committer: Thomas Gleixner
CommitDate: Thu, 2 Aug 2018 13:53:04 +0200
debugobjects: Remove redu
Hi,
Am Mittwoch, 1. August 2018, 10:45:15 CEST schrieb c...@rock-chips.com:
> From: Liang Chen
>
> This patch adds core dtsi file for Rockchip PX30 SoCs.
>
> Signed-off-by: Liang Chen
applied with the following changes:
- some reordering
- cpu properties should be present in all cpu nodes (cl
Hi,
These patches convert sparc32 to use memblock + nobootmem.
I've made the conversion as simple as possible, just enough to allow moving
HAVE_MEMBLOCK and NO_BOOTMEM to the common SPARC configuration.
Mike Rapoport (2):
sparc32: switch to NO_BOOTMEM
sparc32: tidy up ramdisk memory reservati
Hi Randy,
On 08/02/2018 03:05 AM, Randy Dunlap wrote:
> On 07/31/2018 09:13 AM, Georgi Djakov wrote:
>> This patch introduces a new API to get requirements and configure the
>> interconnect buses across the entire chipset to fit with the current
>> demand.
>>
>> The API is using a consumer/provide
Hi Linus,
Ard found a nasty arm64 regression in 4.18 where the AES ghash/gcm code
doesn't notify the kernel about its use of the vector registers, therefore
potentially corrupting live user state. The fix is straightforward and
Herbert agreed for it to go via arm64.
Please pull.
Thanks,
Will
-
In the process of learning Linux source code, I found a bug。In some versions,
he can cause memory leaks, such as 3.10.108, 4.12.14, 3.19.8. Among them, 3.10
is the main line version。The ipc.opt object in the udp_sendmsg function may not
be released resulting in a memory leak.Although I found tha
Hello,
On Thu, Aug 02, 2018 at 07:47:32PM +0800, luo wrote:
> In the process of learning Linux source code, I found a bug?In some versions,
> he can cause memory leaks, such as 3.10.108, 4.12.14, 3.19.8. Among them,
> 3.10 is the main line version?The ipc.opt object in the udp_sendmsg function
> m
Hi Saravana,
On 08/02/2018 01:57 AM, skan...@codeaurora.org wrote:
> On 2018-07-31 09:13, Georgi Djakov wrote:
>> Currently we support only platform data for specifying the interconnect
>> endpoints. As now the endpoints are hard-coded into the consumer driver
>> this may lead to complications whe
Commit-ID: 2171ce2d470d6e389ebbef3edd22c7643918a02f
Gitweb: https://git.kernel.org/tip/2171ce2d470d6e389ebbef3edd22c7643918a02f
Author: Peter Zijlstra
AuthorDate: Mon, 30 Jul 2018 13:21:40 +0200
Committer: Thomas Gleixner
CommitDate: Thu, 2 Aug 2018 14:02:53 +0200
stop_machine: Reflow
On Thu 02-08-18 20:53:14, Tetsuo Handa wrote:
> On 2018/08/02 20:21, Michal Hocko wrote:
> > On Thu 02-08-18 19:53:13, Tetsuo Handa wrote:
> >> On 2018/08/02 9:32, Roman Gushchin wrote:
> > [...]
> >>> +struct mem_cgroup *mem_cgroup_get_oom_group(struct task_struct *victim,
> >>> +
On Mon, 30 Jul 2018, Sinan Kaya wrote:
> Reducing the verbosity level to debug for people that are interested in
> debugging watchdog issues.
>
> [0.152492] NMI watchdog: Perf event create on CPU 0 failed with -2
> [0.156002] NMI watchdog: Perf NMI watchdog permanently disabled
This chan
Commit-ID: 1b3a62643660020cdc68e6139a010c06e8fc96c7
Gitweb: https://git.kernel.org/tip/1b3a62643660020cdc68e6139a010c06e8fc96c7
Author: Kirill A. Shutemov
AuthorDate: Wed, 1 Aug 2018 16:32:25 +0300
Committer: Thomas Gleixner
CommitDate: Thu, 2 Aug 2018 14:22:22 +0200
x86/boot/compresse
Hi,
On 2018/8/2 18:10, Alan Cox wrote:
One motivation I guess, is that most accelerators lack of a
well-abstracted high level APIs similar to GPU side (e.g. OpenCL
clearly defines Shared Virtual Memory models). VFIO mdev
might be an alternative common interface to enable SVA usages
on various ac
Hi Suren,
On Wed, Aug 01, 2018 at 02:56:27PM -0700, Suren Baghdasaryan wrote:
> On Wed, Aug 1, 2018 at 8:19 AM, Johannes Weiner wrote:
> > /*
> > -* The unsigned subtraction here gives an accurate distance
> > -* across inactive_age overflows in most cases.
> > +*
On Tue, Jul 24, 2018 at 01:25:16PM +0100, Quentin Perret wrote:
> @@ -5100,8 +5118,17 @@ enqueue_task_fair(struct rq *rq, struct task_struct
> *p, int flags)
> update_cfs_group(se);
> }
>
> - if (!se)
> + if (!se) {
> add_nr_running(rq, 1);
> +
> # hdparm --user-master u --security-erase p /dev/sda
> (returns immediately and does nothing).
>
> I've tried hdparm on an SSD connected via USB3 and it secure-erased ok.
>
> Anyone working on this?
Sounds to me like you need to contact the vendor of the interface in
question. If it accepted a
Commit-ID: c7ba9f7cb55926605983187a68624999b93abb94
Gitweb: https://git.kernel.org/tip/c7ba9f7cb55926605983187a68624999b93abb94
Author: zhong jiang
AuthorDate: Wed, 1 Aug 2018 00:08:06 +0800
Committer: Thomas Gleixner
CommitDate: Thu, 2 Aug 2018 14:25:40 +0200
x86/platform/olpc: Use PT
Commit-ID: 765d28f136291f9639e3c031a1070fb76d6625c7
Gitweb: https://git.kernel.org/tip/765d28f136291f9639e3c031a1070fb76d6625c7
Author: Chengguang Xu
AuthorDate: Tue, 12 Jun 2018 19:48:52 +0800
Committer: Thomas Gleixner
CommitDate: Thu, 2 Aug 2018 14:27:35 +0200
x86/mm: Remove redunda
Commit-ID: d79d024820f2e522ab30b5e6662c245f887c752b
Gitweb: https://git.kernel.org/tip/d79d024820f2e522ab30b5e6662c245f887c752b
Author: Colin Ian King
AuthorDate: Tue, 31 Jul 2018 10:09:38 +0100
Committer: Thomas Gleixner
CommitDate: Thu, 2 Aug 2018 14:25:41 +0200
x86/platform/UV: Remo
On Mon, Jul 30, 2018 at 12:35:27PM -0700, skan...@codeaurora.org wrote:
> On 2018-07-24 05:25, Quentin Perret wrote:
> If it's going to be a different aggregation from what's done for frequency
> guidance, I don't see the point of having this inside schedutil. Why not
> keep it inside the scheduler
Commit-ID: 216a37202f10b7d78f2f98e26a6681f367165f05
Gitweb: https://git.kernel.org/tip/216a37202f10b7d78f2f98e26a6681f367165f05
Author: Uros Bizjak
AuthorDate: Fri, 29 Jun 2018 16:28:44 +0200
Committer: Thomas Gleixner
CommitDate: Thu, 2 Aug 2018 14:30:42 +0200
x86/boot: Use CC_SET()/C
This patch adds ddrc memory controller node in dts. The size mentioned
in dts is 0x3, because we need to access DDR_QOS INTR registers
located at fd090208 from this driver.
Signed-off-by: Manish Narani
---
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 7 +++
1 file changed, 7 insertions(+)
d
On Thu, Aug 02, 2018 at 08:57:31AM +0200, peter enderborg wrote:
> On 08/01/2018 05:13 PM, Johannes Weiner wrote:
> > diff --git a/include/linux/page-flags.h b/include/linux/page-flags.h
> > index e34a27727b9a..7af1c3c15d8e 100644
> > --- a/include/linux/page-flags.h
> > +++ b/include/linux/page-fl
This patch series enhances the current EDAC driver to support different
platforms.This series adds support for ZynqMP DDRC controller in synopsys
EDAC driver. This series also adds Device tree properties and relevant
binding documentation.
Changes in v2:
- Moved checking of DDR_ECC_INTR_SU
This patch documents Synopsys EDAC driver which reports the single bit
errors that are corrected and the double bit errors that are detected.
Signed-off-by: Manish Narani
---
.../bindings/memory-controllers/synopsys.txt | 27 ++
1 file changed, 22 insertions(+), 5 delet
This patch adds platform specific structures, so that we can add
different IP support later using quirks.
Signed-off-by: Manish Narani
---
drivers/edac/synopsys_edac.c | 64
1 file changed, 53 insertions(+), 11 deletions(-)
diff --git a/drivers/edac/
This patch adds EDAC ECC support for ZynqMP DDRC IP. The patch also adds
support for ECC Error Injection in ZynqMP. The corrected and uncorrected
error interrupts support is added in this patch. The Row, Column, Bank,
Bank Group and Rank bits positions are determined via Address Map
registers of Sy
Commit-ID: 0b2c1aec49ddb2260894df6c69ae7b34142ff936
Gitweb: https://git.kernel.org/tip/0b2c1aec49ddb2260894df6c69ae7b34142ff936
Author: Zhong Jiang
AuthorDate: Sat, 21 Jul 2018 16:33:24 +0800
Committer: Thomas Gleixner
CommitDate: Thu, 2 Aug 2018 14:33:19 +0200
x86/iommu: Use NULL inst
On Tue, Jul 31, 2018 at 12:38:27PM -0700, Reinette Chatre wrote:
> Dear Maintainers,
>
> The success of Cache Pseudo-Locking can be measured via the use of
> performance events. Specifically, the number of cache hits and misses
> reading a memory region after it has been pseudo-locked to cache. Th
Hi Thomas,
On 11/07/18 12:24, Sudeep Holla wrote:
> Using cpu_all_mask in clockevents cpumask may result in issues while
> comparing multiple clockevent devices to choose the preferred one.
> On one of the platforms with 2 system(i.e. non per-CPU) timers with
> different ratings, having cpu_all_ma
Hi,
Am Mittwoch, 1. August 2018, 10:45:16 CEST schrieb c...@rock-chips.com:
> From: Liang Chen
>
> This patch add px30-evb.dts for PX30 evaluation board.
> Tested on PX30 evb.
>
> Acked-by: Rob Herring
> Signed-off-by: Liang Chen
applied with the following changes:
- some reordering
- change
Hi,
Am Mittwoch, 1. August 2018, 10:45:14 CEST schrieb c...@rock-chips.com:
> From: Liang Chen
>
> This patch adds the compatible of GRF and PMUGRF for PX30 SoCs.
>
> Acked-by: Rob Herring
> Signed-off-by: Liang Chen
applied together with the px30 dts patches
Thanks
Heiko
On 25/07/2018 18:30, Vitaly Kuznetsov wrote:
> Changes since v2:
> - Rebase to the current kvm/queue.
> - Simplify clean fields check in prepare_vmcs02{,_full} and
> copy_enlightened_to_vmcs12() by resetting the clean fields mask in
> nested_vmx_handle_enlightened_vmptrld() when we switch from
On Thu, Aug 02, 2018 at 02:33:15PM +0200, Peter Zijlstra wrote:
> On Mon, Jul 30, 2018 at 12:35:27PM -0700, skan...@codeaurora.org wrote:
> > On 2018-07-24 05:25, Quentin Perret wrote:
> > If it's going to be a different aggregation from what's done for frequency
> > guidance, I don't see the point
Em Thu, Aug 02, 2018 at 09:46:20AM +0200, Thomas Richter escreveu:
> Add initial support for s390 auxiliary traces using the
> CPU-Measurement Sampling Facility.
Could you please provide one or two paragraphs explaining what is this
"CPU-Measurement Sampling Facility", in which hardware this is av
On Thu, 2 Aug 2018 11:52:29 +0200
Parthiban Nallathambi wrote:
> Add support for VCNL4035, which is capable of Ambient light
> sensing (ALS) and proximity function. This patch adds support
> only for ALS function
>
> Signed-off-by: Parthiban Nallathambi
Hi Parthiban,
Please avoid replying to a
On Thu, 2 Aug 2018 11:52:30 +0200
Parthiban Nallathambi wrote:
> Adding device tree binding for vcnl4035 and vendor
> prefix for Vishay Intertechnology
>
> Signed-off-by: Parthiban Nallathambi
> ---
Generally don't add your own cut line, just use the one that is already there
below.
One m
This patch adds platform specific structures, so that we can add
different IP support later using quirks.
Signed-off-by: Manish Narani
---
drivers/edac/synopsys_edac.c | 64
1 file changed, 53 insertions(+), 11 deletions(-)
diff --git a/drivers/edac/
This patch series enhances the current EDAC driver to support different
platforms.This series adds support for ZynqMP DDRC controller in synopsys
EDAC driver. This series also adds Device tree properties and relevant
binding documentation.
Changes in v2:
- Moved checking of DDR_ECC_INTR_SU
This patch adds ddrc memory controller node in dts. The size mentioned
in dts is 0x3, because we need to access DDR_QOS INTR registers
located at fd090208 from this driver.
Signed-off-by: Manish Narani
---
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 7 +++
1 file changed, 7 insertions(+)
d
This patch adds EDAC ECC support for ZynqMP DDRC IP. The patch also adds
support for ECC Error Injection in ZynqMP. The corrected and uncorrected
error interrupts support is added in this patch. The Row, Column, Bank,
Bank Group and Rank bits positions are determined via Address Map
registers of Sy
This patch adds information of ZynqMP DDRC which reports the single bit
errors that are corrected and the double bit errors that are detected.
Signed-off-by: Manish Narani
---
.../bindings/memory-controllers/synopsys.txt | 27 ++
1 file changed, 22 insertions(+), 5 dele
Am Dienstag, 31. Juli 2018, 07:59:21 CEST schrieb d...@t-chip.com.cn:
> From: Levin Du
>
> It is necessary for the io domain setting of the SoC to match the voltage
> supplied by the regulators.
>
> Signed-off-by: Levin Du
applied to my dts64 branch, possibly still for 4.19.
Other dts patches
These changes were previously send with the series that transforms the FSL QSPI
driver to the SPI mem interface [1]. As these changes are needed for other
drivers too I send them separately now.
The first patch fixes a typo, the second extends the interface to set and get a
custom name for the mem
When porting (Q)SPI controller drivers from the MTD layer to the SPI
layer, the naming scheme for the memory devices changes. To be able
to keep compatibility with the old drivers naming scheme, a name
field is added to struct spi_mem and a hook is added to let controller
drivers set a custom name
Signed-off-by: Frieder Schrempf
---
include/linux/spi/spi-mem.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h
index 4fa34a2..72cc9bc 100644
--- a/include/linux/spi/spi-mem.h
+++ b/include/linux/spi/spi-mem.h
@@ -124,7
By calling spi_mem_get_name(), the driver of the (Q)SPI controller can
set a custom name for the memory device if necessary.
This is useful to keep mtdparts compatible when controller drivers are
ported from the MTD to the SPI layer.
Suggested-by: Boris Brezillon
Signed-off-by: Frieder Schrempf
On Thu, Aug 2, 2018 at 8:29 PM, Alan Cox wrote:
>> # hdparm --user-master u --security-erase p /dev/sda
>> (returns immediately and does nothing).
>>
>> I've tried hdparm on an SSD connected via USB3 and it secure-erased ok.
>>
>> Anyone working on this?
>
> Sounds to me like you need to contact t
Commit-ID: 234b3840d73430564a03f53973a311b7a83a95a9
Gitweb: https://git.kernel.org/tip/234b3840d73430564a03f53973a311b7a83a95a9
Author: Sudeep Holla
AuthorDate: Wed, 11 Jul 2018 12:24:23 +0100
Committer: Thomas Gleixner
CommitDate: Thu, 2 Aug 2018 14:55:52 +0200
tick/broadcast-hrtimer:
On 23/07/2018 14:31, Tianyu Lan wrote:
> X86_CR4_OSXSAVE check belongs to sregs check and so move into
> kvm_valid_sregs().
>
> Signed-off-by: Lan Tianyu
> ---
> arch/x86/kvm/x86.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm
On Thu, Aug 02 2018 at 01:27 -0600, Marc Zyngier wrote:
On Thu, 02 Aug 2018 07:51:04 +0100,
Lina Iyer wrote:
On Thu, Aug 02 2018 at 00:08 -0600, Marc Zyngier wrote:
> Hi Lina,
>
> On Wed, 01 Aug 2018 20:45:38 +0100,
> Lina Iyer wrote:
>>
>> Thanks for the feedback, Marc.
>>
>> On Wed, Aug 01
On 25/07/2018 10:32, Liang Chen wrote:
> Considering the fact that the pae_root shadow is not needed when
> tdp is in use, skip the pae_root shadow page allocation to allow
> mmu creation even not being able to obtain memory from DMA32
> zone when particular cgroup cpuset.mems or mempolicy control
Hello,
syzbot found the following crash on:
HEAD commit:a94c689e6c9e net: dsa: Do not suspend/resume closed slave_..
git tree: net
console output: https://syzkaller.appspot.com/x/log.txt?x=140800e240
kernel config: https://syzkaller.appspot.com/x/.config?x=2dc0cd7c2eefb46f
dashboa
Commit-ID: fbfa9260085b5b578a049a90135e5c51928c5f7f
Gitweb: https://git.kernel.org/tip/fbfa9260085b5b578a049a90135e5c51928c5f7f
Author: Sudeep Holla
AuthorDate: Wed, 11 Jul 2018 12:24:24 +0100
Committer: Thomas Gleixner
CommitDate: Thu, 2 Aug 2018 14:55:53 +0200
clockevents: Warn if cp
On 23/07/2018 09:47, Tianyu Lan wrote:
> This patch is to avoid compilation warning when CONFIG_HYPERV isn't enabled.
>
> Signed-off-by: Lan Tianyu
> ---
> arch/x86/kvm/vmx.c | 84
> +++---
> 1 file changed, 42 insertions(+), 42 deletions(-)
>
>
On Wednesday, August 01, 2018 11:18 PM , J. Bruce Fields wrote:
>On Mon, Jul 23, 2018 at 09:57:11AM +0800, nixiaoming wrote:
>> READ_BUF(8);
>> dummy = be32_to_cpup(p++);
>> dummy = be32_to_cpup(p++);
>> ...
>> READ_BUF(4);
>> dummy = be32_to_cpup(p++);
>>
>> Assigning value to "dummy" here, bu
On Thursday, 2 August 2018 14:11:43 MSK Dmitry Osipenko wrote:
> There is a bug in regards to deferred probing within the drivers core
> that causes GPIO-driver to suspend after its users. The bug appears if
I meant "before its users", of course. If the rest of the patches is fine,
please let me
On 23/07/2018 08:39, Wanpeng Li wrote:
> From: Wanpeng Li
>
> Fallback to original apic hooks when unlikely kvm fails to add the
> pending IRQ to lapic.
>
> Cc: Paolo Bonzini
> Cc: Radim Krčmář
> Cc: Vitaly Kuznetsov
> Signed-off-by: Wanpeng Li
> ---
> arch/x86/kernel/kvm.c | 20 +++
On Wed, 1 Aug 2018 18:18:12 +0300
Stefan Popa wrote:
> This patch adds support for the adxl372 FIFO. In order to accomplish this,
> triggered buffers were used.
>
> The number of FIFO samples which trigger the watermark interrupt can be
> configured by using the buffer watermark. The FIFO format
Am Mittwoch, 1. August 2018, 10:45:13 CEST schrieb c...@rock-chips.com:
> From: Liang Chen
>
> This patch adds the compatible of dwc2 for PX30 SoCs.
>
> Acked-by: Rob Herring
> Signed-off-by: Liang Chen
I've split out the dwc2 things from the px30 dts and readded them
in a new series and also
On 02/08/18 13:57, tip-bot for Thomas Gleixner wrote:
> Commit-ID: 6777996d27dd4f0a569ed9593e78db68c6b659cd
> Gitweb:
> https://git.kernel.org/tip/6777996d27dd4f0a569ed9593e78db68c6b659cd
> Author: Thomas Gleixner
> AuthorDate: Thu, 2 Aug 2018 14:53:10 +0200
> Committer: Thomas Gleix
Dear sir,
Have a nice day! I am so glad to introduce our company's hot sale and high
quality products ,Bluetooth Speaker, as blow pictures.
we have many different types of Bluetooth Speaker, and with CE, UL , FCC, SAA,
C-TICK, PSE, etc. And We accept small order quantity. If you have more
i
On Thursday 02 Aug 2018 at 14:26:29 (+0200), Peter Zijlstra wrote:
> On Tue, Jul 24, 2018 at 01:25:16PM +0100, Quentin Perret wrote:
> > @@ -5100,8 +5118,17 @@ enqueue_task_fair(struct rq *rq, struct task_struct
> > *p, int flags)
> > update_cfs_group(se);
> > }
> >
> > - if (!
On Wed, Aug 01, 2018 at 10:23:27AM +0100, Quentin Perret wrote:
> On Wednesday 01 Aug 2018 at 10:35:32 (+0200), Rafael J. Wysocki wrote:
> > On Wed, Aug 1, 2018 at 10:23 AM, Quentin Perret
> > wrote:
> > > On Wednesday 01 Aug 2018 at 09:32:49 (+0200), Rafael J. Wysocki wrote:
> > >> On Tue, Jul 3
On 23/07/2018 08:39, Wanpeng Li wrote:
> +Returns 0 if successfully delivery the IPIs and 1 if discarded.
I'm changing this to
"Returns the number of CPUs to which the IPIs were delivered successfully"
with an obvious change to x86.c.
Paolo
On Wed, 1 Aug 2018 18:13:09 +0300
Stefan Popa wrote:
> This patch adds basic support for Analog Devices ADXL372 SPI-Bus
> Three-Axis Digital Accelerometer.
>
> The device is probed and configured the with some initial default
> values. With this basic driver, it is possible to read raw accelerat
On Thu, Aug 02, 2018 at 06:00:19AM -0700, Guenter Roeck wrote:
> Per my logs, next-20180730 is the first bad, next-20180727 is the last good.
OK, so my bisecting is correct (a bit too much but still).
--
Johannes Thumshirn Storage
jthumsh...@suse.de
On Thu, 2 Aug 2018, Sudeep Holla wrote:
> On 02/08/18 13:57, tip-bot for Thomas Gleixner wrote:
> > Commit-ID: 6777996d27dd4f0a569ed9593e78db68c6b659cd
> > Gitweb:
> > https://git.kernel.org/tip/6777996d27dd4f0a569ed9593e78db68c6b659cd
> > Author: Thomas Gleixner
> > AuthorDate: Thu, 2 A
On Thu, Aug 02, 2018 at 02:03:38PM +0100, Quentin Perret wrote:
> On Thursday 02 Aug 2018 at 14:26:29 (+0200), Peter Zijlstra wrote:
> > On Tue, Jul 24, 2018 at 01:25:16PM +0100, Quentin Perret wrote:
> > > @@ -5100,8 +5118,17 @@ enqueue_task_fair(struct rq *rq, struct
> > > task_struct *p, int fl
READ_BUF(8);
dummy = be32_to_cpup(p++);
dummy = be32_to_cpup(p++);
...
READ_BUF(4);
dummy = be32_to_cpup(p++);
Assigning value to "dummy" here, but that stored value
is overwritten before it can be used.
At the same time READ_BUF() will re-update the pointer p.
delete invalid assignment statement
On Thu, 2 Aug 2018 14:53:52 +0200
Frieder Schrempf wrote:
We usually try to avoid empty commit message, even if this one is
pretty obvious, I'd suggest adding something here.
"
Fix a typo in the @drvpriv description.
"
?
> Signed-off-by: Frieder Schrempf
Acked-by: Boris Brezillon
> ---
>
On Thu, 2 Aug 2018 14:53:53 +0200
Frieder Schrempf wrote:
> When porting (Q)SPI controller drivers from the MTD layer to the SPI
> layer, the naming scheme for the memory devices changes. To be able
> to keep compatibility with the old drivers naming scheme, a name
> field is added to struct spi
On Thu, 2 Aug 2018 14:53:54 +0200
Frieder Schrempf wrote:
> By calling spi_mem_get_name(), the driver of the (Q)SPI controller can
> set a custom name for the memory device if necessary.
> This is useful to keep mtdparts compatible when controller drivers are
> ported from the MTD to the SPI lay
Hi Neil,
2018-08-02 10:38 GMT+02:00 Neil Armstrong :
> Please switch to the spdx header format here and in the .h.
> In the DRM driver these are updated in IRQ context, we should make sure we
> don't sleep
> in interrupt context if IRQ occurs when the VDEC updates it's canvases.
>
> Could you sw
Hi MyungJoo,
On 08/02/2018 01:13 PM, MyungJoo Ham wrote:
>> This driver registers itself as a devfreq device that allows devfreq
>> governors to make bandwidth votes for an interconnect path. This allows
>> applying various policies for different interconnect paths using devfreq
>> governors.
>>
>
On Thursday 02 Aug 2018 at 15:08:01 (+0200), Peter Zijlstra wrote:
> On Thu, Aug 02, 2018 at 02:03:38PM +0100, Quentin Perret wrote:
> > On Thursday 02 Aug 2018 at 14:26:29 (+0200), Peter Zijlstra wrote:
> > > On Tue, Jul 24, 2018 at 01:25:16PM +0100, Quentin Perret wrote:
> > > > @@ -5100,8 +5118,
On 02/08/2018 03:19, Stephen Rothwell wrote:
>> -#define KVM_CAP_S390_HPAGE_1M 156
>> +#define KVM_CAP_ARM_INJECT_SERROR_ESR 156
>> ++#define KVM_CAP_S390_HPAGE_1M 157
>>
>> #ifdef KVM_CAP_IRQ_ROUTING
>>
> This is now a conflict between the s390 and kvm-arm trees.
This will shortly move
On Thu, Aug 02, 2018 at 01:00:26PM +, Nixiaoming wrote:
> On Wednesday, August 01, 2018 11:18 PM , J. Bruce Fields wrote:
> >On Mon, Jul 23, 2018 at 09:57:11AM +0800, nixiaoming wrote:
> >> READ_BUF(8);
> >> dummy = be32_to_cpup(p++);
> >> dummy = be32_to_cpup(p++);
> >> ...
> >> READ_BUF(4)
Paolo Bonzini writes:
> On 25/07/2018 18:30, Vitaly Kuznetsov wrote:
>> Changes since v2:
>> - Rebase to the current kvm/queue.
>> - Simplify clean fields check in prepare_vmcs02{,_full} and
>> copy_enlightened_to_vmcs12() by resetting the clean fields mask in
>> nested_vmx_handle_enlightened
Redefinition of qca_uart_setup will help future Qualcomm Bluetooth
SoC, to use the same function instead of duplicating the function.
Added new arguments soc_type and soc_ver to the functions.
These arguments will help to decide type of firmware files
to be loaded into Bluetooth chip.
soc_type hol
This patch enables the RAM and NV patch download for wcn3990.
Signed-off-by: Balakrishna Godavarthi
Reviewed-by: Matthias Kaehlcke
---
drivers/bluetooth/btqca.c | 25 +
1 file changed, 21 insertions(+), 4 deletions(-)
diff --git a/drivers/bluetooth/btqca.c b/drivers/blu
These patches enables Bluetooth functinalties for new Qualcomm
Bluetooth chip wnc3990. As this is latest chip with new features,
along with some common features to old chip "qcom,qca6174-bt".
we have updated names of functions that are used for both the chips
to keep this generic and would help i
This patch enables regulators for the Qualcomm Bluetooth wcn3990
controller.
Signed-off-by: Balakrishna Godavarthi
Reviewed-by: Rob Herring
---
.../bindings/net/qualcomm-bluetooth.txt | 26 +--
1 file changed, 24 insertions(+), 2 deletions(-)
diff --git a/Documentation/de
Some of the QCA BTSoC ROME functions, are used for different versions
or different make of BTSoC's. Instead of duplicating the same functions
for new chip, update names of the functions that are used for both
chips to keep this generic and would help in future when we would have
new BT SoC. To have
Enable Qualcomm chips to operate at 3.2Mbps.
Signed-off-by: Balakrishna Godavarthi
Reviewed-by: Matthias Kaehlcke
---
drivers/bluetooth/hci_qca.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/bluetooth/hci_qca.c b/drivers/bluetooth/hci_qca.c
index 5f8a74d65bec..
In function qca_setup, we set initial and operating speeds for Qualcomm
Bluetooth SoC's. This block of code is common across different
Qualcomm Bluetooth SoC's. Instead of duplicating the code, created
a wrapper function to set the speeds. So that future coming SoC's
can use these wrapper functions
On 02/08/2018 15:22, Vitaly Kuznetsov wrote:
>> Looks good, but we have to do something about live migration.
> Sure,
>
> I don't actually see any fundumental problems when eVMCS is in use,
> however, I'd like to enable migration when we know that it works so I
> was going to wait for your nested
Add support to set voltage/current of various regulators
to power up/down Bluetooth chip wcn3990.
Signed-off-by: Balakrishna Godavarthi
---
Changes in v12:
* removed retrying iteration loop in qca_wcn3990_init.
Changes in v11:
* removed support to read regulator currents from dts.
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