[PATCH 4.14 027/104] x86/speculation/l1tf: Change order of offset/type in swap entry

2018-08-14 Thread Greg Kroah-Hartman
4.14-stable review patch. If anyone has any objections, please let me know. -- From: Linus Torvalds commit bcd11afa7adad8d720e7ba5ef58bdcd9775cf45f upstream If pages are swapped out, the swap entry is stored in the corresponding PTE, which has the Present bit cleared. CPUs

[PATCH 4.14 005/104] scsi: virtio_scsi: fix IO hang caused by automatic irq vector affinity

2018-08-14 Thread Greg Kroah-Hartman
4.14-stable review patch. If anyone has any objections, please let me know. -- From: Ming Lei commit b5b6e8c8d3b4cbeb447a0f10c7d5de3caa573299 upstream. Since commit 84676c1f21e8ff5 ("genirq/affinity: assign vectors to all possible CPUs") it is possible to end up in a scenario

[PATCH 4.14 004/104] scsi: core: introduce force_blk_mq

2018-08-14 Thread Greg Kroah-Hartman
4.14-stable review patch. If anyone has any objections, please let me know. -- From: Ming Lei commit 2f31115e940c4afd49b99c33123534e2ac924ffb upstream. This patch introduces 'force_blk_mq' to the scsi_host_template so that drivers that have no desire to support the legacy I/O

[PATCH 4.14 015/104] fix mntput/mntput race

2018-08-14 Thread Greg Kroah-Hartman
4.14-stable review patch. If anyone has any objections, please let me know. -- From: Al Viro commit 9ea0a46ca2c318fcc449c1e6b62a7230a17888f1 upstream. mntput_no_expire() does the calculation of total refcount under mount_lock; unfortunately, the decrement (as well as all

[PATCH 4.14 018/104] phy: phy-mtk-tphy: use auto instead of force to bypass utmi signals

2018-08-14 Thread Greg Kroah-Hartman
4.14-stable review patch. If anyone has any objections, please let me know. -- From: Chunfeng Yun commit 00c0092c5f62147b7d85f0c6f1cf245a0a1ff3b6 upstream. When system is running, if usb2 phy is forced to bypass utmi signals, all PLL will be turned off, and it can't detect

[PATCH 4.14 021/104] ARM: dts: imx6sx: fix irq for pcie bridge

2018-08-14 Thread Greg Kroah-Hartman
4.14-stable review patch. If anyone has any objections, please let me know. -- From: Oleksij Rempel commit 1bcfe0564044be578841744faea1c2f46adc8178 upstream. Use the correct IRQ line for the MSI controller in the PCIe host controller. Apparently a different IRQ line is used

[PATCH 4.14 022/104] x86/paravirt: Fix spectre-v2 mitigations for paravirt guests

2018-08-14 Thread Greg Kroah-Hartman
4.14-stable review patch. If anyone has any objections, please let me know. -- From: Peter Zijlstra commit 5800dc5c19f34e6e03b5adab1282535cb102fafd upstream. Nadav reported that on guests we're failing to rewrite the indirect calls to CALLEE_SAVE paravirt functions. In

[PATCH 4.14 023/104] x86/speculation: Protect against userspace-userspace spectreRSB

2018-08-14 Thread Greg Kroah-Hartman
4.14-stable review patch. If anyone has any objections, please let me know. -- From: Jiri Kosina commit fdf82a7856b32d905c39afc85e34364491e46346 upstream. The article "Spectre Returns! Speculation Attacks using the Return Stack Buffer" [1] describes two new (sub-)variants of

[PATCH 4.14 024/104] kprobes/x86: Fix %p uses in error messages

2018-08-14 Thread Greg Kroah-Hartman
4.14-stable review patch. If anyone has any objections, please let me know. -- From: Masami Hiramatsu commit 0ea063306eecf300fcf06d2f5917474b580f666f upstream. Remove all %p uses in error messages in kprobes/x86. Signed-off-by: Masami Hiramatsu Cc: Ananth N

[PATCH 4.14 006/104] kasan: add no_sanitize attribute for clang builds

2018-08-14 Thread Greg Kroah-Hartman
4.14-stable review patch. If anyone has any objections, please let me know. -- From: Andrey Konovalov commit 12c8f25a016dff69ee284aa3338bebfd2cfcba33 upstream. KASAN uses the __no_sanitize_address macro to disable instrumentation of particular functions. Right now it's

[PATCH 4.14 030/104] x86/speculation/l1tf: Make sure the first page is always reserved

2018-08-14 Thread Greg Kroah-Hartman
4.14-stable review patch. If anyone has any objections, please let me know. -- From: Andi Kleen commit 10a70416e1f067f6c4efda6ffd8ea96002ac4223 upstream The L1TF workaround doesn't make any attempt to mitigate speculate accesses to the first physical page for zeroed PTEs.

[PATCH 4.9 040/107] cpu/hotplug: Split do_cpu_down()

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit cc1fe215e1efa406b03aa4389e6269b61342dec5 upstream Split out the inner workings of do_cpu_down() to allow reuse of that function for the upcoming SMT disabling mechanism.

[PATCH 4.9 042/107] x86/cpu: Remove the pointless CPU printout

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 55e6d279abd92cfd7576bba031e7589be8475edb upstream The value of this printout is dubious at best and there is no point in having it in two different places along with

[PATCH 4.9 034/107] x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Andi Kleen commit 42e4089c7890725fcd32252dc489b72f2921 upstream For L1TF PROT_NONE mappings are protected by inverting the PFN in the page table entry. This sets the high bits in the CPU's

[PATCH 4.9 043/107] x86/cpu/AMD: Remove the pointless detect_ht() call

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 44ca36de56d1bf196dca2eb67cd753a46961ffe6 upstream Real 32bit AMD CPUs do not have SMT and the only value of the call was to reach the magic printout which got removed.

[PATCH 4.9 039/107] cpu/hotplug: Make bringup/teardown of smp threads symmetric

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit c4de65696d865c225fda3b9913b31284ea65ea96 upstream The asymmetry caused a warning to trigger if the bootup was stopped in state CPUHP_AP_ONLINE_IDLE. The warning no

[PATCH 4.9 041/107] cpu/hotplug: Provide knobs to control SMT

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 05736e4ac13c08a4a9b1ef2de26dd31a32cbee57 upstream Provide a command line and a sysfs knob to control SMT. The command line options are: 'nosmt': Enumerate

[PATCH 4.9 033/107] x86/speculation/l1tf: Add sysfs reporting for l1tf

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Andi Kleen commit 17dbca119312b4e8173d4e25ff64262119fcef38 upstream L1TF core kernel workarounds are cheap and normally always enabled, However they still should be reported in sysfs if the

[PATCH 4.9 038/107] x86/topology: Provide topology_smt_supported()

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit f048c399e0f7490ab7296bc2c255d37eb14a9675 upstream Provide information whether SMT is supoorted by the CPUs. Preparatory patch for SMT control mechanism. Suggested-by:

[PATCH 4.9 029/107] x86/speculation/l1tf: Change order of offset/type in swap entry

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Linus Torvalds commit bcd11afa7adad8d720e7ba5ef58bdcd9775cf45f upstream If pages are swapped out, the swap entry is stored in the corresponding PTE, which has the Present bit cleared. CPUs

[PATCH 4.9 028/107] mm: x86: move _PAGE_SWP_SOFT_DIRTY from bit 7 to bit 1

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Naoya Horiguchi commit eee4818baac0f2b37848fdf90e4b16430dc536ac upstream _PAGE_PSE is used to distinguish between a truly non-present (_PAGE_PRESENT=0) PMD, and a PMD which is undergoing a THP

[PATCH 4.9 025/107] kprobes/x86: Fix %p uses in error messages

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Masami Hiramatsu commit 0ea063306eecf300fcf06d2f5917474b580f666f upstream. Remove all %p uses in error messages in kprobes/x86. Signed-off-by: Masami Hiramatsu Cc: Ananth N Mavinakayanahalli

[PATCH 4.9 024/107] x86/speculation: Protect against userspace-userspace spectreRSB

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Jiri Kosina commit fdf82a7856b32d905c39afc85e34364491e46346 upstream. The article "Spectre Returns! Speculation Attacks using the Return Stack Buffer" [1] describes two new (sub-)variants of

[PATCH 4.9 022/107] ARM: dts: imx6sx: fix irq for pcie bridge

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Oleksij Rempel commit 1bcfe0564044be578841744faea1c2f46adc8178 upstream. Use the correct IRQ line for the MSI controller in the PCIe host controller. Apparently a different IRQ line is used

[PATCH 4.9 000/107] 4.9.120-stable review

2018-08-14 Thread Greg Kroah-Hartman
This is the start of the stable review cycle for the 4.9.120 release. There are 107 patches in this series, all will be posted as a response to this one. If anyone has any issues with these being applied, please let me know. Responses should be made by Thu Aug 16 17:14:53 UTC 2018. Anything

[PATCH 4.9 026/107] x86/irqflags: Provide a declaration for native_save_fl

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Nick Desaulniers commit 208cbb32558907f68b3b2a081ca2337ac3744794 upstream. It was reported that the commit d0a8d9378d16 is causing users of gcc < 4.9 to observe -Werror=missing-prototypes

[PATCH 4.9 021/107] IB/ocrdma: fix out of bounds access to local buffer

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Michael Mera commit 062d0f22a30c39840ea49b72cfcfc1aa4cc538fa upstream. In write to debugfs file 'resource_stats' the local buffer 'tmp_str' is written at index 'count-1' where 'count' is the

[PATCH 4.9 012/107] make sure that __dentry_kill() always invalidates d_seq, unhashed or not

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Al Viro commit 4c0d7cd5c8416b1ef41534d19163cb07ffaa03ab upstream. RCU pathwalk relies upon the assumption that anything that changes ->d_inode of a dentry will invalidate its ->d_seq. That's

[PATCH 4.9 030/107] x86/speculation/l1tf: Protect swap entries against L1TF

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Linus Torvalds commit 2f22b4cd45b67b3496f4aa4c7180a1271c6452f6 upstream With L1 terminal fault the CPU speculates into unmapped PTEs, and resulting side effects allow to read the memory the

[PATCH 4.9 032/107] x86/speculation/l1tf: Make sure the first page is always reserved

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Andi Kleen commit 10a70416e1f067f6c4efda6ffd8ea96002ac4223 upstream The L1TF workaround doesn't make any attempt to mitigate speculate accesses to the first physical page for zeroed PTEs.

[PATCH 4.9 013/107] fix mntput/mntput race

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Al Viro commit 9ea0a46ca2c318fcc449c1e6b62a7230a17888f1 upstream. mntput_no_expire() does the calculation of total refcount under mount_lock; unfortunately, the decrement (as well as all

[PATCH 4.9 007/107] xen/netfront: dont cache skb_shinfo()

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Juergen Gross commit d472b3a6cf63cd31cae1ed61930f07e6cd6671b5 upstream. skb_shinfo() can change when calling __pskb_pull_tail(): Don't cache its return value. Cc: sta...@vger.kernel.org

[PATCH 4.9 027/107] x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Andi Kleen commit 50896e180c6aa3a9c61a26ced99e15d602666a4c upstream L1 Terminal Fault (L1TF) is a speculation related vulnerability. The CPU speculates on PTE entries which do not have the

[PATCH 4.9 006/107] Mark HI and TASKLET softirq synchronous

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Linus Torvalds commit 3c53776e29f81719efcf8f7a6e30cdf753bee94d upstream. Way back in 4.9, we committed 4cd13c21b207 ("softirq: Let ksoftirqd do its job"), and ever since we've had small

[PATCH 4.9 023/107] x86/paravirt: Fix spectre-v2 mitigations for paravirt guests

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Peter Zijlstra commit 5800dc5c19f34e6e03b5adab1282535cb102fafd upstream. Nadav reported that on guests we're failing to rewrite the indirect calls to CALLEE_SAVE paravirt functions. In

[PATCH 4.4 35/43] x86/speculation/l1tf: Extend 64bit swap file size limit

2018-08-14 Thread Greg Kroah-Hartman
4.4-stable review patch. If anyone has any objections, please let me know. -- From: Vlastimil Babka commit 1a7ed1ba4bba6c075d5ad61bb75e3fbc870840d6 upstream The previous patch has limited swap file size so that large offsets cannot clear bits above MAX_PA/2 in the pte and

Re: Build failures with gcc 4.5 and older

2018-08-14 Thread Joe Perches
On Tue, 2018-08-14 at 10:09 -0700, Guenter Roeck wrote: > Hi, > > Since commit c1a2f7f0c0645 ("mm: Allocate the mm_cpumask > (mm->cpu_bitmap[]) dynamically based on nr_cpu_ids"), building > the Linux kernel with gcc version 4.5 and older fails as follows. > > In file included from

[PATCH 4.4 42/43] x86/mm/kmmio: Make the tracer robust against L1TF

2018-08-14 Thread Greg Kroah-Hartman
4.4-stable review patch. If anyone has any objections, please let me know. -- From: Andi Kleen commit 1063711b57393c1999248cccb57bebfaf16739e7 upstream The mmio tracer sets io mapping PTEs and PMDs to non present when enabled without inverting the address bits, which makes

[PATCH 4.4 43/43] x86/speculation/l1tf: Fix up CPU feature flags

2018-08-14 Thread Greg Kroah-Hartman
4.4-stable review patch. If anyone has any objections, please let me know. -- From: Guenter Roeck In linux-4.4.y, the definition of X86_FEATURE_RETPOLINE and X86_FEATURE_RETPOLINE_AMD is different from the upstream definition. Result is an overlap with the newly introduced

[PATCH 4.4 27/43] x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation

2018-08-14 Thread Greg Kroah-Hartman
4.4-stable review patch. If anyone has any objections, please let me know. -- From: Andi Kleen commit 6b28baca9b1f0d4a42b865da7a05b1c81424bd5c upstream When PTEs are set to PROT_NONE the kernel just clears the Present bit and preserves the PFN, which creates attack surface

[PATCH 4.4 41/43] x86/mm/pat: Make set_memory_np() L1TF safe

2018-08-14 Thread Greg Kroah-Hartman
4.4-stable review patch. If anyone has any objections, please let me know. -- From: Andi Kleen commit 958f79b9ee55dfaf00c8106ed1c22a2919e0028b upstream set_memory_np() is used to mark kernel mappings not present, but it has it's own open coded mechanism which does not have

Re: [RFC PATCH 1/2] dt-bindings: dmaengine: xilinx_dma: Add binding for Xilinx MCDMA IP

2018-08-14 Thread Rob Herring
On Tue, Jul 31, 2018 at 11:16:12PM +0530, Radhey Shyam Pandey wrote: > Add devicetree binding for Xilinx AXI Multichannel Direct Memory Access > (AXI MCDMA) IP. The AXI MCDMA provides high-bandwidth direct memory > access between memory and AXI4-Stream target peripherals. The AXI MCDMA > core

[PATCH RFC] Make call_srcu() available during very early boot

2018-08-14 Thread Paul E. McKenney
Event tracing is moving to SRCU in order to take advantage of the fact that SRCU may be safely used from idle and even offline CPUs. However, event tracing can invoke call_srcu() very early in the boot process, even before workqueue_init_early() is invoked (let alone rcu_init()). Therefore,

Re: Warning when using eMMC and partprobe: generic_make_request: Trying to write to read-only block-device

2018-08-14 Thread Jens Axboe
On 8/14/18 10:22 AM, Linus Torvalds wrote: > On Tue, Aug 14, 2018 at 8:24 AM Ilya Dryomov wrote: >> >> Looks like it's coming from that fsync(): >> >> sys_fsync >> do_fsync >> vfs_fsync_range >> blkdev_fsync >> blkdev_issue_flush >> >> I think we need to teach

[PATCH v4 4/6] dt-bindings: imx6q-pcie: Add turnoff reset for imx7d

2018-08-14 Thread Leonard Crestez
This is documented as "required" but won't be present in old dtbs. These resets are also present on other imx chips but right now only imx7d implements them through the reset controller subsystem. Signed-off-by: Leonard Crestez --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 1 +

[PATCH v4 5/6] ARM: dts: imx7d: Add turnoff reset

2018-08-14 Thread Leonard Crestez
This is required for the imx pci driver to send the PME_Turn_Off TLP. Signed-off-by: Leonard Crestez --- arch/arm/boot/dts/imx7d.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi index

[PATCH v4 2/6] PCI: imx: Initial imx7d pm support

2018-08-14 Thread Leonard Crestez
On imx7d the pcie-phy power domain is turned off in suspend and this can make the system hang after resume when attempting any read from PCI. Fix this by adding minimal suspend/resume code from the nxp internal tree. This will prepare for powering down on suspend and reset the block on resume.

Re: Warning when using eMMC and partprobe: generic_make_request: Trying to write to read-only block-device

2018-08-14 Thread Linus Torvalds
On Tue, Aug 14, 2018 at 9:26 AM Jens Axboe wrote: > > > > > We probably just want to special case a flush for this check. In other > > situations, like resource allocation and issue, we'd want to consider > > it a write. > > Ala: Ack, looks sane to me. Linus

Re: [PATCH RFC] Make call_srcu() available during very early boot

2018-08-14 Thread Paul E. McKenney
On Tue, Aug 14, 2018 at 12:49:45PM -0400, Steven Rostedt wrote: > On Tue, 14 Aug 2018 09:24:48 -0700 > "Paul E. McKenney" wrote: > > > Event tracing is moving to SRCU in order to take advantage of the fact > > that SRCU may be safely used from idle and even offline CPUs. However, > > event

[PATCH 4.18 55/79] x86/bugs, kvm: Introduce boot-time control of L1TF mitigations

2018-08-14 Thread Greg Kroah-Hartman
4.18-stable review patch. If anyone has any objections, please let me know. -- From: Jiri Kosina Introduce the 'l1tf=' kernel command line option to allow for boot-time switching of mitigation that is used on processors affected by L1TF. The possible values are: full

[PATCH 4.18 51/79] x86/kvm: Serialize L1D flush parameter setter

2018-08-14 Thread Greg Kroah-Hartman
4.18-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner Writes to the parameter files are not serialized at the sysfs core level, so local serialization is required. Signed-off-by: Thomas Gleixner Tested-by: Jiri Kosina

[PATCH 4.18 57/79] x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED architectures

2018-08-14 Thread Greg Kroah-Hartman
4.18-stable review patch. If anyone has any objections, please let me know. -- From: Jiri Kosina pfn_modify_allowed() and arch_has_pfn_modify_check() are outside of the !__ASSEMBLY__ section in include/asm-generic/pgtable.h, which confuses assembler on archs that don't have

[PATCH 4.18 56/79] Documentation: Add section about CPU vulnerabilities

2018-08-14 Thread Greg Kroah-Hartman
4.18-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner Add documentation for the L1TF vulnerability and the mitigation mechanisms: - Explain the problem and risks - Document the mitigation mechanisms - Document the command

[PATCH 4.18 33/79] Revert "x86/apic: Ignore secondary threads if nosmt=force"

2018-08-14 Thread Greg Kroah-Hartman
4.18-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner Dave Hansen reported, that it's outright dangerous to keep SMT siblings disabled completely so they are stuck in the BIOS and wait for SIPI. The reason is that Machine Check

[PATCH 4.18 52/79] x86/kvm: Allow runtime control of L1D flush

2018-08-14 Thread Greg Kroah-Hartman
4.18-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner All mitigation modes can be switched at run time with a static key now: - Use sysfs_streq() instead of strcmp() to handle the trailing new line from sysfs writes

[PATCH 4.18 59/79] Documentation/l1tf: Fix typos

2018-08-14 Thread Greg Kroah-Hartman
4.18-stable review patch. If anyone has any objections, please let me know. -- From: Tony Luck Fix spelling and other typos Signed-off-by: Tony Luck Signed-off-by: Thomas Gleixner Signed-off-by: Greg Kroah-Hartman --- Documentation/admin-guide/l1tf.rst | 14

[PATCH 4.18 60/79] cpu/hotplug: detect SMT disabled by BIOS

2018-08-14 Thread Greg Kroah-Hartman
4.18-stable review patch. If anyone has any objections, please let me know. -- From: Josh Poimboeuf If SMT is disabled in BIOS, the CPU code doesn't properly detect it. The /sys/devices/system/cpu/smt/control file shows 'on', and the 'l1tf' vulnerabilities file shows SMT as

[PATCH 4.18 58/79] x86/KVM/VMX: Initialize the vmx_l1d_flush_pages content

2018-08-14 Thread Greg Kroah-Hartman
4.18-stable review patch. If anyone has any objections, please let me know. -- From: Nicolai Stange The slow path in vmx_l1d_flush() reads from vmx_l1d_flush_pages in order to evict the L1d cache. However, these pages are never cleared and, in theory, their data could be

[PATCH 4.18 53/79] cpu/hotplug: Expose SMT control init function

2018-08-14 Thread Greg Kroah-Hartman
4.18-stable review patch. If anyone has any objections, please let me know. -- From: Jiri Kosina The L1TF mitigation will gain a commend line parameter which allows to set a combination of hypervisor mitigation and SMT control. Expose cpu_smt_disable() so the command line

[PATCH 4.18 54/79] cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early

2018-08-14 Thread Greg Kroah-Hartman
4.18-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner The CPU_SMT_NOT_SUPPORTED state is set (if the processor does not support SMT) when the sysfs SMT control file is initialized. That was fine so far as this was only required

[PATCH 4.18 34/79] cpu/hotplug: Boot HT siblings at least once

2018-08-14 Thread Greg Kroah-Hartman
4.18-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner Due to the way Machine Check Exceptions work on X86 hyperthreads it's required to boot up _all_ logical cores at least once in order to set the CR4.MCE bit. So instead of

Re: [PATCH v5] cpuidle: menu: Handle stopped tick more aggressively

2018-08-14 Thread Rafael J. Wysocki
On Tue, Aug 14, 2018 at 5:44 PM wrote: > > On Tue, Aug 14, 2018 at 12:34:40PM +0200, Rafael J . Wysocki wrote: > > From: Rafael J. Wysocki > > > > Commit 87c9fe6ee495 (cpuidle: menu: Avoid selecting shallow states > > with stopped tick) missed the case when the target residencies of > > deep

[PATCH 4.18 61/79] x86/KVM/VMX: Dont set l1tf_flush_l1d to true from vmx_l1d_flush()

2018-08-14 Thread Greg Kroah-Hartman
4.18-stable review patch. If anyone has any objections, please let me know. -- From: Nicolai Stange vmx_l1d_flush() gets invoked only if l1tf_flush_l1d is true. There's no point in setting l1tf_flush_l1d to true from there again. Signed-off-by: Nicolai Stange Signed-off-by:

[PATCH 4.17 57/97] x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest numbers

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Konrad Rzeszutek Wilk commit 33966dd6b2d2c352fae55412db2ea8cfff5df13a upstream There is no semantic change but this change allows an unbalanced amount of MSRs to be loaded on VMEXIT and

[PATCH 4.17 42/97] x86/CPU/AMD: Do not check CPUID max ext level before parsing SMP info

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Borislav Petkov commit 119bff8a9c9bb00116a844ec68be7bc4b1c768f5 upstream Old code used to check whether CPUID ext max level is >= 0x8008 because that last leaf contains the number of

[PATCH 4.17 59/97] x86/KVM/VMX: Separate the VMX AUTOLOAD guest/host number accounting

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Konrad Rzeszutek Wilk commit 3190709335dd31fe1aeeebfe4ffb6c7624ef971f upstream This allows to load a different number of MSRs depending on the context: VMEXIT or VMENTER. Signed-off-by:

[PATCH 4.17 09/97] bpf, sockmap: fix bpf_tcp_sendmsg sock error handling

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Daniel Borkmann commit 5121700b346b6160ccc9411194e3f1f417c340d1 upstream. While working on bpf_tcp_sendmsg() code, I noticed that when a sk->sk_err is set we error out with err = sk->sk_err.

[PATCH 4.17 08/97] bpf, sockmap: fix leak in bpf_tcp_sendmsg wait for mem path

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Daniel Borkmann commit 7c81c71730456845e6212dccbf00098faa66740f upstream. In bpf_tcp_sendmsg() the sk_alloc_sg() may fail. In the case of ENOMEM, it may also mean that we've partially filled

[PATCH 4.17 60/97] x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Konrad Rzeszutek Wilk commit 989e3992d2eca32c3f1404f2bc91acda3aa122d8 upstream The IA32_FLUSH_CMD MSR needs only to be written on VMENTER. Extend add_atomic_switch_msr() with an entry_only

[PATCH 4.17 07/97] xen/netfront: dont cache skb_shinfo()

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Juergen Gross commit d472b3a6cf63cd31cae1ed61930f07e6cd6671b5 upstream. skb_shinfo() can change when calling __pskb_pull_tail(): Don't cache its return value. Cc: sta...@vger.kernel.org

[PATCH 4.17 43/97] x86/cpu/AMD: Evaluate smp_num_siblings early

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 1e1d7e25fd759eddf96d8ab39d0a90a1979b2d8c upstream To support force disabling of SMT it's required to know the number of thread siblings early. amd_get_topology() cannot

[PATCH 4.17 46/97] x86/cpufeatures: Add detection of L1D cache flush support.

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Konrad Rzeszutek Wilk commit 11e34e64e4103955fc4568750914c75d65ea87ee upstream 336996-Speculative-Execution-Side-Channel-Mitigations.pdf defines a new MSR (IA32_FLUSH_CMD) which is detected

[PATCH 4.17 70/97] cpu/hotplug: Expose SMT control init function

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Jiri Kosina commit 8e1b706b6e819bed215c0db16345568864660393 upstream The L1TF mitigation will gain a commend line parameter which allows to set a combination of hypervisor mitigation and SMT

[PATCH 4.17 69/97] x86/kvm: Allow runtime control of L1D flush

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 895ae47f9918833c3a880fbccd41e0692b37e7d9 upstream All mitigation modes can be switched at run time with a static key now: - Use sysfs_streq() instead of strcmp() to

[PATCH 4.17 68/97] x86/kvm: Serialize L1D flush parameter setter

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit dd4bfa739a72508b75760b393d129ed7b431daab upstream Writes to the parameter files are not serialized at the sysfs core level, so local serialization is required.

[PATCH 4.17 55/97] x86/KVM/VMX: Add L1D MSR based flush

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Paolo Bonzini commit 3fa045be4c720146b18a19cea7a767dc6ad5df94 upstream 336996-Speculative-Execution-Side-Channel-Mitigations.pdf defines a new MSR (IA32_FLUSH_CMD aka 0x10B) which has similar

[PATCH 4.17 56/97] x86/KVM/VMX: Add L1D flush logic

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Paolo Bonzini commit c595ceee45707f00f64f61c54fb64ef0cc0b4e85 upstream Add the logic for flushing L1D on VMENTER. The flush depends on the static key being enabled and the new l1tf_flush_l1d

[PATCH 4.17 58/97] x86/KVM/VMX: Add find_msr() helper function

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Konrad Rzeszutek Wilk commit ca83b4a7f2d068da79a029d323024aa45decb250 upstream .. to help find the MSR on either the guest or host MSR list. Signed-off-by: Konrad Rzeszutek Wilk

[PATCH 4.17 03/97] Mark HI and TASKLET softirq synchronous

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Linus Torvalds commit 3c53776e29f81719efcf8f7a6e30cdf753bee94d upstream. Way back in 4.9, we committed 4cd13c21b207 ("softirq: Let ksoftirqd do its job"), and ever since we've had small

[PATCH 4.17 64/97] x86/kvm: Drop L1TF MSR list approach

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 2f055947ae5e2741fb2dc5bba1033c417ccf4faa upstream The VMX module parameter to control the L1D flush should become writeable. The MSR list is set up at VM init per

[PATCH 4.17 63/97] x86/litf: Introduce vmx status variable

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 72c6d2db64fa18c996ece8f06e499509e6c9a37e upstream Store the effective mitigation of VMX in a status variable and use it to report the VMX state in the l1tf sysfs file.

[PATCH 4.17 62/97] cpu/hotplug: Online siblings when SMT control is turned on

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 215af5499d9e2b55f111d2431ea20218115f29b3 upstream Writing 'off' to /sys/devices/system/cpu/smt/control offlines all SMT siblings. Writing 'on' merily enables the

[PATCH 4.17 61/97] x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Konrad Rzeszutek Wilk commit 390d975e0c4e60ce70d4157e0dd91ede37824603 upstream If the L1D flush module parameter is set to 'always' and the IA32_FLUSH_CMD MSR is available, optimize the

[PATCH] arm64: dts: msm: add PDC device bindings for sdm845

2018-08-14 Thread Lina Iyer
Add PDC interrupt controller device bindings for SDM845. Signed-off-by: Lina Iyer --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 24e254efb9d1..399bfbd52c5b

[PATCH 4.17 65/97] x86/l1tf: Handle EPT disabled state proper

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit a7b9020b06ec6d7c3f3b0d4ef1a9eba12654f4f7 upstream If Extended Page Tables (EPT) are disabled or not supported, no L1D flushing is required. The setup function can just

[PATCH 4.17 47/97] x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Borislav Petkov commit 7ce2f0393ea2396142b7faf6ee9b1f3676d08a5f upstream The TOPOEXT reenablement is a workaround for broken BIOSen which didn't enable the CPUID bit.

[PATCH 4.17 66/97] x86/kvm: Move l1tf setup function

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 7db92e165ac814487264632ab2624e832f20ae38 upstream In preparation of allowing run time control for L1D flushing, move the setup code to the module parameter handler. In

[PATCH 4.17 67/97] x86/kvm: Add static key for flush always

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 4c6523ec59fe895ea352a650218a6be0653910b1 upstream Avoid the conditional in the L1D flush control path. Signed-off-by: Thomas Gleixner Tested-by: Jiri Kosina

[PATCH 4.9 037/107] x86/smp: Provide topology_is_primary_thread()

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 6a4d2657e048f096c7ffcad254010bd94891c8c0 upstream If the CPU is supporting SMT then the primary thread can be found by checking the lower APIC ID bits for zero.

[PATCH 4.9 036/107] x86/bugs: Move the l1tf function and define pr_fmt properly

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Konrad Rzeszutek Wilk commit 56563f53d3066afa9e63d6c997bf67e76a8b05c0 upstream The pr_warn in l1tf_select_mitigation would have used the prior pr_fmt which was defined as "Spectre V2 : ".

[PATCH 4.9 031/107] x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Andi Kleen commit 6b28baca9b1f0d4a42b865da7a05b1c81424bd5c upstream When PTEs are set to PROT_NONE the kernel just clears the Present bit and preserves the PFN, which creates attack surface

[PATCH 4.9 035/107] x86/speculation/l1tf: Limit swap file size to MAX_PA/2

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Andi Kleen commit 377eeaa8e11fe815b1d07c81c4a0e2843a8c15eb upstream For the L1TF workaround its necessary to limit the swap file size to below MAX_PA/2, so that the higher bits of the swap

[PATCH 4.9 061/107] x86/KVM/VMX: Add L1D flush logic

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Paolo Bonzini commit c595ceee45707f00f64f61c54fb64ef0cc0b4e85 upstream Add the logic for flushing L1D on VMENTER. The flush depends on the static key being enabled and the new l1tf_flush_l1d

[PATCH 4.9 010/107] init: rename and re-order boot_cpu_state_init()

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Linus Torvalds commit b5b1404d0815894de0690de8a1ab58269e56eae6 upstream. This is purely a preparatory patch for upcoming changes during the 4.19 merge window. We have a function called

[PATCH 4.9 016/107] proc/sysctl: Dont grab i_lock under sysctl_lock.

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Eric W. Biederman commit ace0c791e6c3cf5ef37cad2df69f0d90ccc40ffb upstream. Konstantin Khlebnikov writes: > This patch has locking problem. I've got lockdep splat under LTP. > > [

[PATCH 4.17 91/97] x86/speculation/l1tf: Invert all not present mappings

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Andi Kleen commit f22cc87f6c1f771b57c407555cfefd811cdd9507 upstream For kernel mappings PAGE_PROTNONE is not necessarily set for a non present mapping, but the inversion logic explicitely

[PATCH 4.17 95/97] tools headers: Synchronize prctl.h ABI header

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Arnaldo Carvalho de Melo commit 63b89a19cc9ef911dcc64d41b60930c346eee0c0 upstream To pick up changes from: $ git log --oneline -2 -i include/uapi/linux/prctl.h 356e4bfff2c5 prctl: Add

[PATCH 4.17 93/97] x86/mm/pat: Make set_memory_np() L1TF safe

2018-08-14 Thread Greg Kroah-Hartman
4.17-stable review patch. If anyone has any objections, please let me know. -- From: Andi Kleen commit 958f79b9ee55dfaf00c8106ed1c22a2919e0028b upstream set_memory_np() is used to mark kernel mappings not present, but it has it's own open coded mechanism which does not have

[PATCH 4.9 014/107] fix __legitimize_mnt()/mntput() race

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Al Viro commit 119e1ef80ecfe0d1deb6378d4ab41f5b71519de1 upstream. __legitimize_mnt() has two problems - one is that in case of success the check of mount_lock is not ordered wrt preceding

[PATCH 4.9 047/107] x86/CPU/AMD: Do not check CPUID max ext level before parsing SMP info

2018-08-14 Thread Greg Kroah-Hartman
4.9-stable review patch. If anyone has any objections, please let me know. -- From: Borislav Petkov commit 119bff8a9c9bb00116a844ec68be7bc4b1c768f5 upstream Old code used to check whether CPUID ext max level is >= 0x8008 because that last leaf contains the number of cores

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