On Sat, 25 Aug 2018 00:04:43 +0900
Masahiro Yamada wrote:
> Hi Boris,
>
> 2018-08-24 21:55 GMT+09:00 Boris Brezillon :
> > Hi Masahiro,
> >
> > On Tue, 21 Aug 2018 17:23:19 +0900
> > Masahiro Yamada wrote:
> >
> >> Commit 49aa76b16676 ("mtd: rawnand: do not execute nand_scan_ident()
> >> if m
On Tue, Aug 14, 2018 at 05:42:33PM +0530, Sricharan R wrote:
> In Certain QCOM SoCs like ipq8064, apq8064, msm8960, msm8974
> that has KRAIT processors the voltage/current value of each OPP
> varies based on the silicon variant in use.
>
> The required OPP related data is determined based on
> the
On Fri, Aug 24, 2018 at 03:12:20PM +0200, Vincent Whitchurch wrote:
> If kmemleak built in to the kernel, but is disabled by default, the
> debugfs file is never registered. Because of this, it is not possible
> to find out if the kernel is built with kmemleak support by checking for
> the presenc
Use platform_get_drvdata() in remove() function of
the platform driver rather than dev_get_drvdata()
to match the platform_set_drvdata in the probe().
Signed-off-by: Moritz Fischer
---
drivers/fpga/dfl-fme-region.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/fpga/
Use platform_set_drvdata rather than dev_set_drvdata
to match the platform_get_drvdata in the _remove()
function of the platform driver.
Signed-off-by: Moritz Fischer
---
drivers/fpga/of-fpga-region.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/fpga/of-fpga-region
On Fri, Aug 24, 2018 at 7:45 AM, Sai Prakash Ranjan
wrote:
> read/write{b,w,l,q} are typically used for reading from memory
> mapped registers, which can cause hangs if accessed
> unclocked. Tracing these events can help in debugging
> various issues faced during initial development.
>
> We log th
On Thu, Aug 23 2018 at 19:57 -0600, David Dai wrote:
Introduce Qualcomm SDM845 specific provider driver using the
interconnect framework.
SDM845 specific, can't be reused?
Please describe why we need this driver and how this driver solves the
problem.
Change-Id: I716b39068b4a211b8203b2a52d30
On Fri, Aug 24, 2018 at 9:51 AM Georgi Djakov wrote:
>
> Hi Maxime,
>
> On 08/20/2018 06:32 PM, Maxime Ripard wrote:
> > Hi Georgi,
> >
> > On Tue, Aug 07, 2018 at 05:54:38PM +0300, Georgi Djakov wrote:
> >>> There is also a patch series from Maxime Ripard that's addressing the
> >>> same general
Linus,
as promised, here is my 2nd pull request for I2C, containing:
* removal of the attach_adapter callback, converting its last user
* removal of any __deprecated usage within I2C
* one email address update
* some SPDX conversion
CCing Jean on this one, he will probably be happy to finally se
On Thu, Aug 23, 2018 at 1:02 PM, Amit Kucheria wrote:
> (Adding arm-soc folks)
>
> On Thu, Aug 23, 2018 at 9:01 PM, Sudeep Holla wrote:
>> Hi Amit,
>>
>> Thanks for fixing this.
>>
>> On Thu, Aug 23, 2018 at 02:23:29PM +0530, Amit Kucheria wrote:
>>> The idle-states binding documentation[1] menti
On 08/23/2018 11:16 AM, Paolo Bonzini wrote:
On 23/08/2018 17:29, Sean Christopherson wrote:
On Thu, Aug 23, 2018 at 01:26:55PM +0200, Paolo Bonzini wrote:
On 22/08/2018 22:11, Brijesh Singh wrote:
Yes, this is one of approach I have in mind. It will avoid splitting
the larger pages; I am
On Fri, Aug 24, 2018 at 08:50:52AM -0400, Johannes Weiner wrote:
> On Thu, Aug 23, 2018 at 09:23:50AM -0700, Roman Gushchin wrote:
> > On Wed, Aug 22, 2018 at 04:12:13PM +0200, Michal Hocko wrote:
> > > On Tue 21-08-18 14:35:57, Roman Gushchin wrote:
> > > > @@ -248,9 +253,20 @@ static unsigned lon
Hi Benjamin, Jiri,
On Tue, Apr 24, 2018 at 1:04 AM Benjamin Tissoires
wrote:
>
> It is not a good idea to try to fit all types of applications in the
> same input report. There are a lot of devices that are needing
> the quirk HID_MULTI_INPUT but this quirk doesn't match the actual HID
> descript
On 24/08/2018 17:41, Brijesh Singh wrote:
>>>
>>> Wouldn't that result in exposing/leaking whatever code/data happened
>>> to reside on the same 2M page (or corrupting it if the entire page
>>> isn't decrypted)? Or are you suggesting that we'd also leave the
>>> encrypted mapping intact?
>>
>> Yes
Hi Peter,
On Fri, Aug 24, 2018 at 03:13:32PM +0200, Peter Zijlstra wrote:
> On Fri, Aug 24, 2018 at 10:35:56AM +0200, Peter Zijlstra wrote:
>
> > Anyway, its sorted now; although I'd like to write me a fairly big
> > comment in asm-generic/tlb.h about things, before I forget again.
>
> How's som
By selecting HAVE_RCU_TABLE_INVALIDATE, we can rely on tlb_flush() being
called if we fail to batch table pages for freeing. This in turn allows
us to postpone walk-cache invalidation until tlb_finish_mmu(), which
avoids lots of unnecessary DSBs and means we can shoot down the ASID if
the range is
When we are unmapping intermediate page-table entries or huge pages, we
don't need to issue a TLBI instruction for every PAGE_SIZE chunk in the
VA range being unmapped.
Allow the invalidation stride to be passed to __flush_tlb_range(), and
adjust our "just nuke the ASID" heuristic to take this int
On 2018.08.24 02:44 Rafael J. Wysocki wrote:
> On Tuesday, August 21, 2018 10:44:10 AM CEST Rafael J. Wysocki wrote:
>> From: Rafael J. Wysocki
>>
>> The case addressed by commit 5ef499cd571c (cpuidle: menu: Handle
>> stopped tick more aggressively) in the stopped tick case is present
>> when the
Now that the core mmu_gather code keeps track of both the levels of page
table cleared and also whether or not these entries correspond to
intermediate entries, we can use this in our tlb_flush() callback to
reduce the number of invalidations we issue as well as their scope.
Signed-off-by: Will De
From: Peter Zijlstra
Some architectures require different TLB invalidation instructions
depending on whether it is only the last-level of page table being
changed, or whether there are also changes to the intermediate
(directory) entries higher up the tree.
Add a new bit to the flags bitfield in
Now that our walk-cache invalidation routines imply a DSB before the
invalidation, we no longer need one when we are clearing an entry during
unmap.
Signed-off-by: Will Deacon
---
arch/arm64/include/asm/pgtable.h | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch
It is common for architectures with hugepage support to require only a
single TLB invalidation operation per hugepage during unmap(), rather than
iterating through the mapping at a PAGE_SIZE increment. Currently,
however, the level in the page table where the unmap() operation occurs
is not stored
__flush_tlb_[kernel_]pgtable() rely on set_pXd() having a DSB after
writing the new table entry and therefore avoid the barrier prior to the
TLBI instruction.
In preparation for delaying our walk-cache invalidation on the unmap()
path, move the DSB into the TLB invalidation routines.
Signed-off-b
The inner workings of the mmu_gather-based TLB invalidation mechanism
are not relevant to nommu configurations, so guard them with an ifdef.
This allows us to implement future functions using static inlines
without breaking the build.
Signed-off-by: Will Deacon
---
include/asm-generic/tlb.h | 3
If there's one thing the RCU-based table freeing doesn't need, it's more
ifdeffery.
Remove the redundant !CONFIG_HAVE_RCU_TABLE_FREE code, since this option
is unconditionally selected in our Kconfig.
Signed-off-by: Will Deacon
---
arch/arm64/include/asm/tlb.h | 12 +++-
1 file changed,
Hi all,
I hacked up this RFC on the back of the recent changes to the mmu_gather
stuff in mainline. It's had a bit of testing and it looks pretty good so
far.
The main changes in the series are:
- Avoid emitting a DSB barrier after clearing each page-table entry.
Instead, we can have a sin
flush_tlb_kernel_range() is only ever used to invalidate last-level
entries, so we can restrict the scope of the TLB invalidation
instruction.
Signed-off-by: Will Deacon
---
arch/arm64/include/asm/tlbflush.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/include/a
Add a comment to explain why we can't get away with last-level
invalidation in flush_tlb_range()
Signed-off-by: Will Deacon
---
arch/arm64/include/asm/tlbflush.h | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/include/asm/tlbflush.h
b/arch/arm64/include/asm/tlbflush.h
index e
On Fri, Aug 24, 2018 at 04:33:38PM +0200, Matthias B. wrote:
> On Fri, 24 Aug 2018 16:12:54 +0200
> Greg KH wrote:
>
> >
> > All of the stable trees are here:
> > https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/
> > you want the linux-4.4.y branch to work off of.
> >
> > Al
The is25lp256 supports 4-byte opcodes and quad output.
In is25lp256, the DWORD1 of JEDEC Basic Flash Parameter Header
is 0xfff920e5. So the DWORD1[18:17] Address Bytes bits are 0b00,
means that 3-Byte only addressing. Now this limits nor->addr_width
to 3 and makes it inpossible to access the addres
The default value of the PERIOD_LEN register is 0 and results in
axi-i2s keeping TLAST always asserted in its AXI Stream output.
When the AXI Stream is sent to a Xilinx AXI-DMA, this results in the
DMA generating an interrupt flood and ALSA produce a corrupted
recording. This is because AXI-DMA ra
Hi,
here is a fix for a nasty audio capture problem when the axi-i2s
output stream is fed to a Xilinx AXI-DMA.
The commit is simple and hopefully well described, but I am not 100%
sure the solution is the correct one. If it is not, I'll be glad to
know which one is the best. It solved my problem
On 08/24/2018 02:01 AM, Thomas Gleixner wrote:
> On Fri, 24 Aug 2018, Greg KH wrote:
>> On Thu, Aug 23, 2018 at 05:57:06PM -0500, Grygorii Strashko wrote:
>>> This patch was back ported to the Stable linux-4.14.y and It causes
>>> regression -
>>> flood of "NOHZ: local_softirq_pending" messag
Quoting Venkata Narendra Kumar Gutta (2018-08-17 17:08:34)
> diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
> index 57304b2..da8f150 100644
> --- a/drivers/edac/Kconfig
> +++ b/drivers/edac/Kconfig
> @@ -460,4 +460,32 @@ config EDAC_TI
> Support for error detection and correctio
On Fri, Aug 24, 2018 at 12:16:20PM +, Bharat Kumar Gogada wrote:
> > Subject: [PATCH 0/4] Add support to register platform service IRQ
> >
> > Some platforms have dedicated IRQ lines for PCIe services like AER/PME etc.
> > The root complex on these platform will use these seperate IRQ lines to
Quoting Douglas Anderson (2018-08-22 10:36:27)
> From: Manu Gautam
>
> This adds nodes for USB and related PHYs.
>
> Signed-off-by: Manu Gautam
> [dianders: reworked quite a bit]
> Signed-off-by: Douglas Anderson
> ---
Reviewed-by: Stephen Boyd
Quoting Douglas Anderson (2018-08-22 10:36:28)
> Add regulator devices for PMIC regulators managed via VRM and XOB
> RPMh accelerators.
>
> A few notes here:
> - Regulators are added directly to the board file. While it's true
> that this will mean a bunch of copy/pasting for other boards that
Quoting Douglas Anderson (2018-08-22 10:36:29)
> Set the various nodes to "okay" and hook up the regulators.
>
> NOTE: For now the main USB port (the one that goes out the Type C
> connector) is forced to host. Eventually someone will need to get the
> Type C detection hooked up and get this all
On 08/24/2018 01:17 AM, Greg KH wrote:
> On Thu, Aug 23, 2018 at 05:57:06PM -0500, Grygorii Strashko wrote:
>> Hi
>>
>> On 07/31/2018 05:52 PM, Frederic Weisbecker wrote:
>>> Before updating the full nohz tick or the idle time on IRQ exit, we
>>> check first if we are not in a nesting interrupt,
On Fri, Aug 24, 2018 at 8:52 AM Will Deacon wrote:
>
> Now that our walk-cache invalidation routines imply a DSB before the
> invalidation, we no longer need one when we are clearing an entry during
> unmap.
Do you really still need it when *setting* it?
I'm wondering if you could just remove th
On Fri, 24 Aug 2018 18:14:43 +0200
Bernhard Landauer wrote:
> Hello everyone,
>
> for some reason I am not able to build 4.14.63-rt40 for Manjarolinux.
> Even after removing all our custom patches build fails at
>
> LD [M] drivers/gpu/drm/drm.o
> AR drivers/gpu/built-in.o
> make: ***
Bisect identified the problem. It's the attached patch. I applied it to
4.4.152 with patch -Rp1 and I'm running the resulting kernel now.
MSB
--
For every idiot-proof system there exists at least one system-proof
idiot.
>From 02ff2769edbce2261e981effbc3c4b98fae4faf0 Mon Sep 17 00:00:00 2001
Fro
On Fri, Aug 24, 2018 at 8:52 AM Will Deacon wrote:
>
> I hacked up this RFC on the back of the recent changes to the mmu_gather
> stuff in mainline. It's had a bit of testing and it looks pretty good so
> far.
Looks good to me.
Apart from the arm64-specific question I had, I wonder whether we ne
On Fri, Aug 24, 2018 at 10:41:27AM -0500, Brijesh Singh wrote:
>
>
> On 08/23/2018 11:16 AM, Paolo Bonzini wrote:
> >On 23/08/2018 17:29, Sean Christopherson wrote:
> >>On Thu, Aug 23, 2018 at 01:26:55PM +0200, Paolo Bonzini wrote:
> >>>On 22/08/2018 22:11, Brijesh Singh wrote:
>
> Yes,
Ping, any comments to the driver?
On Thu, Aug 16, 2018 at 3:17 AM Wendy Liang wrote:
>
> There are cortex-r5 processors in Xilinx Zynq UltraScale+
> MPSoC platforms. This remoteproc driver is to manage the
> R5 processors.
>
> Signed-off-by: Wendy Liang
> ---
> drivers/remoteproc/Kconfig
Hello everyone,
for some reason I am not able to build 4.14.63-rt40 for Manjarolinux.
Even after removing all our custom patches build fails at
LD [M] drivers/gpu/drm/drm.o
AR drivers/gpu/built-in.o
make: *** [Makefile:1035: drivers] Error 2
My config can be found here for information:
Dear Sir/Madam.
Assalamu`Alaikum.
I am Dr mohammad ouattara, I have ($14.6 Million us dollars) to
transfer into your account,
I will send you more details about this deal and the procedures to
follow when I receive a positive response from you,
Have a great day,
Dr mohammad ouattara.
From: Andi Kleen
The check for Spectre microcodes did not check for family 6,
only the model numbers. Add a family 6 check too just to
avoid ambiguity with other families.
Signed-off-by: Andi Kleen
---
arch/x86/kernel/cpu/intel.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/
From: Andi Kleen
On Nehalem and newer core CPUs the CPU cache internally uses 44 bits physical
address space. The L1TF workaround is limited by this internal cache
address width, and needs to have one bit free there for the mitigation
to work.
Older client systems report only 36bit physical addr
On 24.08.2018 16:30, Frederic Weisbecker wrote:
> On Fri, Aug 24, 2018 at 10:01:35AM +0200, Thomas Gleixner wrote:
>> On Fri, 24 Aug 2018, Heiner Kallweit wrote:
>>> On 24.08.2018 06:12, Frederic Weisbecker wrote:
On Thu, Aug 16, 2018 at 08:13:03AM +0200, Heiner Kallweit wrote:
> Recently
On Fri, Aug 24 2018 at 02:22 -0600, Stephen Boyd wrote:
Quoting Lina Iyer (2018-08-17 12:10:23)
During suspend the system may power down some of the system rails. As a
result, the TLMM hw block may not be operational anymore and wakeup
capable GPIOs will not be detected. The PDC however will be
From: Colin Ian King
It is preferable to use dma_zalloc_coherent rather than dam_alloc_coherent
and memset, so use it.
Signed-off-by: Colin Ian King
---
drivers/net/wireless/ath/wcn36xx/dxe.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/net/wireless/ath/wcn
at 1:47 AM, Peter Zijlstra wrote:
> On Thu, Aug 23, 2018 at 02:39:59PM +0100, Will Deacon wrote:
>> The only problem with this approach is that we've lost track of the granule
>> size by the point we get to the tlb_flush(), so we can't adjust the stride of
>> the TLB invalidations for huge mappin
On Thu, Aug 23, 2018 at 6:03 PM, Steven Rostedt wrote:
> On Thu, 23 Aug 2018 07:13:13 -0700
> Dmitry Vyukov wrote:
>
>> On Thu, May 10, 2018 at 7:23 AM, Steven Rostedt wrote:
>> > On Thu, 10 May 2018 07:14:26 +0200
>> > Dmitry Vyukov wrote:
>> >
>> >> > IMPORTANT: if you fix the bug, please add
Minor nit: if it's not literally a resend, don't call it "RESEND" in
$SUBJECT. Call it v2, please.
Also, I added LKML and relevant maintainers to cc. John and Stephen:
this is a purely x86 patch, but it digs into the core timekeeping
structures a bit.
On Fri, Aug 17, 2018 at 5:12 AM, Matt Ricka
On Fri, Aug 24, 2018 at 04:52:37PM +0100, Will Deacon wrote:
> __flush_tlb_[kernel_]pgtable() rely on set_pXd() having a DSB after
> writing the new table entry and therefore avoid the barrier prior to the
> TLBI instruction.
>
> In preparation for delaying our walk-cache invalidation on the unmap
On 2018-08-23 16:01, Evan Green wrote:
On Fri, Aug 17, 2018 at 5:08 PM Venkata Narendra Kumar Gutta
wrote:
Cache error reporting controller is to detect and report single
Should be "Cache error reporting controller detects and reports
single"...
Ok. I'll update this in next patchset.
O
On 2018-08-23 16:01, Evan Green wrote:
On Fri, Aug 17, 2018 at 5:08 PM Venkata Narendra Kumar Gutta
wrote:
Currently, boradcast base is set to end of the LLCC banks, which may
s/boradcast/broadcast/
I'll correct this typo in the next version.
not be correct always. As the number of bank
On Fri, Aug 24, 2018 at 10:26:50AM -0700, Nadav Amit wrote:
> at 1:47 AM, Peter Zijlstra wrote:
>
> > On Thu, Aug 23, 2018 at 02:39:59PM +0100, Will Deacon wrote:
> >> The only problem with this approach is that we've lost track of the granule
> >> size by the point we get to the tlb_flush(), so
On 08/24/2018 01:41 AM, Michal Hocko wrote:
> On Thu 23-08-18 13:59:16, Mike Kravetz wrote:
>
> Acked-by: Michal Hocko
>
> One nit below.
>
> [...]
>> diff --git a/mm/hugetlb.c b/mm/hugetlb.c
>> index 3103099f64fd..a73c5728e961 100644
>> --- a/mm/hugetlb.c
>> +++ b/mm/hugetlb.c
>> @@ -4548,6 +4
My Dear
Please I write you in trust and confidence of my interest to invest in
Real Estates/Oil and Gas.
I am Ex-wife of Ousted Zimbabwe finance minister Ignatius Chombo
Seeking your Partnership to transfer the Sum of $120m in your country for
investment plan. Ignatus Chombo is presently
From: Will Deacon
As of commit fd1102f0aade ("mm: mmu_notifier fix for tlb_end_vma"),
asm-generic/tlb.h now calls tlb_flush() from a static inline function,
so we need to make sure that it's declared before #including the
asm-generic header in the arch header.
Reported-by: Guenter Roeck
Fixes:
On Fri, Aug 24, 2018 at 03:25:33PM +0100, Will Deacon wrote:
> On Fri, Aug 24, 2018 at 07:06:51AM -0700, Guenter Roeck wrote:
> > On 08/24/2018 06:50 AM, Will Deacon wrote:
> >
> > >>-#include
> > >>+struct mmu_gather;
> > >> static inline void tlb_flush(struct mmu_gather *tlb)
> > >> {
> > >>
On Sat, Aug 18, 2018 at 07:52:58PM +0100, Ben Hutchings wrote:
> On Fri, 2018-08-17 at 23:48 +0100, Greg KH wrote:
> > On Fri, Aug 17, 2018 at 08:40:06AM -0700, Rodrigo Vivi wrote:
> > > Hi Greg, Ben, and all
> > >
> > > Is https://www.kernel.org/category/releases.html updated in terms of EOL?
> >
On Fri, Aug 24, 2018 at 10:47 AM, Andy Lutomirski wrote:
> Minor nit: if it's not literally a resend, don't call it "RESEND" in
> $SUBJECT. Call it v2, please.
>
> Also, I added LKML and relevant maintainers to cc. John and Stephen:
> this is a purely x86 patch, but it digs into the core timekee
On Fri, Aug 24, 2018 at 08:25:13AM -0700, Moritz Fischer wrote:
> Use platform_get_drvdata() in remove() function of
> the platform driver rather than dev_get_drvdata()
> to match the platform_set_drvdata in the probe().
Hi Moritz,
Thanks for this patch, it looks good to me. : )
Hao
>
> Signed
On 2018-08-23 16:04, Evan Green wrote:
On Fri, Aug 17, 2018 at 5:08 PM Venkata Narendra Kumar Gutta
wrote:
From: Channagoud Kadabi
Add error reporting driver for Single Bit Errors (SBEs) and Double Bit
Errors (DBEs). As of now, this driver supports erp for Last Level
Cache
Controller (LLCC)
Hi Balakrishna,
> When we set an KASAN flags, we are seeing an crash while removing module
> hci_uart.
> This is due to dereference of hdev. As in module deinit we are calling
> function
> hci_free_dev() to free hdev.
>
> Changes in v1:
>
> * removed dereference of hdev in qca_power_shutdown
Hi Balakrishna,
> In recent testing we found that while removing hci_uart, we have seen
> execution of hci_uart_write_work() after calling vendor specific
> proto close. As we are freeing the vendor specific Tx and Rx buffers
> in vendor close, execution of functions i.e. Rx or Tx functions may ca
at 11:04 AM, Peter Zijlstra wrote:
> On Fri, Aug 24, 2018 at 10:26:50AM -0700, Nadav Amit wrote:
>> at 1:47 AM, Peter Zijlstra wrote:
>>
>>> On Thu, Aug 23, 2018 at 02:39:59PM +0100, Will Deacon wrote:
The only problem with this approach is that we've lost track of the granule
size by
On 2018-08-23 16:07, Evan Green wrote:
On Thu, Aug 23, 2018 at 4:04 PM Evan Green
wrote:
On Fri, Aug 17, 2018 at 5:08 PM Venkata Narendra Kumar Gutta
wrote:
>
> From: Channagoud Kadabi
Also checkpatch.pl complains a bit about this patch:
WARNING: Non-standard signature: Co-dev
On Fri, Aug 24, 2018 at 11:10:44AM -0500, Grygorii Strashko wrote:
> Yes. i do not see local_softirq_pending messages any more
>
> But one question, just to clarify, after patch "nohz: Fix missing tick reprog
> while interrupting inline timer softirq"
> the tick_nohz_irq_exit() will be called few
Hello,
Workqueue changes for v4.19-rc1. Over the lockdep cross-release
churn, workqueue lost some of the existing annotations. Johannes Berg
restored it and also improved them.
Thanks.
The following changes since commit 66448bc274cadedb71fda7d914e7c29d8dead217:
workqueue: move function defi
Hello,
Just one commit from Steven to take out spin lock from trace event
handlers.
Thanks.
The following changes since commit 1e09177acae32a61586af26d83ca5ef591cdcaf5:
Merge tag 'mips_fixes_4.18_3' of
git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux (2018-07-10 16:18:09
-0700)
are
On 08/24/2018 10:50 AM, Paolo Bonzini wrote:
On 24/08/2018 17:41, Brijesh Singh wrote:
Wouldn't that result in exposing/leaking whatever code/data happened
to reside on the same 2M page (or corrupting it if the entire page
isn't decrypted)? Or are you suggesting that we'd also leave the
enc
On 08/24/2018 11:24 AM, Sean Christopherson wrote:
On Fri, Aug 24, 2018 at 10:41:27AM -0500, Brijesh Singh wrote:
On 08/23/2018 11:16 AM, Paolo Bonzini wrote:
On 23/08/2018 17:29, Sean Christopherson wrote:
On Thu, Aug 23, 2018 at 01:26:55PM +0200, Paolo Bonzini wrote:
On 22/08/2018 22:1
Hi Balakrishna,
> This patch enables power off support for hci down and power on support
> for hci up. As wcn3990 power sources are ignited by regulators, we will
> turn off them during hci down, i.e. an complete power off of wcn3990.
> So while hci up, we will call vendor specific open/close and
Hello, again.
Nothing too interesting. Mostly ahci and ahci_platform changes, many
around power management.
Thanks.
The following changes since commit 9ffc59d57228d74809700be6f7ecb1db10292f05:
Merge tag '4.18-rc1-more-smb3-fixes' of git://git.samba.org/sfrench/cifs-2.6
(2018-06-18 14:28:19
On Fri, Aug 24, 2018 at 08:24:45PM +0200, Greg KH wrote:
> On Sat, Aug 18, 2018 at 07:52:58PM +0100, Ben Hutchings wrote:
> > In the latest release we used Linux 4.9 which currently has a stated
> > EOL of 2019. But I'm prepared to take on maintenance from that point
> > until June 2022. Greg, is
The PDC map should use the GIC SPI port and not the vector. GIC
internally adds 32 to SPI hwirq numbers.
Fixes: 1ae8862e27e ("dt-bindings/interrupt-controller: pdc: Describe PDC device
binding")
Signed-off-by: Lina Iyer
---
.../devicetree/bindings/interrupt-controller/qcom,pdc.txt | 4 ++--
Add PDC interrupt controller device bindings for SDM845.
Signed-off-by: Lina Iyer
---
Changes in v3:
- Fix PDC map, use GIC SPI port number for hwirq
Changes in v2:
- Order by address
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --
On Tue, Aug 14, 2018 at 05:42:33PM +0530, Sricharan R wrote:
> In Certain QCOM SoCs like ipq8064, apq8064, msm8960, msm8974
> that has KRAIT processors the voltage/current value of each OPP
> varies based on the silicon variant in use.
>
> The required OPP related data is determined based on
> the
On Fri, Aug 24, 2018 at 06:19:19PM +0200, Matthias B. wrote:
> Bisect identified the problem. It's the attached patch. I applied it to
> 4.4.152 with patch -Rp1 and I'm running the resulting kernel now.
>
> MSB
>
> --
> For every idiot-proof system there exists at least one system-proof
> idiot.
From: Ralph Campbell
Private ZONE_DEVICE pages use a special pte entry and thus are not
present. Properly handle this case in map_pte(), it is already handled
in check_pte(), the map_pte() part was lost in some rebase most probably.
Without this patch the slow migration path can not migrate back
From: Jérôme Glisse
When mmu_notifier calls invalidate_range_start callback with blockable
set to false we should not sleep. Properly propagate this to HMM users.
Signed-off-by: Jérôme Glisse
Cc: Michal Hocko
Cc: Ralph Campbell
Cc: John Hubbard
Cc: Andrew Morton
---
include/linux/hmm.h | 1
From: Jérôme Glisse
Somehow utf=8 must have been broken.
Signed-off-by: Jérôme Glisse
Cc: Andrew Morton
---
include/linux/hmm.h | 2 +-
mm/hmm.c| 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/linux/hmm.h b/include/linux/hmm.h
index 4c92e3ba3e16..1ff4
From: Jérôme Glisse
Invalidate device page table at start of invalidation and invalidate
in progress CPU page table snapshooting at both start and end of any
invalidation.
This is helpful when device need to dirty page because the device page
table report the page as dirty. Dirtying page must ha
From: Ralph Campbell
In hmm_mirror_unregister(), mm->hmm is set to NULL and then
mmu_notifier_unregister_no_release() is called. That creates a small
window where mmu_notifier can call mmu_notifier_ops with mm->hmm equal
to NULL. Fix this by first unregistering mmu notifier callbacks and
then set
From: Jérôme Glisse
Before this patch migration pmd entry (!pmd_present()) would have
been treated as a bad entry (pmd_bad() returns true on migration
pmd entry). The outcome was that device driver would believe that
the range covered by the pmd was bad and would either SIGBUS or
simply kill all
From: Jérôme Glisse
Use a structure to gather all the parameters for the update callback.
This make it easier when adding new parameters by avoiding having to
update all callback function signature.
Signed-off-by: Jérôme Glisse
Cc: Ralph Campbell
Cc: John Hubbard
Cc: Andrew Morton
---
inclu
From: Jérôme Glisse
Few fixes that only affect HMM users. Improve the synchronization call
back so that we match was other mmu_notifier listener do and add proper
support to the new blockable flags in the process.
For curious folks here are branches to leverage HMM in various existing
device dri
On Fri, Aug 24, 2018 at 11:36 AM Nadav Amit wrote:
>
> >
> > Urgh.. weren't the fixmaps per cpu? Bah, I remember looking at this
> > during PTI, but I seem to have forgotten everything again.
>
> [ Changed the title. Sorry for hijacking the thread. ]
>
> Since:
>
> native_set_fixmap()->set_pte_vad
Hi Pavel,
On 08/24/2018 11:55 AM, Pavel Machek wrote:
> On Fri 2018-08-17 10:15:27, Dan Murphy wrote:
>> Add the device tree bindings for the lm3697
>> LED driver for backlighting and display.
>>
>> Signed-off-by: Dan Murphy
>
> Acked-by: Pavel Machek
>
> Some nits are below.
>
>> +The LM3697
Dan,
On 08/24/2018 01:58 PM, Dan Murphy wrote:
> Jacek
>
> On 08/24/2018 05:05 AM, Pavel Machek wrote:
>> Hi!
>>
>>> +/**
>>> + * struct lm3697 -
>>> + * @enable_gpio - Hardware enable gpio
>>> + * @regulator - LED supply regulator pointer
>>> + * @client - Pointer to the I2C client
>>> + * @regm
Fix the redundant call being made to send the sleep and wake requests
immediately to the controller.
As per the patch[1], the sleep and wake request votes are cached in rpmh
controller and sent during rpmh_flush(). These requests needs to be sent
only during entry of deeper system low power modes
On 2018-08-24 09:11, Stephen Boyd wrote:
Quoting Venkata Narendra Kumar Gutta (2018-08-17 17:08:34)
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index 57304b2..da8f150 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -460,4 +460,32 @@ config EDAC_TI
Support f
Hi Pavel,
On 08/24/2018 12:11 PM, Pavel Machek wrote:
> Hi!
>
>> I think that it would be more flexible if software pattern fallback
>> was applied in case of pattern_set failure. Otherwise, it would
>> lead to the situation where LED class devices that support hardware
>> blinking couldn't be ap
Hi,
On Fri, 24 Aug 2018 16:58:40 +0200
Maxime Ripard wrote:
> Hi,
>
> On Mon, Aug 20, 2018 at 04:27:15PM +0200, Emmanuel Vadot wrote:
> > On Mon, 20 Aug 2018 16:07:37 +0200
> > Maxime Ripard wrote:
> >
> > > On Mon, Aug 20, 2018 at 07:41:22AM -0600, Rob Herring wrote:
> > > > On Mon, Aug 2
Enable TLMM IRQs to be sensed by PDC when we enter suspend. It is
possible that the TLMM may be powered off and not detect GPIOs that are
configured as wake up interrupts. By hooking into suspend callbacks, we
allow PDC IRQs to take over and wake up the system if wakeup interrupts
are triggered.
S
During suspend the system may power down some of the system rails. As a
result, the TLMM hw block may not be operational anymore and wakeup
capable GPIOs will not be detected. The PDC however will be operational
and the GPIOs that are routed to the PDC as IRQs can wake the system up.
To avoid bein
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