Add a helper that provides information about whether Trusted Foundations
firmware operations have been registered.
Signed-off-by: Dmitry Osipenko
---
arch/arm/firmware/trusted_foundations.c| 5 +
arch/arm/include/asm/trusted_foundations.h | 7 +++
2 files changed, 12 insertions(+)
d
CPU always jumps into reset handler in ARM-mode from the Trusted
Foundations firmware, hence let's make CPU to always jump into kernel
in ARM-mode regardless of the firmware presence to support. This is
required to make Thumb-2 kernel working with the Trusted Foundations
firmware on Tegra30.
Sign
Trusted Foundations firmware require MMU to be enabled for L2 cache
maintenance on Tegra30, hence perform the maintenance early-late on
suspend-resume respectively.
Signed-off-by: Dmitry Osipenko
---
arch/arm/mach-tegra/pm.c| 36 +
arch/arm/mach-tegra/rese
The Trusted Foundations firmware call varies depending on the required
suspend-mode. Make the firmware API to take the mode argument in order
to expose all of the modes to firmware user.
Signed-off-by: Dmitry Osipenko
---
arch/arm/firmware/trusted_foundations.c| 29 --
ar
Implement L2 cache initialization firmware callback that should be invoked
early in boot in order to setup the required outer cache driver callbacks.
Signed-off-by: Dmitry Osipenko
---
arch/arm/firmware/trusted_foundations.c | 46 +
1 file changed, 46 insertions(+)
diff
On 08/30/2018 09:57 AM, Jerome Glisse wrote:
> On Thu, Aug 30, 2018 at 06:19:52PM +0200, Michal Hocko wrote:
>> On Thu 30-08-18 10:08:25, Jerome Glisse wrote:
>>> On Thu, Aug 30, 2018 at 12:56:16PM +0200, Michal Hocko wrote:
On Wed 29-08-18 17:11:07, Jerome Glisse wrote:
> On Wed, Aug 29,
On Thu, Aug 30, 2018 at 05:20:22AM -0700, Guenter Roeck wrote:
> Excellent.
>
> In case it matters: I can use the same 32-bit efi image to boot a 64-bit
> kernel
> without problems.
Okay, I tracked it down. The 32-bit EFI code switches the CPU to the
read-write version of the GDT which is not ma
I am seeing userland corruption and application crashes on multiple
32-bit machines with 4.19-rc1+git. The machines vary: PII, PIII, P4.
They are all Intel. AMD Duron/Athlon/AthlonMP have been fine in my tests
so far (may be configuration dependent).
Typical problem is running aptitude in Debia
On Wed, 29 Aug 2018 15:20:29 -0700
"Paul E. McKenney" wrote:
> This commit also changes order of execution from this:
>
> rcu_dynticks_task_exit();
> rcu_dynticks_eqs_exit();
> trace_rcu_dyntick();
> rcu_cleanup_after_idle();
>
> To this:
>
> rcu_dynticks_task_exi
Em Tue, Aug 28, 2018 at 02:49:15PM +0530, Naveen N. Rao escreveu:
> Sandipan Das wrote:
> > This makes sure that the SyS symbols are ignored for any powerpc
> > system, not just the big endian ones.
> >
> > Fixes: fb6d59423115 ("perf probe ppc: Use the right prefix when ignoring
> > SyS symbols o
On Thu, Aug 30, 2018 at 11:08 AM Joerg Roedel wrote:
>
> Without a mapped GDT the #PF and #DF handlers also can't be started, so
> the machine triple-faults. Below diff fixes it for me, I'll send a
> proper patch tomorrow.
Hmm. Is there any reason why this code doesn't just use
load_fixm
On Wed, Aug 29, 2018 at 02:17:20PM -0700, Paul E. McKenney wrote:
> The RCU-bh update API is now defined in terms of that of RCU-bh and
> RCU-sched, so this commit updates the documentation accordingly.
>
> Signed-off-by: Paul E. McKenney
And an update consolidating this patch with 6/6 and with
Hello John!
On 30/08/2018 11:08, John Garry wrote:
> In commit c58caaab3bf8 ("serial: 8250: of: Defer probe on missing IRQ"), a
> check was added for the UART driver being probed prior to the parent IRQ
> controller.
>
> Unfortunately this breaks certain boards which have no interrupt support,
>
> -Original Message-
> From: mhkelle...@gmail.com
> Sent: Wednesday, August 29, 2018 10:22 AM
> To: will.dea...@arm.com; catalin.mari...@arm.com;
> mark.rutl...@arm.com; marc.zyng...@arm.com; linux-arm-
> ker...@lists.infradead.org; gre...@linuxfoundation.org; linux-
> ker...@vger.kerne
[ Updated to remove obsolete warning. ]
Event tracing is moving to SRCU in order to take advantage of the fact
that SRCU may be safely used from idle and even offline CPUs. However,
event tracing can invoke call_srcu() very early in the boot process,
even before workqueue_init_early() is invoked
On Thu, Aug 30, 2018 at 01:40:12PM -0400, Steven Rostedt wrote:
> On Thu, 30 Aug 2018 10:10:06 -0700
> "Paul E. McKenney" wrote:
>
>
> > > I would just keep the documentation patches separate.
> >
> > Combining yours and Josh's feedback, I will split the documentation
> > updates out of 4ca05
Em Mon, Aug 27, 2018 at 08:53:44PM -0700, Benjamin Peterson escreveu:
> Example output of perf trace -e mount,umount2:
>
> 6243.930 ( 0.052 ms): mount/30976 mount(dev_name: 0x55dc541bb920, dir_name:
> 0x55dc541bc960, type: 0x55dc541b9c40, flags: BIND) = 0
> 7851.821 (26.015 ms): umount/30983
> On Aug 30, 2018, at 8:13 AM, Jiri Olsa wrote:
>
> On Wed, Aug 15, 2018 at 10:03:13AM -0700, Song Liu wrote:
>
> SNIP
>
>>
>> +perf_event_remove_dup(event, ctx);
>> /*
>> * We can have double detach due to exit/hot-unplug + close.
>> */
>> @@ -1982,6 +2123,92 @@ event_
On Thu, 30 Aug 2018 10:37:42 -0700
"Paul E. McKenney" wrote:
> > > But still triggered the following:
> > >
> > > WARNING: CPU: 0 PID: 0 at
> > > /work/git/linux-trace.git/kernel/rcu/srcutree.c:242
> > > check_init_srcu_struct+0x85/0x90
> >
> > Gah!!! I needed to have removed that WARN_O
The geni_se_clk_freq_match() has some strange semantics. Specifically
it is defined with two modes:
1. It can find a clock that's an exact multiple of the requested rate
2. If can find a non-exact match but it can't handle multiples then
...but callers should always be able to handle a clock that
This fixes splat like the one below if CONFIG_DEBUG_ATOMIC_SLEEP=y on
Tegra30.
BUG: sleeping function called from invalid context at
drivers/soc/tegra/pmc.c:301
in_atomic(): 1, irqs_disabled(): 0, pid: 1, name: swapper/0
CPU: 0 PID: 1 Comm: swapper/0 Not tainted
4.18.0-next-20180821-00176-g7a
This fixes splats like the one below if CONFIG_DEBUG_ATOMIC_SLEEP=y
and machine (Tegra30) booted with SMP=n or all secondary CPU's are put
offline.
BUG: sleeping function called from invalid context at
kernel/locking/mutex.c:254
in_atomic(): 1, irqs_disabled(): 128, pid: 0, name: swapper/0
CPU
Reduces object size ~4kb
Joe Perches (2):
drm/nouveau: Add new logging function nv_cli_printk
drm/nouveau: Convert NV_PRINTK macros and uses to new nv_cli_ macros
drivers/gpu/drm/nouveau/nouveau_abi16.c | 2 +-
drivers/gpu/drm/nouveau/nouveau_chan.c | 12 +++
drivers/gpu/drm/nouveau/no
The function clk_round_rate() is defined to return a "long", not an
"unsigned long". That's because it might return a negative error
code. Change the call in geni_se_clk_tbl_get() to check for errors.
NOTE: overall the idea that we should iterate over clk_round_rate() to
try to reconstruct a tab
For platforms whose firmwares provide valid module handles
(SMBIOS type 17) in error records, this patch uses the module
handles to locate corresponding DIMMs and enables per-DIMM
error counter update.
Signed-off-by: Fan Wu
---
Changes from v1:
* Changed the new function name to get_dimm_smbios
Em Tue, Aug 28, 2018 at 08:22:40AM +0200, Thomas-Mich Richter escreveu:
> On 08/27/2018 10:08 PM, Kim Phillips wrote:
> > Add default handler for non-jump instructions. This really only has an
> > effect on instructions that compute a PC-relative address, such as 'adrp,'
> > as seen in these coupl
Em Mon, Aug 27, 2018 at 11:12:23AM +0200, Jiri Olsa escreveu:
> hi,
> Milind reported that modify_user_hw_breakpoint wouldn't
> allow the breakpoint changing if the new attr had 'disabled'
> set to true.
>
> I found a case where it actualy prevents ptrace user interface
> to change the breakpoint.
On Thu, Aug 30, 2018 at 7:23 PM Arnd Bergmann wrote:
>
> On Tue, Aug 28, 2018 at 3:17 PM Sunil Kovvuri wrote:
> > On Tue, Aug 28, 2018 at 6:27 PM Arnd Bergmann wrote:
> > > On Tue, Aug 28, 2018 at 2:42 PM Sunil Kovvuri
> > > wrote:
> > > > On Tue, Aug 28, 2018 at 5:39 PM Arnd Bergmann wrote:
On Thu, Aug 30, 2018 at 11:05:16AM -0700, Mike Kravetz wrote:
> On 08/30/2018 09:57 AM, Jerome Glisse wrote:
> > On Thu, Aug 30, 2018 at 06:19:52PM +0200, Michal Hocko wrote:
> >> On Thu 30-08-18 10:08:25, Jerome Glisse wrote:
> >>> On Thu, Aug 30, 2018 at 12:56:16PM +0200, Michal Hocko wrote:
> >>
Currently all PLL's on Tegra20 use a hardcoded delay despite of having
a lock-status bit. The lock-status polling was disabled ~7 years ago
because PLLE was failing to lock and was a suspicion that other PLLs
might be faulty too. Other PLLs are okay, hence enable the lock-status
polling for them. T
Initially Common Clock Framework isn't aware of the clock-enable status,
this results in enabling of clocks that were enabled by bootloader. This
is not a big deal for a regular clock-gates, but for PLL's it may have
some unpleasant consequences. Thus re-enabling PLLX (the main CPU parent
clock) ma
Arnaldo,
I'm going to be playing with some of the probe code which may conflict
with these patches, so I would like to pull these in my tree. But this
patch requires an Acked-by from you before I can pull it in.
You OK with this?
Thanks!
-- Steve
On Mon, 20 Aug 2018 10:12:50 +0530
Ravi Bang
On Thu, Aug 30, 2018 at 11:21:49AM -0700, Linus Torvalds wrote:
> On Thu, Aug 30, 2018 at 11:08 AM Joerg Roedel wrote:
> >
> > Without a mapped GDT the #PF and #DF handlers also can't be started, so
> > the machine triple-faults. Below diff fixes it for me, I'll send a
> > proper patch tomorrow.
>
Em Mon, Aug 27, 2018 at 12:53:40PM -0500, Kim Phillips escreveu:
> v2: address acme's comments:
> - consolidate into a validate_comma()
> - call from an additional couple of places necessary
> - don't listen to checkpatch wrt reflowing jump__parse definition
> line to less than 80
Tegra20/30 drivers do not handle the tick_broadcast_enter() error,
let's just move out the broadcasting to the CPUIDLE core by setting
the respective flag in the Tegra20/30 drivers.
Signed-off-by: Dmitry Osipenko
---
arch/arm/mach-tegra/cpuidle-tegra20.c | 11 ++-
arch/arm/mach-tegra/cpu
On Wed, Jul 18, 2018 at 11:14:04AM +0200, Nicholas Mc Guire wrote:
> drm_legacy_ctxbitmap_next() returns idr_alloc() which can return
> -ENOMEM, -EINVAL or -ENOSPC none of which are -1. since drm_context_t
> is an unsigned int an intermediate variable is used to handle the
> error cases, and then c
Em Thu, Aug 30, 2018 at 02:45:31PM -0400, Steven Rostedt escreveu:
>
> Arnaldo,
>
> I'm going to be playing with some of the probe code which may conflict
> with these patches, so I would like to pull these in my tree. But this
> patch requires an Acked-by from you before I can pull it in.
>
> Y
> -Original Message-
> From: mhkelle...@gmail.com
> Sent: Wednesday, August 29, 2018 10:22 AM
> To: will.dea...@arm.com; catalin.mari...@arm.com;
> mark.rutl...@arm.com; marc.zyng...@arm.com; linux-arm-
> ker...@lists.infradead.org; gre...@linuxfoundation.org; linux-
> ker...@vger.kerne
> On Aug 30, 2018, at 8:18 AM, Jiri Olsa wrote:
>
> On Wed, Aug 15, 2018 at 10:03:13AM -0700, Song Liu wrote:
>
> SNIP
>
>> @@ -6100,7 +6333,7 @@ static void perf_output_read_group(struct
>> perf_output_handle *handle,
>>
>> if ((sub != event) &&
>> (sub->stat
In preparation to remove device_node.name pointer, add helper functions
for node name comparisons which are a common pattern throughout the kernel.
Cc: Frank Rowand
Signed-off-by: Rob Herring
---
drivers/of/base.c | 22 ++
include/linux/of.h | 13 +
2 files chan
In preparation to remove direct access to device_node.type, add
of_node_is_type() and of_node_get_device_type() helpers to check and
retrieve the device type.
Cc: Frank Rowand
Signed-off-by: Rob Herring
---
include/linux/of.h | 12
1 file changed, 12 insertions(+)
diff --git a/inc
Hi Geert,
On Thursday, August 30, 2018, Geert Uytterhoeven wrote:
> Earlycon for RZ/A2 (which is a new platform) will be fixed later in a
> separate patch.
I assume something like this:
(which works for me)
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index ab3f6e91853
The DRAM refresh-interval is getting erroneously set to "1" on exiting
from memory self-refreshing mode. The clobbered interval causes the
"refresh request overflow timeout" error raised by the External Memory
Controller on exiting from LP1 on Tegra30.
Signed-off-by: Dmitry Osipenko
---
arch/arm
On 08/30/2018 10:34 AM, Andy Lutomirski wrote:
>> But, to keep B's TLB from picking up the entry, I think we can just make
>> it !Present for a moment. No TLB can cache it, and I believe the same
>> "don't set Dirty on a !Writable entry" logic also holds for !Present
>> (modulo a weird erratum or
The memory interface configuration and re-calibration interval are left
unassigned on resume from LP1 because these registers are shadowed and
require latching after being adjusted.
Signed-off-by: Dmitry Osipenko
---
arch/arm/mach-tegra/sleep-tegra30.S | 2 ++
1 file changed, 2 insertions(+)
di
Hello,
This patch series fixes couple bugs in the memory self-refresh code.
The EMC / MC state is properly restored after patches being applied,
please review.
Dmitry Osipenko (4):
ARM: tegra: Fix missed EMC registers latching on resume from LP1 on
Tegra30+
ARM: tegra: Fix DRAM refresh-in
For P2P requests, we must use the pci_p2pmem_map_sg() function
instead of the dma_map_sg functions.
With that, we can then indicate PCI_P2P support in the request queue.
For this, we create an NVME_F_PCI_P2P flag which tells the core to
set QUEUE_FLAG_PCI_P2P in the request queue.
Signed-off-by:
The external memory arbitration configuration is getting reset after
memory entering into self-refresh mode, it shall be restored on the
exit. Note that MC_EMEM_ARB_CFG register is shadowed and latching
happens on the EMC timing update. This fixes 2x GPU performance
degradation after resuming from
Two interrupts are raised on resume from LP1 on Tegra30+: first is the
clock change completed interrupt which is set after updating timing
configuration, second is DLL alarm interrupt which is set when DLL
starts re-calibration after being reset. Clear these two interrupts
in the end of exiting fro
Hello,
This patch-series fixes CPU hanging after suspend-resume / LP2 cpuidle
on Tegra30. The bug really appears during stress-testing, like frequent
suspending under variable load + the upcoming Tegra30 CPUFREQ driver.
Dmitry Osipenko (2):
ARM: tegra: Switch CPU to PLLP before powergating on T
The early-resume code shall not switch CPU to PLLX because PLLX
configuration could be unstable or PLLX could be even disabled if
CPU entered suspend on PLLP, it the case if CPUFREQ driver is active.
The actual PLLX configuration and burst policy shall be restored by
the clock driver.
Signed-off-b
PLLX is getting turned by the HW logic when CPU enters powergated state
and there is no enough time for PLLX to re-lock on exiting the low-power
state, this causes memory errors coming from misbehaving CPU and eventual
hanging of the system.
Signed-off-by: Dmitry Osipenko
---
arch/arm/mach-tegra
Now that we initialize dt_root_addr_cells and dt_root_size_cells earlier,
use them and simplify of_fdt_limit_memory.
Cc: Frank Rowand
Signed-off-by: Rob Herring
---
drivers/of/fdt.c | 23 +--
1 file changed, 1 insertion(+), 22 deletions(-)
diff --git a/drivers/of/fdt.c b/dr
This is a small restructuring and clean-up of handling root node
#size-cells and #address-cells (or lack of). As only Sparc needs a
different default value and only for #address-cells, we can handle that
locally and remove one more dependency on asm/prom.h.
Rob
Rob Herring (3):
of/fdt: Scan t
Scan the root node properties (#{size,address}-cells) earlier, so that
the dt_root_addr_cells and dt_root_size_cells variables are initialized
and can be used.
Cc: Frank Rowand
Signed-off-by: Rob Herring
---
drivers/of/fdt.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --g
Only some old OpenFirmware implementations rely on default sizes. Any
FDT and modern implementation should have explicit properties. Make the
OF_ROOT_NODE_*_CELLS_DEFAULT defines private so we don't get any outside
users.
This also gets us one step closer to removing the asm/prom.h dependency on
S
On 2018-08-30 02:03 PM, Ulf Hansson wrote:
On 28 August 2018 at 23:47, Douglas Gilbert wrote:
I usually boot my Lenovo X270 with a SD card in its:
# lspci
02:00.0 Unassigned class [ff00]: Realtek Semiconductor Co., Ltd. RTS522A PCI
Express Card Reader (rev 01)
...
In lk 4.19.0-rc1 the boot
Hi Fan,
On Thu, Aug 30, 2018 at 2:37 PM, Fan Wu wrote:
> For platforms whose firmwares provide valid module handles
> (SMBIOS type 17) in error records, this patch uses the module
> handles to locate corresponding DIMMs and enables per-DIMM
> error counter update.
>
> Signed-off-by: Fan Wu
> di
Hi Pavel,
Thank you for the patch.
Looking for DT bindings I can find the following
Documentation/devicetree/bindings/mfd/ti-lmu.txt,
which for LED bindings redirects to:
"[2] ../leds/leds-lm3633.txt",
but it is not present in the mainline.
Best regards,
Jacek Anaszewski
On 08/30/2018 10:22
On Thu, Aug 30, 2018 at 12:53:39PM -0600, Logan Gunthorpe wrote:
[...]
>
> When the PCI P2PDMA config option is selected the ACS bits in every
> bridge port in the system are turned off to allow traffic to
> pass freely behind the root port. At this time, the bit must be disabled
> at boot so th
Poll PLLX lock-status instead of delaying for a constant time. This speeds
up resume from suspend a tad and is less error-prone since lock failure
will be reported.
Signed-off-by: Dmitry Osipenko
---
drivers/clk/tegra/clk-tegra20.c | 51 +++--
drivers/clk/tegra/clk-te
Hello,
This series is a prerequisite for the CPUFREQ driver patches, it can be
applied separately. CPUFREQ will be supported on Tegra30 once this and
the CPUFREQ patch-series will be applied.
Dmitry Osipenko (3):
clk: tegra: Convert CCLKG mux to mux + clock divider on Tegra30
clk: tegra: Add
Add more predefined rates to the PLLX table, allowing to lower the rate
down to 312MHz. This gives more variations of frequency selection to the
CPUFREQ driver.
Signed-off-by: Dmitry Osipenko
---
drivers/clk/tegra/clk-tegra30.c | 42 +
1 file changed, 42 insertion
Some of the CCLKG parents aren't accessible via device tree because they
are created as non-DT clocks. Apparently there is no reason to define
these clocks in that manner, hence convert CCLKG mux to mux + clock
divider to remove the non-DT parent clocks. Now it is possible to request
all of CCLKG p
On Tue, Aug 28, 2018 at 7:08 PM, Amit Kucheria wrote:
> The SROT registers are initialised by the secure firmware at boot. We
> don't have write access to the registers. Check if the block is enabled
> before continuing.
>
> Signed-off-by: Amit Kucheria
> Reviewed-by: Matthias Kaehlcke
> ---
>
On Thu, Aug 30, 2018 at 08:46:39PM +0200, Joerg Roedel wrote:
> On Thu, Aug 30, 2018 at 11:21:49AM -0700, Linus Torvalds wrote:
> > On Thu, Aug 30, 2018 at 11:08 AM Joerg Roedel wrote:
> > >
> > > Without a mapped GDT the #PF and #DF handlers also can't be started, so
> > > the machine triple-faul
Pavel
On 08/29/2018 04:20 PM, Pavel Machek wrote:
>
> Here's preview of driver for TI LMU. It controls LEDs on Droid 4
> smartphone, including keyboard and screen backlights.
>
> This adds backlight support for the following TI LMU
> chips: LM3532, LM3631, LM3632, LM3633, LM3695 and LM3697.
>
>
On Thu, 30 Aug 2018 15:50:27 -0300
Arnaldo Carvalho de Melo wrote:
> Em Thu, Aug 30, 2018 at 02:45:31PM -0400, Steven Rostedt escreveu:
> >
> > Arnaldo,
> >
> > I'm going to be playing with some of the probe code which may conflict
> > with these patches, so I would like to pull these in my tre
Fix three typos in CONFIG_WARN_ALL_UNSEEDED_RANDOM help text.
Signed-off-by: Thibaut Sautereau
---
lib/Kconfig.debug | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
index c7fef0c56d6b..3e50cc93572c 100644
--- a/lib/Kconfig.debug
+++ b
Hi Tyler,
> > +static int get_dimm_smbios_index(u16 handle) {
> > + struct mem_ctl_info *mci;
> > + int i;
> > +
> > + mci = ghes_pvt->mci;
> > +
>
> Minor nit: you could define and set mci in the same line to save some space
> here.
>
> Otherwise this patch looks good to me.
Add CPU's Operating Performance Points to the device tree, they are used
by the CPUFreq driver and allow to setup thermal throttling for the boards
by linking the cooling device (CPU) with thermal sensors via thermal-zones
description.
Signed-off-by: Dmitry Osipenko
---
arch/arm/boot/dts/tegra20
Hello,
This series adds support for CPU frequency scaling on Tegra30 and device
tree support that allows to implement thermal throttling and customize
available CPU frequencies per-board. The tegra20-cpufreq driver has been
re-worked to support that all.
Note that Tegra30 support not strictly dep
Add CPU's Operating Performance Points to the device tree, they are used
by the CPUFreq driver and allow to setup thermal throttling for the boards
by linking the cooling device (CPU) with thermal sensors via thermal-zones
description.
Signed-off-by: Dmitry Osipenko
---
arch/arm/boot/dts/tegra30
Add support for thermal throttling and Operating Performance Points.
Driver now relies on OPP's supplied via device tree and therefore will
work only on devices that use the updated device tree. The generalization
of the driver allows to transparently support Tegra30.
Signed-off-by: Dmitry Osipenk
From: Eric Biggers
This simplifies the code. No change in behavior.
Signed-off-by: Eric Biggers
---
lib/parser.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/lib/parser.c b/lib/parser.c
index 3278958b472a..0142ef28f0eb 100644
--- a/lib/parser.c
+++ b/lib/parser.c
@
Add device-tree binding that describes CPU frequency-scaling hardware
found on NVIDIA Tegra20/30 SoC's.
Signed-off-by: Dmitry Osipenko
---
.../cpufreq/nvidia,tegra20-cpufreq.txt| 38 +++
1 file changed, 38 insertions(+)
create mode 100644
Documentation/devicetree/bindin
Tegra20-cpufreq driver require a platform device in order to be loaded,
instantiate a simple platform device for the driver during of the machines
late initialization. Driver now supports Tegra30 SoC's, hence create the
device on Tegra30 machines.
Signed-off-by: Dmitry Osipenko
---
arch/arm/mach
I sloppily passed a kernel-typed pointer to __range_not_ok(), and sparse
doesn't like that.
Make `prologue` a __user pointer (to protect against accidental
dereferences) and force-cast it to a kernel pointer when calling
probe_kernel_read(), which will then immediately force-cast it back to a
user
From: Eric Biggers
This simplifies the code. No change in behavior.
Signed-off-by: Eric Biggers
---
lib/parser.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/lib/parser.c b/lib/parser.c
index 0142ef28f0eb..96656a6dd59b 100644
--- a/lib/parser.c
+++ b/lib/parser.c
@@
From: Eric Biggers
This simplifies the code. No change in behavior.
Signed-off-by: Eric Biggers
---
lib/parser.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/lib/parser.c b/lib/parser.c
index 96656a6dd59b..dd70e5e6c9e2 100644
--- a/lib/parser.c
+++ b/lib/parser.c
@@
Hi,
On 08/27/2018 01:42 PM, Palmer Dabbelt wrote:
These are just hard coded in the RISC-V port, which doesn't make any
sense. We should probably be setting these from device tree entries
when they exist, but for now I think it's saner to just leave them all
as their default values.
Default va
Robert Jarzmik writes:
> Change from xxuart to serial to normalize the devicetree pxa serial
> support.
>
> Signed-off-by: Robert Jarzmik
> ---
> arch/arm/boot/dts/pxa2xx.dtsi | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
Queued to pxa/dt.
--
Robert
On 08/30/2018 12:45 PM, Thibaut Sautereau wrote:
> Fix three typos in CONFIG_WARN_ALL_UNSEEDED_RANDOM help text.
>
> Signed-off-by: Thibaut Sautereau
Acked-by: Randy Dunlap
Thanks.
> ---
> lib/Kconfig.debug | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/lib/Kco
Hi Baolin,
On 08/30/2018 09:40 AM, Baolin Wang wrote:
> Some LED controllers have support for autonomously controlling
> brightness over time, according to some preprogrammed pattern or
> function.
I think that this commit message should be rearranged, so that
the software pattern was mentioned i
Add 3 helpers so that pincontrol definitions for pxa25x and pxa27x are
easier, and can be easily converted from old mfp mach-pxa code to
devicetree.
An example of such conversion would be :
static unsigned long mioa701_pin_config[] = {
GPIO32_MMC_CLK,
GPIO92_MMC_DAT_0,
GPIO
Add device-tree description of the Mitac MIO A701 board.
This is aimed at replacing mioa701.c board file, and once stabilized,
the leftover, such as the suspend resume mechanics will rely on a new
IPL, and not the legacy Windows CE one.
Signed-off-by: Robert Jarzmik
---
Since v1: fix lcd_supply a
Hi!
> > Here's preview of driver for TI LMU. It controls LEDs on Droid 4
> > smartphone, including keyboard and screen backlights.
> >
> > This adds backlight support for the following TI LMU
> > chips: LM3532, LM3631, LM3632, LM3633, LM3695 and LM3697.
> >
> > Signed-off-by: Milo Kim
> > [add
I guess the wrap was done because of __ref, but no reason to have this
wrap. So looks good to me.
Reviewed-by: Pavel Tatashin
On 8/16/18 6:06 AM, David Hildenbrand wrote:
> Let's avoid this indirection and just call the function offline_pages().
>
> Signed-off-by: David Hildenbrand
> ---
> mm
On 8/30/18 4:17 PM, Pasha Tatashin wrote:
> I guess the wrap was done because of __ref, but no reason to have this
> wrap. So looks good to me.
>
> Reviewed-by: Pavel Tatashin >
> On 8/16/18 6:06 AM, David Hildenbrand wrote:
>> Let's avoid this indirection and just call the function offline_page
Introduce pipe_ll_usec field for pipes that indicates the amount of micro
seconds a thread should spin if pipe is empty or full before sleeping. This
is similar to network sockets. Workloads like hackbench in pipe mode
benefits significantly from this by avoiding the sleep and wakeup overhead.
Othe
Enable busy waiting for pipes. pipe_busy_wait is called if pipe is empty or
full which spins for specified micro seconds. wake_up_busy_poll is called
when data is written or read to signal any busy waiting threads. A tunable
pipe_busy_poll is introduced to enable or disable busy waiting via /proc.
This patch introduces busy waiting for pipes similar to network sockets.
When pipe is full or empty a thread busy waits for some microseconds before
sleeping. This avoids the sleep and wakeup overhead and improves
performance in case wakeup happens very fast. It uses new fields in
pipe_inode_info t
Hi Mathias,
On Wed, Aug 22, 2018 at 10:38:06PM +0200, Mathias Kresin wrote:
> The rt3352 has a pin that can be used as second spi chip select,
> watchdog reset or GPIO. The pinmux setup was missing the definition of
> said pin.
>
> The pin is configured via the same bit on rt5350, so reuse the ex
Hi Benjamin,
On Thu, 30 Aug 2018 at 00:18, Benjamin Tissoires
wrote:
>> On Thu, Aug 30, 2018 at 1:06 AM Harry Cutts wrote:
> > > The conversion input_report_rel(... REL_WHEEL,...) to
> > > hid_scroll_counter_handle_scroll() should be dealt in a separate
> > > patch.
> >
> > OK, I'll do that in v
Hi Pavel,
I love your patch! Yet something to improve:
[auto build test ERROR on j.anaszewski-leds/for-next]
[also build test ERROR on v4.19-rc1 next-20180830]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci
On 08/30/2018 01:24 PM, subhra mazumdar wrote:
This patch introduces busy waiting for pipes similar to network sockets.
When pipe is full or empty a thread busy waits for some microseconds before
sleeping. This avoids the sleep and wakeup overhead and improves
performance in case wakeup happen
Hi Meelis,
On Thu, Aug 30, 2018 at 09:09:19PM +0300, Meelis Roos wrote:
> I am seeing userland corruption and application crashes on multiple
> 32-bit machines with 4.19-rc1+git. The machines vary: PII, PIII, P4.
> They are all Intel. AMD Duron/Athlon/AthlonMP have been fine in my tests
> so fa
This patch adds device tree support for the fxas21002c driver, including
bindings.
Signed-off-by: Afonso Bordado
---
.../bindings/iio/gyroscope/fsl,fxas21002c.txt | 35 +++
drivers/iio/gyro/fxas21002c.c | 13 ++-
2 files changed, 47 insertions(+), 1 deletion(-
This patch adds support for reading/writing ODR/Scale
We don't support the scale boost modes.
Signed-off-by: Afonso Bordado
---
drivers/iio/gyro/fxas21002c.c | 161 +++---
1 file changed, 148 insertions(+), 13 deletions(-)
diff --git a/drivers/iio/gyro/fxas21002c.c
FXAS21002C is a 3 axis gyroscope with integrated temperature sensor
Signed-off-by: Afonso Bordado
---
Changes in v2
- Use ANSI C Comments
- Minor cleanups
- More dscriptive devicetree bindings
drivers/iio/gyro/Kconfig | 11 +
drivers/iio/gyro/Makefile | 1 +
drivers/iio/gy
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