This patchset remove some redundancy in function
arch_get_unmapped_area_topdown().
[PATCH 1/2] mm/mmap.c: Remove redundant variable 'addr' in
arch_get_unmapped_area_topdown()
[PATCH 2/2] mm/mmap.c: Remove redundant const qualifier of the no-pointer
parameters
Yang Fan (2):
mm/mmap.c: Remove
The variable 'addr' is redundant in arch_get_unmapped_area_topdown(),
just use parameter 'addr0' directly. Then remove the const qualifier
of the parameter, and change its name to 'addr'.
Signed-off-by: Yang Fan
---
mm/mmap.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git
In according with other functions, remove the const qualifier of the
no-pointer parameters in function arch_get_unmapped_area_topdown().
Signed-off-by: Yang Fan
---
mm/mmap.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/mm/mmap.c b/mm/mmap.c
index
On Sun, 20 Jan 2019 at 04:49, Linus Torvalds
wrote:
>
> On Sun, Jan 20, 2019 at 12:01 PM Will Deacon wrote:
> >
> > > @@ -52,7 +52,7 @@ u32 int_sqrt64(u64 x)
> > > if (x <= ULONG_MAX)
> > > return int_sqrt((unsigned long) x);
> > >
> > > - m = 1ULL << (fls64(x) & ~1ULL);
On 2019-01-18 23:50, Jason Gunthorpe wrote:
There has been some confusion since checkpatch started warning about
bool
use in structures, and people have been avoiding using it.
Many people feel there is still a legitimate place for bool in
structures,
so provide some guidance on bool usage
Good day!!! I am Miss Julian Mene, 24 year old, an orphan from Democratic
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On Saturday 19 January 2019 12:55:54 Mattias Jacobsson wrote:
> Add WMI support to MODULE_DEVICE_TABLE() by adding info about struct
> wmi_device_id in devicetable-offsets.c and add a WMI entry point in
> file2alias.c.
>
> The type argument for MODULE_DEVICE_TABLE(type, name) is wmi.
>
>
On Sun, 20 Jan 2019 at 09:31, Crt Mori wrote:
>
> On Sun, 20 Jan 2019 at 04:49, Linus Torvalds
> wrote:
> >
> > On Sun, Jan 20, 2019 at 12:01 PM Will Deacon wrote:
> > >
> > > > @@ -52,7 +52,7 @@ u32 int_sqrt64(u64 x)
> > > > if (x <= ULONG_MAX)
> > > > return
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On Sat, Jan 19, 2019 at 12:19:20AM -0800, Myungho Jung wrote:
> On Fri, Jan 18, 2019 at 10:19:41AM +0100, Marcel Holtmann wrote:
> > Hi Myungho,
> >
> > > In h4_recv(), if h4_recv_buf() returns error and h4_recv() is
> > > asynchronously called again before setting rx_skb to NULL, ERR_PTR will
>
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On Sun, Jan 20, 2019 at 3:36 AM Tetsuo Handa
wrote:
>
> On 2019/01/20 3:56, Dmitry Vyukov wrote:
> >> Seems easy enough to fix without resorting to __mutex_owner() (untested):
> >>
> >>
> >> diff --git a/drivers/block/loop.c b/drivers/block/loop.c
> >> index 264abaaff662..cee258d12a1e 100644
> >>
If all the components associated to a component master is not added
to the component framework due to the HW capability or Kconfig
selection, component_match will be NULL at
component_master_add_with_match().
To avoid this, component_match_alloc() is added to the framework,
to allcoate the struct
On Sat, Jan 19, 2019 at 10:11:08AM +0100, Greg Kroah-Hartman wrote:
> On Fri, Jan 18, 2019 at 08:09:07PM +0100, Jann Horn wrote:
> > Hi!
> >
> > When a line discipline doesn't have a ->receive_buf handler, tiocsti()
> > attempts to call a NULL pointer. Both tty_n_tracesink and
> >
On Sun, Jan 20, 2019 at 4:34 AM Angus Ainslie (Purism) wrote:
>
> On the imx8mq I get NULL pointer de-deference errors if the device
> isn't passed in during allocation.
>
> Signed-off-by: Angus Ainslie (Purism)
Hi Angus,
I have already sent a fix for this:
On Sun, Jan 20, 2019 at 4:32 AM Angus Ainslie (Purism) wrote:
>
> On i.mx8 mscale B0 chip, AHB/SDMA clock ratio 2:1 can't be supportted,
> since SDMA clock ratio has to be increased to 250Mhz, AHB can't reach
> to 500Mhz, so use 1:1 instead.
>
> based on NXP commit MLK-16841-1
Hi Angus,
Thanks
On Sun, Jan 20, 2019 at 9:30 PM Crt Mori wrote:
>
> I have just re-read the patch submit discussion and a sqrt of 64bit
> number can never be more than 32bit. That is why u32 return value is
> enough.
Right. And that's exactly why I thought it was so odd how the
mlx90632.c driver - which is the
On Sat, 19 Jan 2019, Scott Bauer wrote:
On Thu, Jan 17, 2019 at 09:31:51PM +, David Kozub wrote:
+static int write_shadow_mbr(struct opal_dev *dev, void *data)
+{
+ struct opal_shadow_mbr *shadow = data;
+ const u8 __user *src;
+ u8 *dst;
+ size_t off = 0;
+
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On 15-01-19, 17:15, Leonid Iziumtsev wrote:
> Once the "ld_queue" list is not empty, next descriptor will migrate
> into "ld_active" list. The "desc" variable will be overwritten
> during that transition. And later the dmaengine_desc_get_callback_invoke()
> will use it as an argument. As result we
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On 11-01-19, 14:29, Daniel Baluta wrote:
> From: Andy Duan
>
> Pass ->dev to dma_alloc_coherent() API. We need this
> becase dma_alloc_coherent() makes use of dev parameter
^
Typo
> and receiving NULL will result in a crash.
Applied after fixing typo and subsystem name, thanks
--
~Vinod
Hi Codrin,
On 17-01-19, 16:10, codrin.ciubota...@microchip.com wrote:
> From: Codrin Ciubotariu
>
> atchan->status is used for two things:
> - pass channel interrupts status from interrupt handler to tasklet;
> - channel information like whether it is cyclic or paused;
>
> Since these
On 17-01-19, 09:43, John Stultz wrote:
> On Thu, Jan 17, 2019 at 9:08 AM Manivannan Sadhasivam
> wrote:
> >
> > On Wed, Jan 16, 2019 at 09:10:23AM -0800, John Stultz wrote:
> > > Some dma channels can be reserved for secure mode or other
> > > hardware on the SoC, so provide a binding for a
On 16-01-19, 09:10, John Stultz wrote:
> From: Youlin Wang
>
> On the hi3660 hardware there are two (at least) DMA controllers,
> the DMA-P (Peripherial DMA) and the DMA-A (Audio DMA). The
^^^
typo
> two blocks are similar, but have some slight differences. This
> resulted
Keep consistent the document. In the document, option references
are always linked, except for the one I fixed with this patch
Signed-off-by: Federico Vaga
---
Documentation/process/stable-kernel-rules.rst | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
Hi Mark!
> On 18.01.2019, at 20:12, Mark Brown wrote:
>
> On Fri, Jan 18, 2019 at 06:11:31PM +0100, ker...@martin.sperl.org wrote:
>
>> Does something like this looks acceptable?
>
> Yes, it does!
>
>> SPI_CONTROLLER_MODE_EXCLUSIVE could replace the bus_lock_flag.
>> I am also not sure of
On Sat, 19 Jan 2019 20:42:41 +,
Brian Masney wrote:
>
> Convert the spmi-pmic-arb IRQ code to use the version 2 IRQ interface
> in order to support hierarchical IRQ chips. This is necessary so that
> spmi-gpio can be setup as a hierarchical IRQ chip with pmic-arb as the
> parent. IRQ chips
On Sat, 19 Jan 2019 20:42:44 +,
Brian Masney wrote:
>
> spmi-gpio did not have any irqchip support so consumers of this in
> device tree would need to call gpio[d]_to_irq() in order to get the
> proper IRQ on the underlying PMIC. IRQ chips in device tree should
> be usable from the start
On Sat, 19 Jan 2019 23:13:45 +,
Linus Walleij wrote:
>
> On Sat, Jan 19, 2019 at 9:43 PM Brian Masney wrote:
>
> > This patch series adds hierarchical IRQ chip support to spmi-gpio so
> > that device tree consumers can request an IRQ directly from the GPIO
> > block rather than having to
Many kernel-doc comments referenced by Documentation/core-api/mm-api.rst
have the return value descriptions misformatted or lack it completely. This
makes kernel-doc script unhappy and produces more than 100 warnings when
running
make htmldocs V=1
These patches fix the formatting of
Many kernel-doc comments in mm/ have the return value descriptions either
misformatted or omitted at all which makes kernel-doc script unhappy:
$ make V=1 htmldocs
...
./mm/util.c:36: info: Scanning doc for kstrdup
./mm/util.c:41: warning: No description found for return value of 'kstrdup'
Some kernel-doc comments in mm/vmalloc.c have leading tab in indentation.
This leads to excessive indentation in the generated HTML and to the
inconsistency of its layout [1].
Besides, multi-line Note: sections are not handled properly.
[1]
The descriptions of userspace memory access functions had minor issues with
formatting that made kernel-doc unable to properly detect the
function/macro names and the return value sections:
./arch/x86/include/asm/uaccess.h:80: info: Scanning doc for
./arch/x86/include/asm/uaccess.h:139: info:
Hello Dear,
how are you today,I hope you are doing great.
It is my great pleasure to
contact you and i hope you don't mind,I was just surfing
through the Internet search when i found your email address,I want to make a new
and special friend,I hope you don't mind.
My name is Tracy William,I am
I am sorry I am a little busy for the lunar new year recently and the
H.264 syntax rules are little complex, I will try explain my ideas more
clear here.
On 1/17/19 7:01 PM, Maxime Ripard wrote:
Hi,
On Tue, Jan 08, 2019 at 05:52:28PM +0800, Randy 'ayaka' Li wrote:
+struct
On Sun, Oct 28, 2018 at 12:29 PM Sabyasachi Gupta
wrote:
>
> Replaced dma_alloc_coherent + memset with dma_zalloc_coherant
>
> Signed-off-by: Sabyasachi Gupta
Acked-by: Souptick Joarder
> ---
> arch/sh/mm/consistent.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git
On Sat, Jan 19, 2019 at 2:10 PM Tetsuo Handa
wrote:
>
> On 2019/01/19 21:16, Dmitry Vyukov wrote:
> >> The question for me is, whether sysbot can detect hash collision with
> >> different
> >> syz-program lines before writing the hash value to /dev/kmsg, and retry by
> >> modifying
> >>
Tested with mmsys-Patch, but same result, no fbcon, tft is switched on but i
see no kernel-log
after boot is finished, i see X-server, until this point i see only black screen
regards Frank
> Gesendet: Freitag, 18. Januar 2019 um 09:39 Uhr
> Von: "Matthias Brugger"
> may it be the not yet
On 1/10/19 12:04 PM, Gregory CLEMENT wrote:
> Hi Heinrich,
>
> On ven., déc. 21 2018, Heinrich Schuchardt wrote:
>
>> The memory area [0x400-0x420[ is occupied by the PSCI firmware. Any
>> attempt to access it from Linux leads to an immediate crash.
>>
>> So let's make the same memory
On 2019/01/20 22:30, Dmitry Vyukov wrote:
>> The first messages I want to look at is kernel output. Then, I look at
>> syz-program lines as needed. But current "a self-contained file" is
>> hard to find kernel output.
>
> I think everybody looks at kernel crash first, that's why we provide
>
Hi Daniel,
On 2019-01-20 02:58, Daniel Baluta wrote:
On Sun, Jan 20, 2019 at 4:32 AM Angus Ainslie (Purism)
wrote:
On i.mx8 mscale B0 chip, AHB/SDMA clock ratio 2:1 can't be supportted,
since SDMA clock ratio has to be increased to 250Mhz, AHB can't reach
to 500Mhz, so use 1:1 instead.
Invoking `dm_get_device` twice on the same device path with different
modes is dangerous. Because in that case, `upgrade_mode()` will place
a new `dm_dev` and free the old one, which may be referenced by a
previous caller. Subsequently dereference the dangling pointer will
trigger kernel NULL
On Sat, Jan 19, 2019 at 07:35:33PM +0100, Miguel Ojeda wrote:
> Hi Michael,
>
> On Wed, Jan 9, 2019 at 3:50 PM Michael S. Tsirkin wrote:
> >
> > On Wed, Jan 09, 2019 at 11:35:52AM +0100, Miguel Ojeda wrote:
> > > Note it would be nice to separate the patch into two (one for the
> > > comments,
Will do within a week, thanks a lot!
On Sat, Jan 19, 2019 at 02:12:59PM -0600, Bjorn Helgaas wrote:
> I gave up trying to reproduce the problem and test this patch with qemu;
> can you guys (Michael and Xu (sorry if I mangled your name)) give this a
> try?
>
> I cc'd a few other people who have
Hi, Vignesh,
On 01/16/2019 12:30 PM, Vignesh R wrote:
> Cadence OSPI controller IP supports Octal IO (x8 IO lines),
> It also has an integrated PHY. IP register layout is very
> similar to existing QSPI IP except for additional bits to support Octal
> and Octal DDR mode. Therefore, extend current
Hi Alexandre,
I resubmitted my patches with a new subject and corrected FROM field including
all fixes based on your remarks.
Thank you!
On 2019-01-20 02:54, Daniel Baluta wrote:
On Sun, Jan 20, 2019 at 4:34 AM Angus Ainslie (Purism)
wrote:
On the imx8mq I get NULL pointer de-deference errors if the device
isn't passed in during allocation.
Signed-off-by: Angus Ainslie (Purism)
Hi Angus,
I have already sent a fix for
Hi Jianxin,
Jianxin Pan wrote on Sun, 20 Jan 2019
01:02:35 +0800:
> Add entry for Amlogic NAND controller driver and its bindings[0].
>
> [0]
> https://lore.kernel.org/lkml/1547566684-57472-1-git-send-email-jianxin@amlogic.com/
>
> Signed-off-by: Liang Yang
> Signed-off-by: Jianxin Pan
The main goal of the change is to remove .pin_config_dbg_parse_modify
callback before a driver with its support appears. So far the in-kernel
interface did not attract any users since its introduction 5 years ago.
Originally .pin_config_dbg_parse_modify callback and the associated
Hi Gregory,
Gregory CLEMENT wrote on Fri, 18 Jan 2019
17:51:52 +0100:
> Hi Miquel,
>
> On mar., janv. 08 2019, Miquel Raynal wrote:
>
> > Hello,
> >
> > As part of an effort to bring suspend to RAM support to Armada 3700
> > SoCs (main target: ESPRESSObin), this series handles the work
Vignesh,
On 01/20/2019 04:56 PM, tudor.amba...@microchip.com wrote:
> Looks good.
one more thing: in cqspi_read_setup() I see that the dummy cycles are adjusted
if (f_pdata->inst_width != CQSPI_INST_TYPE_QUAD).
Should you adjust the dummy cycles for octo too? I tried to find a datasheet for
the
On 1/19/19 10:36 PM, Pavel Machek wrote:
Hi!
First, I think we want to decide if RGB LED should be presented as
3 LEDs or as 1 LED... and what to do with existing RGB leds being
presented as 3 LEDs.
I don't think we want to support both RGB and HSV in the kernel. It is
math, and not a nice
Dan,
On 1/18/19 2:45 PM, Dan Murphy wrote:
Jacek
On 1/17/19 3:10 PM, Jacek Anaszewski wrote:
Hi Dan,
On 1/16/19 7:41 PM, Dan Murphy wrote:
Hello
On 1/16/19 4:55 AM, Pavel Machek wrote:
Hi!
On 1/15/19 4:22 PM, Pavel Machek wrote:
Hi!
+The 24-bit RGB value passed in follows the pattern
On Wednesday, 16 January 2019 11.26.53 CET Thomas Gleixner wrote:
> The SuperH boot code files use a magic format for the SPDX identifier
> comment:
>
> LIST "SPDX-License-Identifier: "
>
> The trailing quotation mark is not stripped before the token parser is
> invoked and causes the
Hi Linus,
I picked up this include/linux/compiler*.h fix regarding
OPTIMIZER_HIDE_VAR for clang.
It has been in -next for around 10 days.
Cheers,
Miguel
The following changes since commit bfeffd155283772bbe78c6a05dec7c0128ee500c:
Linux 5.0-rc1 (2019-01-06 17:08:20 -0800)
are available in
On Sun, Jan 20, 2019 at 3:43 PM Michael S. Tsirkin wrote:
>
> No not yet. Sorry! Pls send this one in, barrier_data will likely miss
> the next merge window.
No worries! Done.
Cheers,
Miguel
This patchset consist of some initial patches for heading
towards the regmap implementation and also the final patch
which enables the driver to use regmap API thus removing
the redundant and common code.
Changes in v3
-Fetch the changes from remote and rebase to have it in
the current working
Both i2c and spi drivers have functions for reading and writing
to/from registers. Remove this redundant and common code by using
regmap API.
Signed-off-by: Shreeya Patel
---
drivers/staging/iio/addac/adt7316-i2c.c | 56 +++---
drivers/staging/iio/addac/adt7316-spi.c | 74 +++--
Currently, adt7316 doesn't use multi read and multi write
functions hence remove the redundant code and make the
necessary changes in the code.
Signed-off-by: Shreeya Patel
---
drivers/staging/iio/addac/adt7316-i2c.c | 40 -
drivers/staging/iio/addac/adt7316-spi.c | 31
interrupt request is not needed to be present in the bus
structure. It is a good option to pass it as a parameter
in the probe function instead of having it in the bus structure.
Signed-off-by: Shreeya Patel
---
drivers/staging/iio/addac/adt7316-i2c.c | 3 +--
On Sun, 20 Jan 2019 at 02:51, Kees Cook wrote:
>
> On Fri, Jan 18, 2019 at 2:58 AM Ard Biesheuvel
> wrote:
> >
> > A couple of fixes to permit newer versions of GCC to use the stack
> > protector plugin for ARM.
> >
> > Ard Biesheuvel (2):
> > gcc-plugins: arm_ssp_per_task_plugin: sign extend
--
am Dr Kabor Zongo sending this brief letter to for your partnership to
transfer $ 6 million US Dollars. I shall send you more information and
procedures when I receive positive response from you. the fund will be
transfer to you through atm visa card, i have make a proper
arrangement
Hi,
please pull the following branch to obtain a handful of fixes (some of
them in testing for a long time, were briefly mentioned in the 1st
pull):
- fix some test failures regarding cleanup after transaction abort
- revert of a patch that could cause a deadlock
- delayed iput fixes, that can
Hi Linus,
A clang-format update (trivial).
Cheers,
Miguel
The following changes since commit 1c7fc5cbc33980acd13d668f1c8f0313d6ae9fd8:
Linux 5.0-rc2 (2019-01-14 10:41:12 +1200)
are available in the Git repository at:
https://github.com/ojeda/linux.git tags/clang-format-for-linus-v5.0-rc3
On Sat, Jan 19, 2019 at 03:44:48PM -0800, h...@zytor.com wrote:
> On January 19, 2019 3:25:03 PM PST, Joel Fernandes
> wrote:
> >On Sat, Jan 19, 2019 at 12:43:35PM -0500, Daniel Colascione wrote:
> >> On Sat, Jan 19, 2019 at 11:27 AM Joel Fernandes
> > wrote:
> >> >
> >> > On Sat, Jan 19, 2019
On Fri, Jan 18, 2019 at 12:59:06PM -0800, James Bottomley wrote:
> On Fri, 2019-01-18 at 16:33 +0200, Jarkko Sakkinen wrote:
> > On Fri, Jan 11, 2019 at 07:28:58AM -0800, James Bottomley wrote:
> > > On Fri, 2019-01-11 at 16:02 +0200, Jarkko Sakkinen wrote:
> > > > On Tue, Jan 08, 2019 at
Correct, targeting 5.0.
> On Jan 19, 2019, at 5:30 PM, Corey Minyard wrote:
>
> I assume you want this for 5.0., right?
On Fri, Jan 18, 2019 at 02:09:18PM -0800, James Bottomley wrote:
> On Fri, 2019-01-18 at 16:25 +0200, Jarkko Sakkinen wrote:
> > I get this on a Geminilake NUC after rebasing my maintainer trees:
> >
> > tpm tpm0: A TPM error (-1) occurred attempting the self test
> >
> > I checked the latest
Annotation line's percentage is compared and inserted into rbtree, but the
percent field of 'struct annotation_data' is an array, the comparison
result between them is the address difference.
This patch compares the right slot of percent array according to
opts->percent_type and makes things
This patch adds support for the SIOCGHWTSTAMP ioctl which enables user
processes to read the current hwtstamp_config settings
non-destructively.
Signed-off-by: Artem Panfilov
---
drivers/net/ethernet/stmicro/stmmac/stmmac.h | 2 ++
.../net/ethernet/stmicro/stmmac/stmmac_main.c | 36
On Sat, Jan 19, 2019 at 11:01:13PM -0800, h...@zytor.com wrote:
> On January 19, 2019 2:36:06 AM PST, Greg KH
> wrote:
> >On Sat, Jan 19, 2019 at 02:28:00AM -0800, Christoph Hellwig wrote:
> >> This seems like a pretty horrible idea and waste of kernel memory.
> >
> >It's only a waste if you
This patch fixes the checkpatch.pl warning:
WARNING: prefer 'help' over '---help---' for new help texts
Signed-off-by: Bharath Vedartham
---
drivers/staging/netlogic/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/netlogic/Kconfig
This mostly fixes the fallout from the balloon changes.
The following changes since commit 1c7fc5cbc33980acd13d668f1c8f0313d6ae9fd8:
Linux 5.0-rc2 (2019-01-14 10:41:12 +1200)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost.git tags/for_linus
On Sat, Jan 19, 2019 at 10:01 AM Greg Kroah-Hartman
wrote:
>
> On Fri, Jan 18, 2019 at 01:08:02PM -0800, Dan Williams wrote:
> > On Thu, Jan 17, 2019 at 3:41 AM Rafael J. Wysocki wrote:
> > >
> > > On Wed, Jan 16, 2019 at 6:59 PM Keith Busch wrote:
> > > >
> > > > Add entries for memory
On Sat, Jan 19, 2019 at 5:56 PM Dan Williams wrote:
>
> On Sat, Jan 19, 2019 at 1:01 AM Greg Kroah-Hartman
> wrote:
> >
> > On Fri, Jan 18, 2019 at 01:08:02PM -0800, Dan Williams wrote:
> > > On Thu, Jan 17, 2019 at 3:41 AM Rafael J. Wysocki
> > > wrote:
> > > >
> > > > On Wed, Jan 16, 2019 at
Hi Bartosz,
Thank you for the patch.
On 1/18/19 2:42 PM, Bartosz Golaszewski wrote:
From: Bartosz Golaszewski
Add the DT binding document for the LEDs module of max77650.
Signed-off-by: Bartosz Golaszewski
---
.../bindings/leds/leds-max77650.txt | 57 +++
1
Hi Bartosz,
Thank you for the patch.
I have few minor issues below.
On 1/18/19 2:42 PM, Bartosz Golaszewski wrote:
From: Bartosz Golaszewski
This adds basic support for LEDs for the max77650 PMIC. The device has
three current sinks for driving LEDs.
Signed-off-by: Bartosz Golaszewski
---
This patch fixes the checkpatch.pl warning:
WARNING: prefer 'help' over '---help---' for new help texts
Signed-off-by: Bharath Vedartham
---
drivers/staging/wlan-ng/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/wlan-ng/Kconfig
Hi,
On Sun, Jan 20, 2019 at 09:12:26AM +0100, Yang Fan wrote:
> This patchset remove some redundancy in function
> arch_get_unmapped_area_topdown().
>
> [PATCH 1/2] mm/mmap.c: Remove redundant variable 'addr' in
> arch_get_unmapped_area_topdown()
> [PATCH 2/2] mm/mmap.c: Remove redundant const
Base firmware node and clock child node binding are part of mainline kernel.
This patchset adds documentation to describe rest of the firmware child node
bindings.
Complete firmware DT node example is shown below for ease of understanding:
firmware {
zynqmp_firmware: zynqmp-firmware {
From: Rajan Vaja
Add documentation to describe ZynqMP power domain bindings.
Signed-off-by: Rajan Vaja
Signed-off-by: Jolly Shah
Reviewed-by: Rob Herring
---
Changes for v3:
-None.
.../bindings/power/xlnx,zynqmp-genpd.txt | 34
From: Rajan Vaja
Add documentation to describe Xilinx ZynqMP power management
bindings.
Signed-off-by: Rajan Vaja
Signed-off-by: Jolly Shah
Reviewed-by: Rob Herring
---
Changes for v3:
-None.
.../power/reset/xlnx,zynqmp-power.txt | 25 +++
1 file
Add documentation to describe Xilinx ZynqMP fpga driver
bindings.
Signed-off-by: Nava kishore Manne
---
Changes for v3:
-Removed PCAP as a child node to the FW and Created
an independent node since PCAP driver is a consumer
not a provider.
The port is a child, not a property. And it deserves an example.
Also, make the title a bit more visually distinguishable -- this will
look better when the documentation of other Adrmada DRM nodes will be
present.
Signed-off-by: Lubomir Rintel
---
.../display/armada/marvell-armada-drm.txt
The driver will work on a MMP2 as well.
Signed-off-by: Lubomir Rintel
---
.../bindings/display/armada/marvell-armada-drm.txt | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git
a/Documentation/devicetree/bindings/display/armada/marvell-armada-drm.txt
Add documentation to describe Xilinx ZynqMP nvmem driver
bindings.
Signed-off-by: Nava kishore Manne
---
Changes for v3:
-Added nvmem node as child of FW. Since nvmem driver is a
provider.
.../bindings/nvmem/xlnx,zynqmp-nvmem.txt | 47 +++
1 file
It's going to document more than just marvell,dove-lcd: more components
of the display subsystems with more compatible strings.
It seems to make sense to organize this the way it is done in
Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt
Signed-off-by: Lubomir Rintel
---
Add documentation to describe Xilinx ZynqMP reset driver
bindings.
Signed-off-by: Nava kishore Manne
Signed-off-by: Jolly Shah
---
Changes for v3:
-Moved reset outputs definitions info into
a header file(xlnx-zynqmp-resets.h).
This is the binding for memory that is set aside for allocation of Marvell
Armada framebuffer objects.
Signed-off-by: Lubomir Rintel
---
.../display/armada/marvell-armada-drm.txt | 25 +++
1 file changed, 25 insertions(+)
diff --git
This makes it possible to choose a different pixel format for the
endpoint. Modelled after what other LCD controllers use, including
marvell,pxa2xx-lcdc and atmel,hlcdc-display-controller and perhaps more.
Signed-off-by: Lubomir Rintel
---
.../bindings/display/armada/marvell-armada-drm.txt
The Marvell Armada DRM master device is a virtual device needed to list all
nodes that comprise the graphics subsystem.
Signed-off-by: Lubomir Rintel
---
.../display/armada/marvell-armada-drm.txt | 24 +++
1 file changed, 24 insertions(+)
diff --git
From: Rajan Vaja
Add documentation to describe Xilinx ZynqMP pin controller
bindings.
Signed-off-by: Rajan Vaja
Signed-off-by: Jolly Shah
Reviewed-by: Rob Herring
---
Changes for v3:
-None.
.../bindings/pinctrl/xlnx,zynqmp-pinctrl.txt | 275 ++
1 file
Hi,
this patch set extends the bindings documentation of Armada LCDC to
cover the rest of the display subsystem.
It is based on what was implemented by Russel's patch set that
implements the dt bindings for armada-drm [1].
[1]
On Sun, Jan 20, 2019 at 8:20 AM Rafael J. Wysocki wrote:
>
> On Sat, Jan 19, 2019 at 5:56 PM Dan Williams wrote:
> >
> > On Sat, Jan 19, 2019 at 1:01 AM Greg Kroah-Hartman
> > wrote:
> > >
> > > On Fri, Jan 18, 2019 at 01:08:02PM -0800, Dan Williams wrote:
> > > > On Thu, Jan 17, 2019 at 3:41
From: Rajan Vaja
Add documentation to describe ZynqMP power domain bindings.
Signed-off-by: Rajan Vaja
Signed-off-by: Jolly Shah
Reviewed-by: Rob Herring
---
Changes for v3:
-None.
.../bindings/power/xlnx,zynqmp-genpd.txt | 34
From: Rajan Vaja
Add documentation to describe Xilinx ZynqMP pin controller
bindings.
Signed-off-by: Rajan Vaja
Signed-off-by: Jolly Shah
Reviewed-by: Rob Herring
---
Changes for v3:
-None.
.../bindings/pinctrl/xlnx,zynqmp-pinctrl.txt | 275 ++
1 file
Add documentation to describe Xilinx ZynqMP reset driver
bindings.
Signed-off-by: Nava kishore Manne
Signed-off-by: Jolly Shah
---
Changes for v3:
-Moved reset outputs definitions info into
a header file(xlnx-zynqmp-resets.h).
Add documentation to describe Xilinx ZynqMP nvmem driver
bindings.
Signed-off-by: Nava kishore Manne
---
Changes for v3:
-Added nvmem node as child of FW. Since nvmem driver is a
provider.
.../bindings/nvmem/xlnx,zynqmp-nvmem.txt | 47 +++
1 file
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