On 1/29/19 11:14 PM, John Hubbard wrote:
On 1/29/19 12:29 PM, Yang Shi wrote:
ksmd need search stable tree to look for the suitable KSM page, but the
KSM page might be locked for a while due to i.e. KSM page rmap walk.
Basically it is not a big deal since commit 2c653d0ee2ae
("ksm: introduce
Currently I am managing the Synopsys drivers & tools team (full-time) and
so I am passing the DWC UFS driver maintenance to Pedro Sousa.
Signed-off-by: Joao Pinto
Cc: Pedro Sousa
Cc: Marc Gonzalez
Cc: Alex Lemberg
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
Hi,
I would like to propose the following topic for the MM track. Different
group of people would like to use NVIDMMs as a low cost & slower memory
which is presented to the system as a NUMA node. We do have a NUMA API
but it doesn't really fit to "balance the memory between nodes" needs.
People
The current AP bus implementation periodically polls the AP configuration
to detect changes. When the AP configuration is dynamically changed via the
SE or an SCLP instruction, the changes will not be reflected to sysfs until
the next time the AP configuration is polled. The CHSC architecture
On Wed, Jan 30, 2019 at 06:41:17PM +0100, Michal Hocko wrote:
> But we are discussing the file name effectively. I do not see a long
> term maintenance burden. Confusing? Probably yes but that is were the
Cost on user side.
> documentation would be helpful.
which is an a lot worse option with
On Wed, 2019-01-30 at 18:48 +0100, Joao Pinto wrote:
> Currently I am managing the Synopsys drivers & tools team (full-time) and
> so I am passing the DWC UFS driver maintenance to Pedro Sousa.
>
> Signed-off-by: Joao Pinto
> Cc: Pedro Sousa
> Cc: Marc Gonzalez
> Cc: Alex Lemberg
> ---
>
On Tue, Dec 04, 2018 at 05:55:26PM +0100, Stefan Agner wrote:
> Add length to the struct dw_pcie and check that the accessors
> dw_pcie_(rd|wr)_conf() do not read/write beyond that point.
>
> Suggested-by: Trent Piepho
> Signed-off-by: Stefan Agner
> ---
> Changes in v4:
> - Move length check
On 30/01/2019 08:24, Jason Yan wrote:
The work flow of revalidation now is scanning expander phy by the
sequence of the phy and check if the phy have changed. This will leads
to an issue of swapping two sas disks on one expander.
Assume we have two sas disks, connected with expander phy10 and
Do you need to make white background for your photos?
Adding clipping path, or retouching?
We can do it for you.
Let's start with testing for your photos.
Thanks,
Jane
On Wed, 30 Jan 2019, Thomas Gleixner wrote:
> On Wed, 30 Jan 2019, Thomas Gleixner wrote:
> The last entries with that uaddr are:
>
> <...>-56956 [005] 658.923608: sys_futex(uaddr: 3ff9e880140,
> op: 7, val: 3ff0007, utime: 3ff9b078910, uaddr2: 3ff9b078910, val3:
>
On Wed, 30 Jan 2019, Waiman Long wrote:
> On 01/30/2019 07:31 AM, Thomas Gleixner wrote:
> > --- a/include/linux/irqdesc.h
> > +++ b/include/linux/irqdesc.h
> > @@ -65,9 +65,10 @@ struct irq_desc {
> > unsigned intcore_internal_state__do_not_mess_with_it;
> > unsigned int
I have a good faith belief that use of the copyrighted materials
described above on the infringing web pages is not authorized by the
copyright owner, or its agent, or the law. I have taken fair use into
consideration.
I swear, under penalty of perjury, that the information in this
On Wed, Jan 30, 2019 at 07:35:39AM -0600, Eric W. Biederman wrote:
> I suspect that as long as userspace supports /etc/fstab and we in turn
> support /proc/mounts there is going to be a lot of pressure to keep
> the majority of options so they can be encoded in a string separated by
> commas.
>
> On Tue, Jan 29, 2019 at 10:50:05AM -0800, Ira Weiny wrote:
> > > .. and I'm looking at some of the other conversions here.. *most
> > > likely* any caller that is manipulating rlimit for get_user_pages
> > > should really be calling get_user_pages_longterm, so they should not
> > > be
On Fri, 25 Jan 2019 12:07:00 -0600
Jeremy Linton wrote:
Hi,
> For a while Arm64 has been capable of force enabling
> or disabling the kpti mitigations. Lets make sure the
> documentation reflects that.
>
> Signed-off-by: Jeremy Linton
> Cc: Jonathan Corbet
> Cc: linux-...@vger.kernel.org
>
On Fri, 25 Jan 2019 12:07:01 -0600
Jeremy Linton wrote:
Hi,
> There are various reasons, including bencmarking, to disable spectrev2
> mitigation on a machine. Provide a command-line to do so.
>
> Signed-off-by: Jeremy Linton
> Cc: Jonathan Corbet
> Cc: linux-...@vger.kernel.org
On 1/29/19, 7:27 PM, "Joel Stanley" wrote:
On Thu, 24 Jan 2019 at 10:07, Vijay Khemka wrote:
> index 73e58a821613..d60dbb019f82 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
>
>
- On Jan 29, 2019, at 9:40 PM, Joseph Myers jos...@codesourcery.com wrote:
> On Tue, 29 Jan 2019, Mathieu Desnoyers wrote:
>
>> My thinking was to put the #error in the generic header, so architectures
>> that
>> are not supported yet cannot build against rseq.h at all, so we don't end up
On Fri, 25 Jan 2019 12:07:03 -0600
Jeremy Linton wrote:
> Buried behind EXPERT is the ability to build a kernel without
> hardened branch predictors, this needlessly clutters up the
> code as well as creates the opportunity for bugs. It also
> removes the kernel's ability to determine if the
On Fri, 25 Jan 2019 12:07:02 -0600
Jeremy Linton wrote:
Hi,
> Buried behind EXPERT is the ability to build a kernel without
> SSBD, this needlessly clutters up the code as well as creates
> the opportunity for bugs. It also removes the kernel's ability
> to determine if the machine its running
On Fri, 25 Jan 2019 12:07:04 -0600
Jeremy Linton wrote:
> Buried behind EXPERT is the ability to build a kernel without
> hardened branch predictors, this needlessly clutters up the
> code as well as creates the opportunity for bugs. It also
> removes the kernel's ability to determine if the
On Wed, Jan 30, 2019 at 06:26:53PM +0100, Christoph Hellwig wrote:
> On Wed, Jan 30, 2019 at 10:55:43AM -0500, Jerome Glisse wrote:
> > Even outside GPU driver, device driver like RDMA just want to share their
> > doorbell to other device and they do not want to see those doorbell page
> > use in
On Wed, 30 Jan 2019, Liu Xiang wrote:
> --- a/arch/x86/mm/iomap_32.c
> +++ b/arch/x86/mm/iomap_32.c
> @@ -1,19 +1,7 @@
> +// SPDX-License-Identifier: GPL-2.0
This is wrong.
> /*
> * Copyright © 2008 Ingo Molnar
> *
> - * This program is free software; you can redistribute it and/or modify
>
I have a good faith belief that use of the copyrighted materials
described above on the infringing web pages is not authorized by the
copyright owner, or its agent, or the law. I have taken fair use into
consideration.
I swear, under penalty of perjury, that the information in this
On Wed, Jan 30, 2019 at 05:38:17PM +0100, Andrew Lunn wrote:
> On Wed, Jan 30, 2019 at 02:48:27PM +, Carlos Henrique Lima Melara wrote:
> > This patch fix the checkpatch.p1 warning:
> >
> > WARNING: Missing or malformed SPDX-License-Identifier tag in line 1
> > +/*
> >
> > It
From: YueHaibing
Date: Wed, 30 Jan 2019 18:19:02 +0800
> There is a potential NULL pointer dereference in case
> kzalloc() fails and returns NULL.
>
> Fixes: 69f52adb2d53 ("mISDN: Add HFC USB driver")
> Signed-off-by: YueHaibing
> ---
> drivers/isdn/hardware/mISDN/hfcsusb.c | 2 ++
> 1 file
On Wed, Jan 30, 2019 at 06:45:38PM +0100, SandeshKa07 wrote:
> From: Sandesh Kenjana Ashok
>
> Lines over 80 characters are adjusted according to standards
>
> Signed-off-by: Sandesh Kenjana Ashok
> ---
> drivers/staging/wlan-ng/cfg80211.c | 17 +
> 1 file changed, 9
On 1/30/19 10:40 AM, Joerg Roedel wrote:
> Hi,
>
> here is the next version of this patch-set. Previous
> versions can be found here:
>
> V1: https://lore.kernel.org/lkml/20190110134433.15672-1-j...@8bytes.org/
>
> V2:
On Wed, Jan 30, 2019 at 06:48:47PM +0100, Michal Hocko wrote:
> Hi,
> I would like to propose the following topic for the MM track. Different
> group of people would like to use NVIDMMs as a low cost & slower memory
> which is presented to the system as a NUMA node. We do have a NUMA API
> but it
On 2019-01-30 10:44 a.m., Jason Gunthorpe wrote:
> I don't see why a special case with a VMA is really that different.
Well one *really* big difference is the VMA changes necessarily expose
specialized new functionality to userspace which has to be supported
forever and may be difficult to
On 1/30/19 9:47 AM, Yang Shi wrote:
[...]
>>> @@ -1673,7 +1688,12 @@ static struct page *stable_tree_search(struct page
>>> *page)
>>> * It would be more elegant to return stable_node
>>> * than kpage, but that involves more changes.
>>> */
>>> -
Enabling vuart for Facebook tiogapass
Signed-off-by: Vijay Khemka
---
arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
b/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
index
On Wed 30-01-19 09:52:22, Tejun Heo wrote:
> On Wed, Jan 30, 2019 at 06:41:17PM +0100, Michal Hocko wrote:
> > But we are discussing the file name effectively. I do not see a long
> > term maintenance burden. Confusing? Probably yes but that is were the
>
> Cost on user side.
>
> > documentation
Martin Kepplinger | Entwicklung Software
GINZINGER ELECTRONIC SYSTEMS GMBH
Tel.: +43 7723 5422 157
Mail: martin.kepplin...@ginzinger.com
Web: www.ginzinger.com
On 30.01.19 18:25, Jonathan Neuschäfer wrote:
Recently, Free Electrons was renamed to Bootlin[1]. Less recently, the
Linux
Fix the IPv4 address of the dummy0 interface and ensure that ip_forward
is enabled in the network space to get a valid response when checking
for routes between the gateway and other hosts.
Signed-off-by: Marcelo Henrique Cerri
---
tools/testing/selftests/net/fib_rule_tests.sh | 4 +++-
1 file
> -Original Message-
> From: Intel-wired-lan [mailto:intel-wired-lan-boun...@osuosl.org] On
> Behalf Of Nathan Chancellor
> Sent: Wednesday, January 9, 2019 8:22 PM
> To: Kirsher, Jeffrey T
> Cc: net...@vger.kernel.org; Nick Desaulniers ;
> linux-kernel@vger.kernel.org; Miguel Ojeda
> ;
Hi Greg,
On Tue, Jan 22, 2019 at 03:41:11PM +0100, Greg Kroah-Hartman wrote:
> When calling debugfs functions, there is no need to ever check the
> return value. The function can work or not, but the code logic should
> never do something different based on this.
>
> Cc: Catalin Marinas
> Cc:
[+Suzuki and Robin]
On Mon, Jan 28, 2019 at 07:19:20AM +, Li, Meng wrote:
> When enable kernel configure CONFIG_DEBUG_ATOMIC_SLEEP, there is below trace
> during pmu arm cci driver probe phase.
>
> [ 1.983337] BUG: sleeping function called from invalid context at
>
On Wed, 30 Jan 2019, Rusty Russell wrote:
> Thanks taking on such a thankless task Thomas,
>
> Might have been overzealous in assuming a verionless GPL string meant
> "or later" (I'm happy for that for my own code, FWIW). My memory is
> fuzzy, but I don't think anyone cared at the time.
>
>
On Mon, Jan 28, 2019 at 05:43:01PM +0800, Nicolas Boichat wrote:
> L1 tables are allocated with __get_dma_pages, and therefore already
> ignored by kmemleak.
>
> Without this, the kernel would print this error message on boot,
> when the first L1 table is allocated:
>
> [2.810533] kmemleak:
On Wed, Jan 30, 2019 at 09:43:21AM +0100, Anders Roxell wrote:
> On 2019-01-25 16:57, Lucas Stach wrote:
> > Am Freitag, den 25.01.2019, 14:32 + schrieb Catalin Marinas:
> > > On Tue, Jan 15, 2019 at 08:18:39PM +0100, Anders Roxell wrote:
> > > > When ARCH_MXC get enabled, ARM64_ERRATUM_845719
Hi Jann,
On Wed, Jan 30, 2019 at 05:32:00PM +0100, Jann Horn wrote:
> At the moment, compat tasks running on ARM64 can allocate memory up to
> 0x1 (TASK_SIZE_32). Testing on an Android device (with an
> admittedly somewhat old kernel):
[...]
> 1000-1 rw-p 00:00 0
>
On Mon, Dec 31, 2018 at 7:57 PM Yong Wu wrote:
>
> The config_port of mt2712 and mt8183 are the same. Use a general
> config_port interface instead.
>
> In addition, in mt2712, larb8 and larb9 are the bdpsys larbs which
> are not the normal larb, their register space are different from the
>
On Mon, Dec 31, 2018 at 7:57 PM Yong Wu wrote:
>
> Add two helper functions: paddr_to_iopte and iopte_to_paddr.
>
> Signed-off-by: Yong Wu
> Reviewed-by: Robin Murphy
Reviewed-by: Evan Green
On Tue, Jan 29, 2019 at 10:49 PM Mike Rapoport wrote:
>
> On Tue, Jan 29, 2019 at 09:02:16PM -0800, Dan Williams wrote:
> > Randomization of the page allocator improves the average utilization of
> > a direct-mapped memory-side-cache. Memory side caching is a platform
> > capability that Linux
Add a documentation of LED Multicolor LED class specific
sysfs attributes.
Signed-off-by: Dan Murphy
---
.../ABI/testing/sysfs-class-led-multicolor| 38 +++
1 file changed, 38 insertions(+)
create mode 100644 Documentation/ABI/testing/sysfs-class-led-multicolor
diff --git
Commit-ID: b284909abad48b07d3071a9fc9b5692b3e64914b
Gitweb: https://git.kernel.org/tip/b284909abad48b07d3071a9fc9b5692b3e64914b
Author: Josh Poimboeuf
AuthorDate: Wed, 30 Jan 2019 07:13:58 -0600
Committer: Thomas Gleixner
CommitDate: Wed, 30 Jan 2019 19:27:00 +0100
cpu/hotplug: Fix
On Wed, 30 Jan 2019, Tony Krowiak wrote:
> +#if IS_ENABLED(CONFIG_ZCRYPT)
> +void ap_bus_cfg_chg(void);
> +#else
> +#error "no CONFIG_ZCRYPT"
^
I don't think that's the right thing to do here.
> +++ b/drivers/s390/cio/chsc.h
> @@ -9,6 +9,7 @@
> #include
> #include
> #include
> +#include
On Mon, Dec 31, 2018 at 7:57 PM Yong Wu wrote:
>
> Use a struct as the platform special data instead of the enumeration.
>
> Also there is a minor change that moving the position of
> "enum mtk_smi_gen" definition, this is because we expect define
> "struct mtk_smi_common_plat" before it is
On Mon, Dec 31, 2018 at 7:57 PM Yong Wu wrote:
>
> MediaTek extend the arm v7s descriptor to support the dram over 4GB.
>
> In the mt2712 and mt8173, it's called "4GB mode", the physical address
> is from 0x4000_ to 0x1_3fff_, but from EMI point of view, it
> is remapped to high address
On Mon, Dec 31, 2018 at 7:56 PM Yong Wu wrote:
>
> Use a struct as the platform special data instead of the enumeration.
> This is a prepare patch for adding mt8183 iommu support.
>
> Signed-off-by: Yong Wu
> Reviewed-by: Matthias Brugger
Reviewed-by: Evan Green
On Wed, Jan 30, 2019 at 05:40:02PM +0100, Joerg Roedel wrote:
> Hi,
>
> here is the next version of this patch-set. Previous
> versions can be found here:
>
> V1: https://lore.kernel.org/lkml/20190110134433.15672-1-j...@8bytes.org/
>
> V2:
On Mon, Dec 31, 2018 at 7:56 PM Yong Wu wrote:
>
> This patch adds decriptions for mt8183 IOMMU and SMI.
>
> mt8183 has only one M4U like mt8173 and is also MTK IOMMU gen2 which
> uses ARM Short-Descriptor translation table format.
>
> The mt8183 M4U-SMI HW diagram is as below:
>
>
On Mon, Dec 31, 2018 at 7:57 PM Yong Wu wrote:
>
> In some SoCs, M4U doesn't have its "bclk", it will use the EMI
> clock instead which has always been enabled when entering kernel.
>
> This also is a preparing patch for mt8183.
>
> Signed-off-by: Yong Wu
Reviewed-by: Evan Green
On Wed, Jan 30, 2019 at 09:25:21AM -0800, Dan Williams wrote:
> On Tue, Jan 29, 2019 at 7:03 PM Jerome Glisse wrote:
> [..]
> > > > 1) Convert ODP to use HMM underneath so that we share code between
> > > > infiniband ODP and GPU drivers. ODP do support DAX today so i can
> > > > not
On Mon, Dec 31, 2018 at 7:58 PM Yong Wu wrote:
>
> The larb-id may be remapped in the smi-common, this means the
> larb-id reported in the mtk_iommu_isr isn't the real larb-id,
>
> Take mt8183 as a example:
>M4U
> |
>
On Fri, Jan 25, 2019 at 12:16:27PM +0530, Ravi Bangoria wrote:
SNIP
> [ 1432.176374] general protection fault: [#1] SMP PTI
> [ 1432.182253] CPU: 1 PID: 0 Comm: swapper/1 Tainted: GW
> 5.0.0-rc3-ravi-pfuzzer+ #1
>
On Mon, Dec 31, 2018 at 7:58 PM Yong Wu wrote:
>
> Both mt8173 and mt8183 don't have this vld_pa_rng(valid physical address
> range) register while mt2712 have. Move it into the plat_data.
>
> Signed-off-by: Yong Wu
> ---
> drivers/iommu/mtk_iommu.c | 3 ++-
> drivers/iommu/mtk_iommu.h | 1 +
>
On Mon, Dec 31, 2018 at 7:58 PM Yong Wu wrote:
>
> In mt8173 and mt8183, 0x48 is REG_MMU_STANDARD_AXI_MODE while
> it is extended to REG_MMU_CTRL which contains _STANDARD_AXI_MODE in
> the other SoCs. I move this property to plat_data since both mt8173
> and mt8183 use this property.
>
> It is a
On Tue, Jan 29, 2019 at 12:43:58AM +0530, Sai Prakash Ranjan wrote:
> Add coresight components found on Qualcomm SDM845 SoC.
>
> Signed-off-by: Sai Prakash Ranjan
>
> ---
> Depends on AOSS QMP side channel patches and AMBA bus pclk change
> by Bjorn Andersson [1][2].
> Also depends on patch
On 01/30/2019 01:35 PM, Linus Torvalds wrote:
> On Wed, Jan 30, 2019 at 8:40 AM Waiman Long wrote:
>> Ping. Will this patch be picked up?
> Can you re-send the patch-set and I'll just apply it directly since it
> seems to be languishing otherwise.
>
> Linus
Sure.
Thanks for your
On Wed, Jan 30, 2019 at 8:40 AM Waiman Long wrote:
>
> Ping. Will this patch be picked up?
Can you re-send the patch-set and I'll just apply it directly since it
seems to be languishing otherwise.
Linus
The test_insert_dup() function from lib/test_rhashtable.c passes a
pointer to a stack object to rhltable_init(). Allocate the hash table
dynamically to avoid that the following is reported with object
debugging enabled:
ODEBUG: object (ptrval) is on stack (ptrval), but NOT annotated.
WARNING:
On Tue, 29 Jan 2019 01:03:49 +0800, Zhou Yanjie wrote:
> Add the serial bindings for the X1000 Soc from Ingenic.
>
> Signed-off-by: Zhou Yanjie
> ---
> Documentation/devicetree/bindings/serial/ingenic,uart.txt | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
Reviewed-by: Rob
> See the patch about all of this from Thomas on lkml yesterday for
> why this is the case.
Hi Greg
Thanks for the info. I had not seen this, and i guess other have not
as well. So here is a link to the patch.
https://lkml.org/lkml/2019/1/28/1975
Andrew
See http://www.uefi.org/RFIC_LIST ("Virtual NVDIMM 0x1901"):
"Get Unsafe Shutdown Count (Function Index 2)".
Let's expose the info to the userspace (e.g. ntctl) via sysfs.
Signed-off-by: Dexuan Cui
---
drivers/acpi/nfit/core.c | 51 ++
On Tue, 29 Jan 2019 08:10:49 +, "Z.q. Hou" wrote:
> From: Hou Zhiqiang
>
> Add PCIe Gen4 controller DT bindings of NXP Layerscape SoCs.
>
> Signed-off-by: Hou Zhiqiang
> ---
> V3:
> - Change back to use an new doc for Layerscape PCIe Gen4 DT bindings.
> - Switch the order of
On Wed, Jan 30, 2019 at 2:55 PM Naresh Kamboju
wrote:
>
> On Tue, 29 Jan 2019 at 17:19, Greg Kroah-Hartman
> wrote:
> >
> > This is the start of the stable review cycle for the 4.14.97 release.
> > There are 68 patches in this series, all will be posted as a response
> > to this one. If anyone
This set adds USB SS PHY support to Qualcomm's QCS404 SoC
The PHY is implemented using Synopsys' SS PHY IP
The code is losely based on Sriharsha Allenki's
original implementation.
v2:
enable OTG mode detection
move vdd voltage levels to driver
use bulk_ control interfaces
Controls Qualcomm's SS phy 1.0.0 implemented in the QCS404 and some
other Qualcomm platforms.
Based on Sriharsha Allenki's original code.
Signed-off-by: Jorge Ramirez-Ortiz
---
drivers/phy/qualcomm/Kconfig | 11 +
drivers/phy/qualcomm/Makefile | 1 +
Binding description for Qualcomm's 1.0.0 SuperSpeed phy controller
embedded in QCS404.
Based on Sriharsha Allenki's original
definitions.
Signed-off-by: Jorge Ramirez-Ortiz
---
.../bindings/usb/qcom,usb-ssphy.txt | 74 +++
1 file changed, 74 insertions(+)
create
On Wed, Jan 30, 2019 at 11:13:11AM -0700, Logan Gunthorpe wrote:
>
>
> On 2019-01-30 10:44 a.m., Jason Gunthorpe wrote:
> > I don't see why a special case with a VMA is really that different.
>
> Well one *really* big difference is the VMA changes necessarily expose
> specialized new
The current dentry number tracking code doesn't distinguish between
positive & negative dentries. It just reports the total number of
dentries in the LRU lists.
As excessive number of negative dentries can have an impact on system
performance, it will be wise to track the number of positive and
The list_lru structure is essentially just a pointer to a table of
per-node LRU lists. Even if CONFIG_MEMCG_KMEM is defined, the list
field is just used for LRU list registration and shrinker_id is set
at initialization. Those fields won't need to be touched that often.
So there is no point to
v3->v4:
- Drop patch 4 as it is just a minor optimization.
- Add a cc:stable tag to patch 1.
- Clean up some comments in patch 3.
v2->v3:
- With confirmation that the dummy array in dentry_stat structure
was never a replacement of a previously used field, patch 3 is now
reverted
The nr_dentry_unused per-cpu counter tracks dentries in both the
LRU lists and the shrink lists where the DCACHE_LRU_LIST bit is set.
The shrink_dcache_sb() function moves dentries from the LRU list to a
shrink list and subtracts the dentry count from nr_dentry_unused. This
is incorrect as the
Hello,
syzbot found the following crash on:
HEAD commit:02495e76ded5 Add linux-next specific files for 20190130
git tree: linux-next
console output: https://syzkaller.appspot.com/x/log.txt?x=172ed528c0
kernel config: https://syzkaller.appspot.com/x/.config?x=a2b2e9c0bc43c14d
On Wed, Jan 30, 2019 at 11:09:55AM +0200, Matti Vaittinen wrote:
> Document bindings for regulators (3 bucks, 3 LDOs and 2 LED
> drivers) and 4 GPIO pins which can be configured for I/O or
> as interrupt sources withe configurable trigger levels.
>
> Signed-off-by: Matti Vaittinen
> ---
>
On Tue, Jan 29, 2019 at 02:35:44PM +0100, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski
>
> Add support for the push- and slide-button events for max77650.
>
> Signed-off-by: Bartosz Golaszewski
Acked-by: Dmitry Torokhov
Please feel free to merge with other patches (MFD tree I
Hello,
syzbot found the following crash on:
HEAD commit:02495e76ded5 Add linux-next specific files for 20190130
git tree: linux-next
console output: https://syzkaller.appspot.com/x/log.txt?x=12cf10df40
kernel config: https://syzkaller.appspot.com/x/.config?x=a2b2e9c0bc43c14d
Hello,
syzbot found the following crash on:
HEAD commit:02495e76ded5 Add linux-next specific files for 20190130
git tree: linux-next
console output: https://syzkaller.appspot.com/x/log.txt?x=16a00c2f40
kernel config: https://syzkaller.appspot.com/x/.config?x=a2b2e9c0bc43c14d
On Mon, Dec 31, 2018 at 7:58 PM Yong Wu wrote:
>
> The protect memory setting is a little different in the different SoCs.
> In the register REG_MMU_CTRL_REG(0x110), the TF_PROT(translation fault
> protect) shift bit is normally 4 while it shift 5 bits only in the
> mt8173. This patch delete the
On Wed, 23 Jan 2019 14:11:29 -0800, Evan Green wrote:
> Enable Qualcomm UFS controllers to expose the PHY reset via a reset
> controller.
>
> Signed-off-by: Evan Green
>
> ---
> Fixing up this aspect of it made me notice that this patch [1]
> hasn't landed yet. It really ought to.
>
> [1]
>
On Wed, Jan 30, 2019 at 10:49 AM Dexuan Cui wrote:
>
>
> See http://www.uefi.org/RFIC_LIST ("Virtual NVDIMM 0x1901"):
> "Get Unsafe Shutdown Count (Function Index 2)".
>
> Let's expose the info to the userspace (e.g. ntctl) via sysfs.
>
> Signed-off-by: Dexuan Cui
> ---
>
On Wed, Jan 30, 2019 at 10:17:27AM -0700, Logan Gunthorpe wrote:
>
>
> On 2019-01-29 9:18 p.m., Jason Gunthorpe wrote:
> > Every attempt to give BAR memory to struct page has run into major
> > trouble, IMHO, so I like that this approach avoids that.
> >
> > And if you don't have struct page
On Mon, Dec 31, 2018 at 7:59 PM Yong Wu wrote:
>
> The M4U IP blocks in mt8183 is MediaTek's generation2 M4U which use
> the ARM Short-descriptor like mt8173, and most of the HW registers
> are the same.
>
> Here list main differences between mt8183 and mt8173/mt2712:
> 1) mt8183 has only one M4U
On Mon, Dec 31, 2018 at 7:58 PM Yong Wu wrote:
>
> In some SoCs like mt8183, SMI add GALS(Global Async Local Sync) module
> which can help synchronize for the modules in different clock frequency.
> It can be seen as a "asynchronous fifo". This is a example diagram:
>
> M4U
>
On Mon, Dec 31, 2018 at 7:59 PM Yong Wu wrote:
>
> Normally the M4U HW connect EMI with smi. the diagram is like below:
> EMI
>|
> M4U
>|
> smi-common
>|
>-
>||| |
On Mon, 12 Nov 2018 14:44:57 +0800
Lu Baolu wrote:
> This adds APIs for IOMMU drivers and device drivers to manage
> the PASIDs used for DMA transfer and translation. It bases on
> I/O ASID allocator for PASID namespace management and relies
> on vendor specific IOMMU drivers for paravirtual
On Mon, Dec 31, 2018 at 7:59 PM Yong Wu wrote:
>
> This patch only move the clk_prepare_enable and config_port into the
> runtime suspend/resume callback. It doesn't change the code content
> and sequence.
>
> This is a preparing patch for adjusting SMI_BUS_SEL for mt8183.
> (SMI_BUS_SEL need to
Hi Quentin,
On Wed, Jan 30, 2019 at 05:05:02PM +, Quentin Perret wrote:
> The Energy Model (EM) framework provides an API to let drivers register
> the active power of CPUs. The drivers are expected to provide a callback
> method which estimates the power consumed by a CPU at each available
>
On Wed, Jan 30, 2019 at 09:00:06AM +0100, Christoph Hellwig wrote:
> On Wed, Jan 30, 2019 at 04:18:48AM +, Jason Gunthorpe wrote:
> > Every attempt to give BAR memory to struct page has run into major
> > trouble, IMHO, so I like that this approach avoids that.
>
> Way less problems than not
On Tue 29-01-19 21:02:16, Dan Williams wrote:
> Randomization of the page allocator improves the average utilization of
> a direct-mapped memory-side-cache. Memory side caching is a platform
> capability that Linux has been previously exposed to in HPC
> (high-performance computing) environments
On Mon, Dec 31, 2018 at 7:59 PM Yong Wu wrote:
>
> There are 2 mmu cells in a M4U HW. we could adjust some larbs entering
> mmu0 or mmu1 to balance the bandwidth via the smi-common register
> SMI_BUS_SEL(0x220)(Each larb occupy 2 bits).
>
> In mt8183, For better performance, we switch larb1/2/5/7
On 2019-01-30 6:21 pm, Will Deacon wrote:
[+Suzuki and Robin]
On Mon, Jan 28, 2019 at 07:19:20AM +, Li, Meng wrote:
When enable kernel configure CONFIG_DEBUG_ATOMIC_SLEEP, there is below trace
during pmu arm cci driver probe phase.
[ 1.983337] BUG: sleeping function called from invalid
On Tue 29-01-19 21:02:26, Dan Williams wrote:
> When freeing a page with an order >= shuffle_page_order randomly select
> the front or back of the list for insertion.
>
> While the mm tries to defragment physical pages into huge pages this can
> tend to make the page allocator more predictable
Hi Tejun,
On Wed, Jan 30, 2019 at 9:07 AM Tejun Heo wrote:
>
> Hello, Michal.
>
> On Wed, Jan 30, 2019 at 05:50:58PM +0100, Michal Hocko wrote:
> > > Yeah, cgroup.events and .stat files as some of the local stats would
> > > be useful too, so if we don't flip memory.events we'll end up with sth
Hello Bart,
First of all thanks for the feedback.
On 1/30/2019 5:54 PM, Bart Van Assche wrote:
> On Wed, 2019-01-30 at 18:48 +0100, Joao Pinto wrote:
>> Currently I am managing the Synopsys drivers & tools team (full-time) and
>> so I am passing the DWC UFS driver maintenance to Pedro Sousa.
>>
On Mon, Dec 31, 2018 at 8:00 PM Yong Wu wrote:
>
> Switch to SPDX license identifier for MediaTek iommu/smi and their
> header files.
>
> Signed-off-by: Yong Wu
> Reviewed-by: Rob Herring
Reviewed-by: Evan Green
On Wed, Jan 30, 2019 at 11:13:11AM -0700, Logan Gunthorpe wrote:
>
>
> On 2019-01-30 10:44 a.m., Jason Gunthorpe wrote:
> > I don't see why a special case with a VMA is really that different.
>
> Well one *really* big difference is the VMA changes necessarily expose
> specialized new
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