On 07.06.19 13:35, Geert Uytterhoeven wrote:
> Signed-off-by: Geert Uytterhoeven
> ---
> mm/balloon_compaction.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/mm/balloon_compaction.c b/mm/balloon_compaction.c
> index ba739b76e6c52e55..17ac81d8d26bcb50 100644
> --- a/mm
On Tue, Jun 11, 2019 at 10:12 AM Johannes Berg
wrote:
> > As I've made clear before, my work on this has been focused on the IPA
> > transport,
> > and some of this higher-level LTE architecture is new to me. But it
> > seems pretty clear that an abstracted WWAN subsystem is a good plan,
> > be
On Tue, Jun 11, 2019 at 10:03:07AM +0200, Peter Zijlstra wrote:
> On Fri, Jun 07, 2019 at 11:10:19AM -0700, Andy Lutomirski wrote:
> > I am surely missing some kprobe context, but is it really safe to use
> > this mechanism to replace more than one instruction?
>
> I'm not entirely up-to-scratch
Hi Wei Yang
>On Sun, Jun 09, 2019 at 05:10:28PM +0800, ChenGang wrote:
>>Usually the value of min_free_kbytes is multiply of 4, and in this case
>>,the right shift is ok.
>>But if it's not, the right-shifting operation will lose the low 2 bits,
>But PAGE_SHIFT is not always 12.
You are
On Tue, Jun 11, 2019 at 01:42:34PM +0200, Benjamin Gaignard wrote:
> Le mer. 24 avr. 2019 à 09:25, Benjamin Gaignard
> a écrit :
> >
> > Le mar. 23 avr. 2019 à 19:46, Fabio Estevam a écrit :
> > >
> > > On Wed, Feb 27, 2019 at 1:21 PM Alexandre Torgue
> > > wrote:
> > > >
> > > >
> > > > On 2/14
On Tue, 11 Jun 2019 at 19:40, Paolo Bonzini wrote:
>
> On 06/06/19 07:31, Wanpeng Li wrote:
> > +static inline bool can_posted_interrupt_inject_timer(struct kvm_vcpu *vcpu)
> > +{
> > + return posted_interrupt_inject_timer_enabled(vcpu) &&
> > + !vcpu_halt_in_guest(vcpu);
> > +}
>
From: Wanpeng Li
Wait before calling posted-interrupt deliver function directly to add
advance timer support to pi_inject_timer.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/lapic.c | 6 --
arch/x86/kvm/lapic.h | 2 +-
arch/x86/kvm/svm.c | 2 +-
From: Wanpeng Li
Dedicated instances are currently disturbed by unnecessary jitter due
to the emulated lapic timers fire on the same pCPUs which vCPUs resident.
There is no hardware virtual timer on Intel for guest like ARM. Both
programming timer in guest and the emulated timer fires incur vme
Dedicated instances are currently disturbed by unnecessary jitter due
to the emulated lapic timers fire on the same pCPUs which vCPUs resident.
There is no hardware virtual timer on Intel for guest like ARM. Both
programming timer in guest and the emulated timer fires incur vmexits.
This patchset
On 6/3/19 2:04 PM, Michael S. Tsirkin wrote:
> On Mon, Jun 03, 2019 at 01:03:04PM -0400, Nitesh Narayan Lal wrote:
>> This patch series proposes an efficient mechanism for communicating free
>> memory
>> from a guest to its hypervisor. It especially enables guests with no page
>> cache
>> (e.g.,
This patch adds the test cases for checking compressed firmware load.
Two more cases are added to fw_filesystem.sh:
- Both a plain file and an xz file are present, and load the former
- Only an xz file is present, and load without '.xz' suffix
The tests are enabled only when CONFIG_FW_LOADER_COMPR
Hi,
here are the rest and the main part of patches to add the support for
loading the compressed firmware files. The patch was slightly
refactored for more easily enhancing for other compression formats (if
anyone wants). Also the selftest patch is included. The
functionality doesn't change fro
This patch adds the support for loading compressed firmware files.
The primary motivation is to reduce the storage size; e.g. currently
the files in /lib/firmware on my machine counts up to 419MB, while
they can be reduced to 130MB by file compression.
The patch introduces a new kconfig option CON
On 6/11/19 5:29 AM, Srinivas Kandagatla wrote:
On 10/06/2019 15:12, Pierre-Louis Bossart wrote:
+
+ if (dev_addr == SDW_BROADCAST_DEV_NUM) {
+ ctrl->fifo_status = 0;
+ ret = wait_for_completion_timeout(&ctrl->sp_cmd_comp,
+ msecs_to_jiffies(TIMEOUT_
Hi Michal
>On Sun 09-06-19 17:10:28, ChenGang wrote:
>> Usually the value of min_free_kbytes is multiply of 4, and in this
>> case ,the right shift is ok.
>> But if it's not, the right-shifting operation will lose the low 2
>> bits, and this cause kernel don't reserve enough memory.
>> So it's
From: Wanpeng Li
Make lapic timer unpinned when timer is injected by posted-interrupt,
the emulated timer can be offload to the housekeeping cpus.
The host admin should fine tuned, e.g. dedicated instances scenario
w/ nohz_full cover the pCPUs which vCPUs resident, several pCPUs
surplus for ho
Some a4tech mice use the 'GenericDesktop.00b8' usage to inform whether
the previous wheel report was horizontal or vertical. Before
c01908a14bf73 ("HID: input: add mapping for "Toggle Display" key") this
usage was being mapped to 'Relative.Misc'. After the patch it's simply
ignored (usage->type ==
On Tue, 11 Jun 2019 at 10:42, Ilya Maximets wrote:
>
> On 11.06.2019 11:09, Björn Töpel wrote:
> > On Mon, 10 Jun 2019 at 22:49, Jonathan Lemon
> > wrote:
> >>
> >> On 10 Jun 2019, at 9:15, Ilya Maximets wrote:
> >>
> >>> Device that bound to XDP socket will not have zero refcount until the
> >>
From: Wanpeng Li
When lapic timer is injected by posted-interrupt, the emulated timer is
offload to the housekeeping cpu. The timer interrupt will be delivered
properly, no need to migrate timer.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/lapic.c | 3 ++-
1
Jacek
Reviewed and tested the updated branch. Looks good to me.
Dan
On 6/5/19 2:31 PM, Jacek Anaszewski wrote:
Hi Dan,
Thank you for the v6.
Patches 4/5 and 5/5 don't contain amendments I made to
the respective patches on the ib-leds-mfd-regulator branch
(that address issues raised by Pavel
On Tue, 11 Jun 2019 14:19:54 +0200,
Takashi Iwai wrote:
>
> Hi,
>
> here are the rest and the main part of patches to add the support for
> loading the compressed firmware files. The patch was slightly
> refactored for more easily enhancing for other compression formats (if
> anyone wants). Als
From: Wanpeng Li
When sending a call-function IPI-many to vCPUs, yield if any of
the IPI target vCPUs was preempted, we just select the first
preempted target vCPU which we found since the state of target
vCPUs can change underneath and to avoid race conditions.
Cc: Paolo Bonzini
Cc: Radim Krčm
From: Wanpeng Li
The target vCPUs are in runnable state after vcpu_kick and suitable
as a yield target. This patch implements the sched yield hypercall.
17% performance increasement of ebizzy benchmark can be observed in an
over-subscribe environment. (w/ kvm-pv-tlb disabled, testing TLB flush
The idea is from Xen, when sending a call-function IPI-many to vCPUs,
yield if any of the IPI target vCPUs was preempted. 17% performance
increasement of ebizzy benchmark can be observed in an over-subscribe
environment. (w/ kvm-pv-tlb disabled, testing TLB flush call-function
IPI-many since ca
From: Anson Huang
Add the pinctrl driver support for i.MX8MN.
Signed-off-by: Anson Huang
Acked-by: Dong Aisheng
---
Changes since V1:
- Fix some nitpicks like sorting the change in alphabet order
and improve the headfile included.
---
drivers/pinctrl/freescale/Kconfig
From: Anson Huang
Add binding doc for i.MX8MN pinctrl driver.
Signed-off-by: Anson Huang
Acked-by: Dong Aisheng
---
No change.
---
.../bindings/pinctrl/fsl,imx8mn-pinctrl.txt| 39 ++
arch/arm64/boot/dts/freescale/imx8mn-pinfunc.h | 646 +
2 files changed, 685
From: Wanpeng Li
Expose PV_SCHED_YIELD feature bit to guest, the guest can check this
feature bit before using paravirtualized sched yield.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Cc: Liran Alon
Signed-off-by: Wanpeng Li
---
Documentation/virtual/kvm/cpuid.txt | 4
arch/x86/kvm/cpuid.c
From: Anson Huang
Enable CONFIG_PINCTRL_IMX8MN by default to support i.MX8MN
pinctrl driver.
Signed-off-by: Anson Huang
Reviewed-by: Dong Aisheng
---
Changes since V1:
- sort the change in alphabet order.
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --g
This series delivers power improvements for stm32-usart driver.
Bich Hemon (4):
dt-bindings: serial: add optional pinctrl states
serial: stm32: select pinctrl state in each suspend/resume function
ARM: dts: stm32: Update pin states for uart4 on stm32mp157c-ed1
ARM: dts: stm32: Update UART4
Use pm_runtime for clock management.
Signed-off-by: Bich Hemon
Signed-off-by: Erwan Le Ray
diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 04eda75..60f3faf 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -809,13 +809
On Tue, 2019-06-11 at 13:32 +0200, Dmitry Vyukov wrote:
> On Tue, Jun 11, 2019 at 12:44 PM Walter Wu wrote:
> >
> > On Tue, 2019-06-11 at 10:47 +0200, Dmitry Vyukov wrote:
> > > On Tue, Jun 11, 2019 at 9:05 AM Walter Wu
> > > wrote:
> > > >
> > > > On Mon, 2019-06-10 at 13:46 +0200, Dmitry Vyuko
From: Bich Hemon
Add idle and no_console_suspend states to uart4 pin configuration
Signed-off-by: Bich Hemon
Signed-off-by: Erwan Le Ray
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts
b/arch/arm/boot/dts/stm32mp157c-ed1.dts
index 62a8c78..34cc847 100644
--- a/arch/arm/boot/dts/stm32mp157
On Tue, 2019-06-04 at 20:26 +0800, Qii Wang wrote:
> On Tue, 2019-06-04 at 09:58 +0200, Boris Brezillon wrote:
> > On Mon, 3 Jun 2019 11:51:03 +0800
> > Qii Wang wrote:
> >
> >
> > > +static int mtk_i3c_master_probe(struct platform_device *pdev)
> > > +{
> > > + struct device *dev = &pdev->dev;
This patch adds the test cases for checking compressed firmware load.
Two more cases are added to fw_filesystem.sh:
- Both a plain file and an xz file are present, and load the former
- Only an xz file is present, and load without '.xz' suffix
The tests are enabled only when CONFIG_FW_LOADER_COMPR
This patch adds the support for loading compressed firmware files.
The primary motivation is to reduce the storage size; e.g. currently
the files in /lib/firmware on my machine counts up to 419MB, while
they can be reduced to 130MB by file compression.
The patch introduces a new kconfig option CON
Add a note for enabling wakeup capabilities of usart
Signed-off-by: Bich Hemon
Signed-off-by: Erwan Le Ray
diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
index 9d3efed..5ec80c1 100644
--- a/Documentation/de
From: Bich Hemon
Select either pinctrl sleep state in suspend function or default state in
resume function.
Signed-off-by: Bich Hemon
Signed-off-by: Erwan Le Ray
diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 9c2b04e..04eda75 100644
--- a/drivers/tty/se
This is merely a preparation for the upcoming compressed firmware
support and no functional changes. It moves the code to handle the
paged buffer allocation and mapping out of fallback.c into the main
code, so that they can be used commonly.
Signed-off-by: Takashi Iwai
---
drivers/base/firmware
From: Bich Hemon
Add options for pinctrl states:
- "sleep" for low power
- "idle" for low power and wakeup capabilities enabled
- "no_console_suspend" for enabling console messages in low power
Signed-off-by: Bich Hemon
Signed-off-by: Erwan Le Ray
diff --git a/Documentation/devicetree/binding
- Mark all usart/uart devices as wakeup source.
- Identify all dedicated interrupts with a specific interrupt name (either
"event" or "wakeup").
- add interrupts-extended wakeup interrupt
Signed-off-by: Erwan Le Ray
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157
Use __maybe_unused for power management related functionsinstead of
fixes: 270e5a74fe4c ("serial: stm32: add wakeup mechanism")
Signed-off-by: Erwan Le Ray
diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 60f3faf..0d43711 100644
--- a/drivers/tty/serial/stm3
In order to display console messages in low power mode, console pins
must be kept active after suspend call.
Signed-off-by: Bich Hemon
Signed-off-by: Erwan Le Ray
diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 0d43711..00e4d7a 100644
--- a/drivers/tty/ser
[resubmitted with the missing patch]
Hi,
here are the rest and the main part of patches to add the support for
loading the compressed firmware files. The patch was slightly
refactored for more easily enhancing for other compression formats (if
anyone wants). Also the selftest patch is included.
From: Bich Hemon
Add idle and no_console_suspend states to uart4 pin configuration.
Signed-off-by: Bich Hemon
Signed-off-by: Erwan Le Ray
diff --git a/arch/arm/boot/dts/stm32mp157a-dk1.dts
b/arch/arm/boot/dts/stm32mp157a-dk1.dts
index 098dbfb..b851f80 100644
--- a/arch/arm/boot/dts/stm32mp15
Currently, pinctrl states defines only one "sleep" configuration for pins,
no matter the possible uart low power modes (Rx pin always kept active).
Sleep pin configuration is refined for low power modes:
- "sleep" (no wakeup & console suspend enabled): put pins in analog state
to optimize power
On Tue, 11 Jun 2019 20:25:22 +0800
Qii Wang wrote:
> On Tue, 2019-06-04 at 20:26 +0800, Qii Wang wrote:
> > On Tue, 2019-06-04 at 09:58 +0200, Boris Brezillon wrote:
> > > On Mon, 3 Jun 2019 11:51:03 +0800
> > > Qii Wang wrote:
> > >
> > >
> > > > +static int mtk_i3c_master_probe(struct pl
Hi,
The AUXCLK of McASP which is used as the master clock for I2S signal generation
usually is a static clock.
The driver (and bindings) assumes this setup, however if the AUXCLK can change
with the stream's FS then this assumption breaks the audio support as it sets
constraint rules in startup, t
When McASP is bus master it's reference clock (AUXCLK) might not be a
static clock, but running at a specific FS ratio.
Signed-off-by: Peter Ujfalusi
---
.../devicetree/bindings/sound/davinci-mcasp-audio.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree
From: Pavel Begunkov
Statements in the loop's body and before it are identical.
Use do-while to not repeat it.
Signed-off-by: Pavel Begunkov
---
kernel/sched/wait.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/kernel/sched/wait.c b/kernel/sched/wait.c
index fa0f9
On Fri, Jun 07, 2019 at 02:10:15PM +0800, Pingfan Liu wrote:
> On Fri, Jun 7, 2019 at 5:17 AM John Hubbard wrote:
> >
> > On 6/5/19 7:19 PM, Pingfan Liu wrote:
> > > On Thu, Jun 6, 2019 at 5:49 AM Andrew Morton
> > > wrote:
> > ...
> > >>> --- a/mm/gup.c
> > >>> +++ b/mm/gup.c
> > >>> @@ -2196,6
When McASP is bus master and it's AUXCLK clock is not static, but it is
a multiple of the frame sync the constraint rules should take it account
when validating possible stream formats.
Signed-off-by: Peter Ujfalusi
---
sound/soc/ti/davinci-mcasp.c | 52 ++--
1 fi
Hello POWER developers,
I'm trying to find out if there is an internal kernel API so that a
PCI driver can call it to check if its PCI device is running inside a
POWER9 machine. Alternatively, if that's not available, if it is
running on a machine with powerpc architecture.
I need this informatio
This series attempts to align as much IRQ handling into the
probe path as possible. Note that I don't have a great setup
for testing these patches so they are mostly just build tested
and need careful review and testing before any of them are
merged.
The series brings the ACPI path inline with the
Remove the static from i2c_dev_irq_from _resources so that other parts
of the core code can use this helper function.
Reviewed-by: Mika Westerberg
Signed-off-by: Charles Keepax
---
No changes since v3.
Thanks,
Charles
drivers/i2c/i2c-core-base.c | 4 ++--
drivers/i2c/i2c-core.h | 2 ++
It makes sense to contain all the ACPI IRQ handling in a single helper
function.
Reviewed-by: Mika Westerberg
Signed-off-by: Charles Keepax
---
No change since v3.
Thanks,
Charles
drivers/i2c/i2c-core-acpi.c | 3 +++
drivers/i2c/i2c-core-base.c | 3 ---
2 files changed, 3 insertions(+), 3 de
In preparation for more refactoring make i2c_acpi_get_irq available
outside i2c-core-acpi.c.
Signed-off-by: Charles Keepax
---
Changes since v3:
- Move the change to use the helper function from i2c-core-base into its own
patch.
Thanks,
Charles
drivers/i2c/i2c-core-acpi.c | 15 +
Only set init_irq during i2c_device_new and only handle client->irq on
the probe/remove paths.
Suggested-by: Benjamin Tissoires
Reviewed-by: Mika Westerberg
Signed-off-by: Charles Keepax
---
No change since v3.
Thanks,
Charles
drivers/i2c/i2c-core-base.c | 5 +++--
1 file changed, 3 inserti
Use the available IRQ helper functions, most of the functions have
additional helpful side affects like configuring the trigger type of the
IRQ.
Reviewed-by: Mika Westerberg
Signed-off-by: Charles Keepax
---
No changes since v3.
Apologies Andy but I really can't see a sensible way to split thi
In preparation for future refactoring factor out the fetch of the IRQ
into its own helper function.
Reviewed-by: Mika Westerberg
Signed-off-by: Charles Keepax
---
No changes since v3.
Thanks,
Charles
drivers/i2c/i2c-core-acpi.c | 33 +
1 file changed, 21 inser
On Fri, 2019-04-12 at 12:02 +0200, Guillaume La Roque wrote:
> This patch series add support of Clock for temperature sensor
> on Amlogic G12a SoC.
>
> Guillaume
>
> cahnges sinve v2:
> - rebase on good branch
>
> changes since v1:
> - fix .width value
>
> Guillaume La Roque (2):
> dt-binding
Bring the ACPI path in sync with the device tree path and handle all the
IRQ fetching at probe time. This leaves the only IRQ handling at device
registration time being that which is passed directly through the board
info as either a resource or an actual IRQ number.
Reviewed-by: Mika Westerberg
On Tue, 2019-05-28 at 10:07 +0200, Neil Armstrong wrote:
> The Amlogic G12B SoC is very similar with the G12A SoC, sharing
> most of the features and architecture.
> G12B clock tree is very close, the main differences are :
> - SYS_PLL is used for the second cluster (otherwise used fir the first on
From: Thomas Hellstrom
This is basically apply_to_page_range with added functionality:
Allocating missing parts of the page table becomes optional, which
means that the function can be guaranteed not to error if allocation
is disabled. Also passing of the closure struct and callback function
beco
On Mon, 2019-05-20 at 22:03 +0200, Martin Blumenstingl wrote:
> The audio clocks on the 32-bit Meson8, Meson8b and Meson8m2 are
> (probably) identical to the ones on GXBB, GXL and GXM.
>
> The first piece of evidence is that Amlogic's vendor kernel is using
> the same basic driver (just slightly m
On Tue, Jun 11, 2019 at 02:08:34PM +0200, Peter Zijlstra wrote:
> On Tue, Jun 11, 2019 at 10:03:07AM +0200, Peter Zijlstra wrote:
> > On Fri, Jun 07, 2019 at 11:10:19AM -0700, Andy Lutomirski wrote:
>
> > > I am surely missing some kprobe context, but is it really safe to use
> > > this mechanism
From: Thomas Hellstrom
Driver fault callbacks are allowed to drop the mmap_sem when expecting
long hardware waits to avoid blocking other mm users. Allow the mkwrite
callbacks to do the same by returning early on VM_FAULT_RETRY.
In particular we want to be able to drop the mmap_sem when waiting
From: Thomas Hellstrom
Add two utilities to a) write-protect and b) clean all ptes pointing into
a range of an address space.
The utilities are intended to aid in tracking dirty pages (either
driver-allocated system memory or pci device memory).
The write-protect utility should be used in conjunc
On Tue, Jun 11, 2019 at 9:18 AM syzbot
wrote:
>
> Hello,
>
> syzbot found the following crash on:
>
> HEAD commit:f4cfcfbd net: dsa: sja1105: Fix link speed not working at ..
> git tree: net
> console output: https://syzkaller.appspot.com/x/log.txt?x=16815cd2a0
> kernel config: http
On Tue, Jun 11, 2019 at 11:03:49AM +0100, Mark Rutland wrote:
> On Mon, Jun 10, 2019 at 01:26:15PM -0400, Qian Cai wrote:
> > On Mon, 2019-06-10 at 12:43 +0100, Will Deacon wrote:
> > > On Tue, Jun 04, 2019 at 03:23:38PM +0100, Mark Rutland wrote:
> > > > On Tue, Jun 04, 2019 at 10:00:36AM -0400, Q
On Tue, Jun 11, 2019 at 02:34:02PM +0200, Peter Zijlstra wrote:
> Bugger, this isn't right. It'll jump to the beginning of the trampoline,
> even if it is multiple instructions in, which would lead to executing
> instructions twice, which would be BAD.
>
> _maybe_, depending on what the slot look
On Tue, Jun 11, 2019 at 12:56:03PM +0200, Stefan Roese wrote:
> From: Yegor Yefremov
>
> This patch permits the usage for GPIOs to control
> the CTS/RTS/DTR/DSR/DCD/RI signals.
> static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
> {
> serial_out(up, UART_MCR, va
On 11.06.19 00:16, Christoph Hellwig wrote:
> The kernel runs in M-mode without using page tables, and thus doesn't
> can run bare metal without help from additional firmware.
s/doesn't can/can't/
>
> Most of the patch is just stubbing out code not needed without page
> tables, but there is an i
On Tue, Jun 11, 2019 at 10:38:06AM +0100, Julien Thierry wrote:
> For el0_dbg and el0_error, DAIF bits get explicitly cleared before
> calling ct_user_exit.
>
> When context tracking is disabled, DAIF gets set (almost) immediately
> after. When context tracking is enabled, among the first things d
On Tue, Jun 11, 2019 at 10:38:07AM +0100, Julien Thierry wrote:
> Flags are only read by the instructions doing the irqflags restore
> operation. Pass the operand as read only to the asm inline instead of
> read-write.
>
> Signed-off-by: Julien Thierry
> Cc: Catalin Marinas
> Cc: Will Deacon
A
> On Jun 11, 2019, at 8:41 AM, Mike Rapoport wrote:
>
> On Tue, Jun 11, 2019 at 11:03:49AM +0100, Mark Rutland wrote:
>> On Mon, Jun 10, 2019 at 01:26:15PM -0400, Qian Cai wrote:
>>> On Mon, 2019-06-10 at 12:43 +0100, Will Deacon wrote:
On Tue, Jun 04, 2019 at 03:23:38PM +0100, Mark Rutla
On Tue, Jun 11, 2019 at 01:30:56PM +0100, Charles Keepax wrote:
> Use the available IRQ helper functions, most of the functions have
> additional helpful side affects like configuring the trigger type of the
> IRQ.
>
> Reviewed-by: Mika Westerberg
> Signed-off-by: Charles Keepax
> ---
>
> No ch
On Tue, Jun 11, 2019 at 01:30:54PM +0100, Charles Keepax wrote:
> This series attempts to align as much IRQ handling into the
> probe path as possible. Note that I don't have a great setup
> for testing these patches so they are mostly just build tested
> and need careful review and testing before
On Tue, Jun 11, 2019 at 10:38:08AM +0100, Julien Thierry wrote:
> Some of the inline assembly instruction use the condition flags and need
> to include "cc" in the clobber list.
>
> Fixes: commit 4a503217ce37 ("arm64: irqflags: Use ICC_PMR_EL1 for interrupt
> masking")
> Suggested-by: Marc Zyngie
In order to subsequently add more tests for the arm64 architecture
we compile the tests target for arm64 systematically.
Signed-off-by: Raphael Gault
---
tools/perf/arch/arm64/Build | 2 +-
tools/perf/arch/arm64/tests/Build | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --g
On Mon, Jun 10, 2019 at 02:07:34PM -0600, Al Stone wrote:
> In the ACPI specification, section 6.1.12, a _UID may be either an
> integer or a string object. Up until now, when defining processor
> Device()s in ACPI (_HID ACPI0007), only integers were allowed even
> though this ignored the specific
The perf user-space tool relies on the PMU to monitor events. It offers an
abstraction layer over the hardware counters since the underlying
implementation is cpu-dependent. We want to allow userspace tools to have
access to the registers storing the hardware counters' values directly.
This targets
In order to be able to access the counter directly for userspace,
we need to provide the index of the counter using the userpage.
We thus need to override the event_idx function to retrieve and
convert the perf_event index to armv8 hardware index.
Since the arm_pmu driver can be used by any implem
Add an extra test to check userspace access to pmu hardware counters.
This test doesn't rely on the seqlock as a synchronisation mechanism but
instead uses the restartable sequences to make sure that the thread is
not interrupted when reading the index of the counter and the associated
pmu register
This test relies on the fact that the PMU registers are accessible
from userspace. It then uses the perf_event_mmap_page to retrieve
the counter index and access the underlying register.
This test uses sched_setaffinity(2) in order to run on all CPU and thus
check the behaviour of the PMU of all c
Add a documentation file to describe the access to the pmu hardware
counters from userspace
Signed-off-by: Raphael Gault
---
.../arm64/pmu_counter_user_access.txt | 42 +++
1 file changed, 42 insertions(+)
create mode 100644 Documentation/arm64/pmu_counter_user_access.tx
Keep track of event opened with direct access to the hardware counters
and modify permissions while they are open.
The strategy used here is the same which x86 uses: everytime an event
is mapped, the permissions are set if required. The atomic field added
in the mm_context helps keep track of the
In order to prevent the userspace processes which are trying to access
the registers from the pmu registers on a big.LITTLE environment we
introduce a hook to handle undefined instructions.
The goal here is to prevent the process to be interrupted by a signal
when the error is caused by the task b
On 11/6/19 5:38 pm, Christoph Hellwig wrote:
On Tue, Jun 11, 2019 at 04:51:02PM +1000, Greg Ungerer wrote:
Hi Christoph,
On 11/6/19 7:20 am, Christoph Hellwig wrote:
below is a larger stash of cleanups for the binfmt_misc code,
preparing for the last patch that now trivially adds RISC-V
supp
On Tue, Jun 11, 2019 at 03:41:19PM +0300, Mike Rapoport wrote:
> On Tue, Jun 11, 2019 at 11:03:49AM +0100, Mark Rutland wrote:
> > On Mon, Jun 10, 2019 at 01:26:15PM -0400, Qian Cai wrote:
> > > On Mon, 2019-06-10 at 12:43 +0100, Will Deacon wrote:
> > > > On Tue, Jun 04, 2019 at 03:23:38PM +0100,
On Tue, Jun 11, 2019 at 10:29:31AM +0200, Peter Zijlstra wrote:
> On Mon, Jun 10, 2019 at 12:24:28PM -0500, Josh Poimboeuf wrote:
> > On Wed, Jun 05, 2019 at 03:08:07PM +0200, Peter Zijlstra wrote:
> > >
> > > Signed-off-by: Peter Zijlstra (Intel)
> > > ---
> > > lib/Kconfig.debug |8 ++
On Thu, Jun 06, 2019 at 10:21:01AM -0700 bseg...@google.com wrote:
> When a cfs_rq sleeps and returns its quota, we delay for 5ms before
> waking any throttled cfs_rqs to coalesce with other cfs_rqs going to
> sleep, as this has to be done outside of the rq lock we hold.
>
> The current code waits
Dear All,
this series adds USB2.0/CMT/TMU support to the HiHope RZ/G2M.
Thanks,
Fab
Fabrizio Castro (6):
arm64: dts: renesas: r8a774a1: Fix USB 2.0 clocks
arm64: dts: renesas: hihope-common: Add USB 2.0 support
arm64: dts: renesas: r8a774a1: Add CMT device nodes
clk: renesas: r8a774a1: A
Document RZ/G2M (R8A774A1) SoC in the Renesas TMU bindings.
Signed-off-by: Fabrizio Castro
---
Documentation/devicetree/bindings/timer/renesas,tmu.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/timer/renesas,tmu.txt
b/Documentation/devicetree/bindings/
On 11/6/19 5:36 pm, Christoph Hellwig wrote:
On Tue, Jun 11, 2019 at 04:04:39PM +1000, Greg Ungerer wrote:
index c0e4535dc1ec..18d82fd5f57c 100644
--- a/fs/binfmt_flat.c
+++ b/fs/binfmt_flat.c
@@ -488,7 +488,8 @@ static int load_flat_file(struct linux_binprm *bprm,
* fix up the flags
On Tue 11-06-19 12:16:35, Chengang (L) wrote:
> Hi Michal
>
>
> >On Sun 09-06-19 17:10:28, ChenGang wrote:
> >> Usually the value of min_free_kbytes is multiply of 4, and in this
> >> case ,the right shift is ok.
> >> But if it's not, the right-shifting operation will lose the low 2
> >> bits,
On Mon, May 20, 2019 at 04:59:15PM -0400, Waiman Long wrote:
> +static inline long rwsem_read_trylock(struct rw_semaphore *sem, long *cnt)
> +{
> + long adjustment = -RWSEM_READER_BIAS;
> +
> + *cnt = atomic_long_fetch_add_acquire(RWSEM_READER_BIAS, &sem->count);
I'm thinking we'd actuall
On Mon, Jun 10, 2019 at 4:19 PM Tomer Maimon wrote:
>
> Add Nuvoton BMC NPCM BIOS post code (BPC) driver.
>
> The NPCM BPC monitoring two I/O address written by
> the host on the Low Pin Count (LPC) bus, the capure
> data stored in 128-word FIFO.
>
> Signed-off-by: Tomer Maimon
We've run into th
> From: Fabrizio Castro
> Sent: 11 June 2019 14:07
> Subject: [PATCH 0/6] Add USB2.0/CMT/TMU support to HiHope RZ/G2M
>
> Dear All,
>
> this series adds USB2.0/CMT/TMU support to the HiHope RZ/G2M.
Ah, I forgot to mention that this series depends on:
https://patchwork.kernel.org/cover/10980861/
On Wed, May 29, 2019 at 03:10:54AM +, Stefan Schaeckeler (sschaeck) wrote:
> On Tuesday, May 28, 2019 at 6:27 PM, Andrew Jeffery wrote:
> > On Sun, 26 May 2019, at 00:12, YueHaibing wrote:
> > > Fixes gcc '-Wunused-but-set-variable' warning:
> > >
> > > drivers/edac/aspeed_edac.c: In function
On Mon, May 20, 2019 at 04:59:15PM -0400, Waiman Long wrote:
> static struct rw_semaphore __sched *
> +rwsem_down_read_slowpath(struct rw_semaphore *sem, int state, long
> adjustment)
> {
> + long count;
> bool wake = false;
> struct rwsem_waiter waiter;
> DEFINE_WAKE_Q(wak
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