Hi,
On Mon, Sep 02, 2019 at 11:16:27PM +0200, Arnd Bergmann wrote:
> On Mon, Sep 2, 2019 at 10:39 PM Sebastian Reichel wrote:
> > This patch does not look good to me. Better patch would be to
> > allow compiling CONFIG_REBOOT_MODE without CONFIG_OF. Obviously
> > the configuration would not be us
Decode the hubless UVsystab passed from BIOS to the kernel saving
pertinent info in a similar manner that hubbed UVsystabs are decoded.
Signed-off-by: Mike Travis
Reviewed-by: Steve Wahl
Reviewed-by: Dimitri Sivanich
---
arch/x86/kernel/apic/x2apic_uv_x.c | 16 ++--
1 file change
The references in the is_uvX_hub() function uses the hub_info pointer
which will be NULL when the system is hubless. This change avoids
that NULL dereference. It is also an optimization in performance.
Signed-off-by: Mike Travis
Reviewed-by: Steve Wahl
Reviewed-by: Dimitri Sivanich
---
arch/
Change to checking for EFI Boot type from previous check on if this
is a KDUMP kernel. This allows for KDUMP kernels that can handle
EFI reboots.
Signed-off-by: Mike Travis
Reviewed-by: Steve Wahl
Reviewed-by: Dimitri Sivanich
---
arch/x86/kernel/apic/x2apic_uv_x.c | 18 --
Return the type of UV hubless system for UV specific code that depends
on that. Use a define to indicate the change in arg type for this
function in uv.h. Add a function to convert UV system type to bit
pattern needed for is_uv_hubless().
Signed-off-by: Mike Travis
Reviewed-by: Steve Wahl
Revi
These patches support upcoming UV systems that do not have a UV HUB.
* Save OEM_ID from ACPI MADT probe
* Return UV Hubless System Type
* Add return code to UV BIOS Init function
* Setup UV functions for Hubless UV Systems
* Add UV Hubbed/Hubless Proc FS F
Add more support for UV systems that do not contain a UV Hub (AKA
"hubless"). This update adds support for additional functions required:
Use PCH NMI handler instead of a UV Hub NMI handler.
Initialize the UV BIOS callback interface used to support specific
UV functions.
Signed-off-
Indicate to UV user utilities that UV hubless support is available on
this system via the existing /proc infterface. The current interface
is maintained with the addition of a new /proc leaves ("hubbed" and
"hubless") that contain the specific type of UV arch this one is.
Signed-off-by: Mike Trav
Add a return code to the UV BIOS init function that indicates the
successful initialization of the kernel/BIOS callback interface.
Signed-off-by: Mike Travis
Reviewed-by: Steve Wahl
Reviewed-by: Dimitri Sivanich
---
arch/x86/include/asm/uv/bios.h |2 +-
arch/x86/platform/uv/bios_uv.c |
Save the OEM_ID and OEM_TABLE_ID passed to the apic driver probe function
for later use. Also, convert the char list arg passed from the kernel
to a true null-terminated string.
Signed-off-by: Mike Travis
Reviewed-by: Steve Wahl
Reviewed-by: Dimitri Sivanich
---
arch/x86/kernel/apic/x2apic_uv
Break out synic enable and disable operations into separate
hv_synic_disable_regs() and hv_synic_enable_regs() functions for use by a
later patch to support hibernation.
There is no functional change except the unnecessary check
"if (sctrl.enable != 1) return -EFAULT;" which is removed, because wh
Before suspend, Linux must make sure all the hv_sock channels have been
properly cleaned up, because a hv_sock connection can not persist across
hibernation, and the user-space app must be properly notified of the
state change of the connection.
Before suspend, Linux also must make sure all the su
The existing method of telling if a channel is sub-channel in
vmbus_process_offer() is cumbersome. This new simple helper function
is preferred in future.
Signed-off-by: Dexuan Cui
Reviewed-by: Michael Kelley
---
include/linux/hyperv.h | 10 +-
1 file changed, 9 insertions(+), 1 deletio
The API will be used by the hv_balloon and hv_vmbus drivers.
Balloon up/down and hot-add of memory must not be active if the user
wants the Linux VM to support hibernation, because they are incompatible
with hibernation according to Hyper-V team, e.g. upon suspend the
balloon VSP doesn't save any
Hi all,
The patchset is to enhance hv_vmbus to support hibernation when Linux VM
runs on Hyper-V. A second patchset to enhance the high-level VSC drivers
(hv_netvsc, hv_storvsc, etc.) for hibernation will be posted after this
patchset is acceped. If you want to test this hibernation feaure, all the
When the VM resumes, the host re-sends the offers. We should not add the
offers to the global vmbus_connection.chn_list again.
This patch assumes the RELIDs of the channels don't change across
hibernation. Actually this is not always true, especially in the case of
NIC SR-IOV the VF vmbus device's
Fake RESCIND_CHANNEL messages to clean up hv_sock channels by force for
hibernation. There is no better method to clean up the channels since
some of the channels may still be referenced by the userspace apps when
hibernation is triggered: in this case, with this patch, the "rescind"
fields of the
This is needed when we resume the old kernel from the "current" kernel.
Note: when hv_synic_suspend() and hv_synic_resume() run, all the
non-boot CPUs have been offlined, and interrupts are disabled on CPU0.
Signed-off-by: Dexuan Cui
Reviewed-by: Michael Kelley
---
drivers/hv/vmbus_drv.c | 46
This is needed for hibernation, e.g. when we resume the old kernel, we need
to disable the "current" kernel's TSC page and then resume the old kernel's.
Signed-off-by: Dexuan Cui
Reviewed-by: Michael Kelley
---
drivers/clocksource/hyperv_timer.c | 25 +
1 file changed, 2
When the host re-offers the primary channels upon resume, the host only
guarantees the Instance GUID doesn't change, so vmbus_bus_suspend()
should invalidate channel->offermsg.child_relid and figure out the
number of primary channels that need to be fixed up upon resume.
Upon resume, vmbus_onoffe
The high-level VSC drivers will implement device-specific callbacks.
Signed-off-by: Dexuan Cui
Reviewed-by: Michael Kelley
---
drivers/hv/vmbus_drv.c | 46 ++
include/linux/hyperv.h | 3 +++
2 files changed, 49 insertions(+)
diff --git a/drivers/hv/
Before Linux enters hibernation, it sends the CHANNELMSG_UNLOAD message to
the host so all the offers are gone. After hibernation, Linux needs to
re-negotiate with the host using the same vmbus protocol version (which
was in use before hibernation), and ask the host to re-offer the vmbus
devices.
This is needed for hibernation, e.g. when we resume the old kernel, we need
to disable the "current" kernel's hypercall page and then resume the old
kernel's.
Signed-off-by: Dexuan Cui
Reviewed-by: Michael Kelley
---
arch/x86/hyperv/hv_init.c | 34 ++
1 file chan
On Mon, Sep 02, 2019 at 01:30:44PM +0200, Jiri Kosina wrote:
On Sat, 31 Aug 2019, Michael Kelley wrote:
From: Maya Nakamura Sent: Friday, July 12, 2019
1:28 AM
>
> Define the ring buffer size as a constant expression because it should
> not depend on the guest page size.
>
> Signed-off-by: M
Hi David,
On Tue, 03 Sep 2019 00:53:14 +0100 David Howells wrote:
>
> Stephen Rothwell wrote:
>
> > > I was doing an x86_64 allmodconfig build which seems to build (all of?)
> > > the samples.
> >
> > Of course, this breaks our crossbuilds :-(
> >
> > e.g. S390 allyesconfig build:
> >
> >
On 9/2/19 1:06 PM, Greg KH wrote:
On Mon, Sep 02, 2019 at 12:32:37PM -0700, Guenter Roeck wrote:
On 9/2/19 11:47 AM, Greg KH wrote:
On Sun, Sep 01, 2019 at 07:08:29AM -0700, Guenter Roeck wrote:
On 9/1/19 1:03 AM, Kalle Valo wrote:
Guenter Roeck writes:
On Mon, Aug 19, 2019 at 06:02:29PM -
On 9/2/19 4:46 AM, Maxime Ripard wrote:
Hi Guenther,
On Fri, Aug 30, 2019 at 09:48:11AM -0700, Guenter Roeck wrote:
On Wed, Aug 21, 2019 at 04:38:30PM +0200, Maxime Ripard wrote:
From: Maxime Ripard
The watchdogs have a bunch of generic properties that are needed in a
device tree. Add a YAML
On Thu, Aug 29, 2019 at 4:28 AM syzbot
wrote:
>
> Hello,
>
> syzbot found the following crash on:
>
> HEAD commit:47ee6e86 selftests/bpf: remove wrong nhoff in flow dissect..
> git tree: bpf-next
> console output: https://syzkaller.appspot.com/x/log.txt?x=16227fa660
> kernel config:
> -Original Message-
> From: Dexuan Cui
> Sent: Monday, August 19, 2019 7:57 PM
> To: ji...@kernel.org; benjamin.tissoi...@redhat.com;
> linux-in...@vger.kernel.org; linux-hyp...@vger.kernel.org; Stephen
> Hemminger ; Sasha Levin
> ; sas...@kernel.org; Haiyang Zhang
> ; KY Srinivasan ; Mic
On Mon, Sep 02, 2019 at 11:36:51AM +0200, Borislav Petkov wrote:
> On Mon, Sep 02, 2019 at 09:13:42AM +0800, Philip Li wrote:
> > Thanks Boris, it is applied, and will take effect soon.
>
> Seems to has taken effect. I got the first build report.
thanks for the info, Boris, glad to know this.
>
On Mon, 2 Sep 2019 23:28:50 +0200
"Rafael J. Wysocki" wrote:
> On Tue, Aug 6, 2019 at 6:24 AM Daniel Black wrote:
> >
> > ACPI-6.3 corresponds to when hmat revision was bumped from
> > 1 to 2. In this version ACPI_HMAT_MEMORY_PD_VALID was
> > deprecated and made reserved.
> >
> > As such in revi
Add suffix LL to constant 1000 in order to avoid a potential integer
overflow and give the compiler complete information about the proper
arithmetic to use. Notice that this constant is being used in a context
that expects an expression of type s64, but it's currently evaluated
using 32-bit arithme
>>> +ARM_SMMU_MATCH_DATA(nvidia_smmuv2, ARM_SMMU_V2, NVIDIA_SMMUV2);
>> The ARM MMU-500 implementation is unmodified. It is the way the are
>> integrated and used together(for interleaved accesses) is different from
>> regular ARM MMU-500.
>> I have added it to get the model number and to be a
Hi Yizhuo,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linus/master]
[cannot apply to v5.3-rc7 next-20190902]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits
On Tue, 3 Sep 2019 at 04:08, Gustavo A. R. Silva wrote:
>
> Add suffix LL to constant 1000 in order to avoid a potential integer
> overflow and give the compiler complete information about the proper
> arithmetic to use. Notice that this constant is being used in a context
> that expects an expres
Hi,
Some people are asking whether the display refresh irq could be provided by
qemu vfio display?
Some background: currently, we have two display timers. One is provided by QEMU
UI and the other one is provided by the vgpu. The vgpu display framebuffer
consumers (i.e. QEMU UIs) depend on the
i.MX8MN DDR4 EVK board has a GPIO LED to indicate status,
add support for it.
Signed-off-by: Anson Huang
---
Changes since V1:
- Mention color in the label.
---
arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/
Hi, Pavel
> On Mon 2019-09-02 16:45:38, Anson Huang wrote:
> > i.MX8MN DDR4 EVK board has a GPIO LED to indicate status, add support
> > for it.
>
> LED maintainers want to be on the cc list...
The get_maintainer.pl does NOT show the LED maintainers...But I have added it
in V2.
>
> > @@ -15,6
Hi Sebastian,
On Tue, 3 Sep 2019 at 05:04, Sebastian Reichel wrote:
>
> Hi,
>
> On Wed, Jul 31, 2019 at 06:00:22PM +0800, Baolin Wang wrote:
> > This patch set adds new attributes for userspace, and fixes the the
> > accuracy issue of coulomb counter calculation, as well as optimizing
> > the bat
> -Original Message-
> From: Andrew Murray
> Sent: 2019年9月2日 20:32
> To: Xiaowei Bao
> Cc: robh...@kernel.org; mark.rutl...@arm.com; shawn...@kernel.org; Leo
> Li ; kis...@ti.com; lorenzo.pieral...@arm.com; M.h.
> Lian ; Mingkai Hu ; Roy
> Zang ; jingooh...@gmail.com;
> gustavo.pimen...
On Mon, 2019-09-02 at 12:53 +0200, Dietmar Eggemann wrote:
> On 22/08/2019 04:17, Rik van Riel wrote:
> > My main TODO items for the next period of time are likely going to
> > be testing, testing, and testing. I hope to find and flush out any
> > corner case I can find, and make sure performance
> -Original Message-
> From: Andrew Murray
> Sent: 2019年9月2日 20:46
> To: Xiaowei Bao
> Cc: robh...@kernel.org; mark.rutl...@arm.com; shawn...@kernel.org; Leo
> Li ; kis...@ti.com; lorenzo.pieral...@arm.com; M.h.
> Lian ; Mingkai Hu ; Roy
> Zang ; jingooh...@gmail.com;
> gustavo.pimen...
> -Original Message-
> From: Andrew Murray
> Sent: 2019年9月2日 20:55
> To: Xiaowei Bao
> Cc: robh...@kernel.org; mark.rutl...@arm.com; shawn...@kernel.org; Leo
> Li ; kis...@ti.com; lorenzo.pieral...@arm.com; M.h.
> Lian ; Mingkai Hu ; Roy
> Zang ; jingooh...@gmail.com;
> gustavo.pimen...
Hi Rob,
Thank you for review comments.
On 2/9/2019 9:38 PM, Rob Herring wrote:
On Wed, Aug 28, 2019 at 08:43:14PM +0800, Ramuthevar,Vadivel MuruganX wrote:
From: Ramuthevar Vadivel Murugan
Add a YAML schema to use the host controller driver with the
SDXC PHY on Intel's Lightning Mountain SoC
On Mon, Sep 02, 2019 at 12:15:05PM +0800, Jason Wang wrote:
> On 2019/8/28 下午1:37, Tiwei Bie wrote:
> > Details about this can be found here:
> >
> > https://lwn.net/Articles/750770/
> >
> > What's new in this version
> > ==
> >
> > There are three choices based on the di
> -Original Message-
> From: Andrew Murray
> Sent: 2019年9月2日 21:06
> To: Xiaowei Bao
> Cc: robh...@kernel.org; mark.rutl...@arm.com; shawn...@kernel.org; Leo
> Li ; kis...@ti.com; lorenzo.pieral...@arm.com; M.h.
> Lian ; Mingkai Hu ; Roy
> Zang ; jingooh...@gmail.com;
> gustavo.pimen...
Hi Rob,
Thank you for the review and Acked-by.
On 2/9/2019 9:39 PM, Rob Herring wrote:
On Tue, 27 Aug 2019 11:58:25 +0800, "Ramuthevar,Vadivel MuruganX"
wrote:
From: Ramuthevar Vadivel Murugan
Add new vendor specific compatible string to check Intel's Lightning
Mountain(LGM) QSPI
This patch prints the stddev and hist for the cycles diff of
program block. It can help us to understand if the cycles
is noisy or not.
This patch is inspired by Andi Kleen's patch
https://lwn.net/Articles/600471/
We create new option '--cycles-hist'.
Example:
perf record -b ./div
perf record -
Select CONFIG_KEYBOARD_IMX_SC_PWRKEY as module by default to
support i.MX8QXP power key driver.
Signed-off-by: Anson Huang
---
No changes.
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 49bb3d
Add scu power key node for i.MX8QXP, disabled by default as it
depends on board design.
Signed-off-by: Anson Huang
---
Changes since V1:
- remove "wakeup-source" property, as it is NOT needed for scu mu
interrupt;
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 7 +++
1 file change
Enable scu power key for i.MX8QXP MEK board.
Signed-off-by: Anson Huang
---
No changes.
---
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
index 1
NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as
system controller, the system controller is in charge of system
power, clock and power key event etc. management, Linux kernel
has to communicate with system controller via MU (message unit)
IPC to get power key event, add binding doc for
i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller
inside, the system controller is in charge of controlling power,
clock and power key etc..
Adds i.MX system controller power key driver support, Linux kernel
has to communicate with system controller via MU (message unit) IPC
to get
Hi, Rob
> On Fri, Aug 30, 2019 at 04:53:45PM -0400, Anson Huang wrote:
> > NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as system
> > controller, the system controller is in charge of system power, clock
> > and power key event etc. management, Linux kernel has to communicate
> > with
> -Original Message-
> From: Andrew Murray
> Sent: 2019年9月2日 21:37
> To: Xiaowei Bao
> Cc: Kishon Vijay Abraham I ; bhelg...@google.com;
> robh...@kernel.org; mark.rutl...@arm.com; shawn...@kernel.org; Leo Li
> ; lorenzo.pieral...@arm.co
> ; a...@arndb.de; gre...@linuxfoundation.org;
>
Hi Tejun,
Sorry for the late reply.
On Fri, Aug 30, 2019 at 09:58:15PM -0700, Tejun Heo wrote:
> Hello,
>
> On Sat, Aug 31, 2019 at 12:03:26PM +0900, Namhyung Kim wrote:
> > Hmm.. it looks hard to use fhandle as the identifier since perf
> > sampling is done in NMI context. AFAICS the encode_f
> -Original Message-
> From: Andrew Murray
> Sent: 2019年9月2日 21:38
> To: Xiaowei Bao
> Cc: robh...@kernel.org; mark.rutl...@arm.com; shawn...@kernel.org; Leo
> Li ; kis...@ti.com; lorenzo.pieral...@arm.com; M.h.
> Lian ; Mingkai Hu ; Roy
> Zang ; jingooh...@gmail.com;
> gustavo.pimen...
>
> Caution: EXT Email
>
> On Fri, Aug 30, 2019 at 05:17:19PM +0800, Biwen Li wrote:
> > Add some properties for pcf85263/pcf85363 as follows:
> > - interrupt-output-pin: string type
> > - quartz-load-capacitance: integer type
> > - quartz-drive-strength: integer type
> > - quartz-low-jit
Hi Jean,
Thanks a lot for your comments. And, yes, it is dangerous that clear all
interrupt bit here based my local test. And about the interrupt flood, I will
show you in attached file. And I agree with you that add SMBALERT interrupt
handler if possible, but I have no idea about what action is
> -Original Message-
> From: Andrew Murray
> Sent: 2019年9月2日 23:07
> To: Xiaowei Bao
> Cc: robh...@kernel.org; mark.rutl...@arm.com; shawn...@kernel.org; Leo
> Li ; kis...@ti.com; lorenzo.pieral...@arm.com; M.h.
> Lian ; Mingkai Hu ; Roy
> Zang ; jingooh...@gmail.com;
> gustavo.pimen...
Hi Dmitry,
Thanks for your explanation.
If I want to abandon this patch, what's step I need to do?
Many thanks,
Johnny
-Original Message-
From: 'Dmitry Torokhov' [mailto:dmitry.torok...@gmail.com]
Sent: Friday, August 30, 2019 2:30 AM
To: Johnny.Chuang
Cc: linux-kernel@vger.kernel.org; l
On 02-09-19, 12:55, H. Nikolaus Schaller wrote:
> With opp-v2 in omap36xx.dtsi and ti-cpufreq driver the
> 1GHz capability is automatically detected.
>
> Signed-off-by: H. Nikolaus Schaller
> ---
> arch/arm/boot/dts/omap3-n950-n9.dtsi | 7 ---
> 1 file changed, 7 deletions(-)
>
> diff --git
On 02-09-19, 12:55, H. Nikolaus Schaller wrote:
> + opp1-12500 {
> + opp-hz = /bits/ 64 <12500>;
> + // we currently only select the max voltage from table
> Table 3-3 of the omap3530 Data sheet (SPRS507F)
> + // coul
Hi Anson,
On Mon, Sep 2, 2019 at 11:05 PM Anson Huang wrote:
> + ret = input_register_device(input);
> + if (ret < 0) {
> + dev_err(&pdev->dev, "failed to register input device\n");
> + return ret;
> + }
> +
> + pdata->input = input;
> +
On 03-09-19, 08:08, Viresh Kumar wrote:
> On 02-09-19, 12:55, H. Nikolaus Schaller wrote:
> > + opp1-12500 {
> > + opp-hz = /bits/ 64 <12500>;
> > + // we currently only select the max voltage from table
> > Table 3-3 of the omap3530 Data sheet
Add some properties for pcf85263/pcf85363 as follows:
- interrupt-output-pin: string type
- quartz-load-femtofarads: integer type
- nxp,quartz-drive-strength: integer type
- nxp,quartz-low-jitter: bool type
- wakeup-source: bool type
Signed-off-by: Martin Fuzzey
Signed-off-by: Biwen Li
Add some features as follow:
- Set quartz oscillator load capacitance by DT
(generate more accuracy frequency)
- Set quartz oscillator drive control by DT
(reduce/increase the current consumption)
- Set low jitter mode by DT
(improve jitter performance)
- Set wakeu
Dear Greg,
Gently ping.
Best Regards,
Chanwoo Choi
On 19. 8. 26. 오전 11:55, Chanwoo Choi wrote:
> Dear Greg,
>
> This is extcon-next pull request for v5.4. I add detailed description of
> this pull request on below. Please pull extcon with following updates.
>
>
> Detailed description for th
Kalle Valo 於 2019年9月2日 週一 下午8:18寫道：
>
> Tony Chuang writes:
>
> >> From: Jian-Hong Pan
> >> Subject: [PATCH v4] rtw88: pci: Move a mass of jobs in hw IRQ to soft IRQ
> >>
> >> There is a mass of jobs between spin lock and unlock in the hardware
> >> IRQ which will occupy much time originally. To
On 2019/9/3 上午9:56, Tiwei Bie wrote:
On Mon, Sep 02, 2019 at 12:15:05PM +0800, Jason Wang wrote:
On 2019/8/28 下午1:37, Tiwei Bie wrote:
Details about this can be found here:
https://lwn.net/Articles/750770/
What's new in this version
==
There are three choices based
Thank you Peter for pointing out my miss, I appreciate that sincerely.
> * MSR_CORE_C3_RESIDENCY: CORE C3 Residency Counter
> * perf code: 0x01
> * Available model: NHM,WSM,SNB,IVB,HSW,BDW,SKL,GLM,
> -
On Tue, 2019-06-25 at 20:52 -0700, Stephen Boyd wrote:
> Quoting Weiyi Lu (2019-06-25 18:05:22)
> > On Tue, 2019-06-25 at 15:14 -0700, Stephen Boyd wrote:
> > > Quoting Weiyi Lu (2019-06-09 20:44:53)
> > > > When using property assigned-clock-parents to assign parent clocks,
> > > > core clocks mig
Hi, Fabio
> On Mon, Sep 2, 2019 at 11:05 PM Anson Huang
> wrote:
>
> > + ret = input_register_device(input);
> > + if (ret < 0) {
> > + dev_err(&pdev->dev, "failed to register input device\n");
> > + return ret;
> > + }
> > +
> > + pdata->input
Heiner Kallweit [mailto:hkallwe...@gmail.com]
> Sent: Tuesday, September 03, 2019 2:37 AM
[...]
> Seeing all this code it might be a good idea to switch this driver
> to phylib, similar to what I did with r8169 some time ago.
It is too complex to be completed for me at the moment.
If this patch is
On Mon 02 Sep 06:07 PDT 2019, Lee Jones wrote:
> Tested on the Lenovo Yoga C630 where this patch enables the
> keyboard, touchpad and touchscreen.
>
> Signed-off-by: Lee Jones
Reviewed-by: Bjorn Andersson
> ---
> arch/arm64/configs/defconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff
On Mon 02 Sep 06:07 PDT 2019, Lee Jones wrote:
> Tested on the Lenovo Yoga C630 where this patch enables the
> framebuffer (screen/monitor). Without it the device appears
> not to boot.
>
> Signed-off-by: Lee Jones
Reviewed-by: Bjorn Andersson
> ---
> arch/arm64/configs/defconfig | 1 +
> 1
On Mon 02 Sep 06:07 PDT 2019, Lee Jones wrote:
> Tested on the Lenovo Yoga C630 where this patch enables USB.
> Without it USB devices are not enumerated.
>
> Signed-off-by: Lee Jones
Reviewed-by: Bjorn Andersson
> ---
> arch/arm64/configs/defconfig | 1 +
> 1 file changed, 1 insertion(+)
>
On Wed, Aug 28, 2019 at 04:07:19PM +0200, Thomas Gleixner wrote:
> On Wed, 28 Aug 2019, Ming Lei wrote:
> > On Wed, Aug 28, 2019 at 01:23:06PM +0200, Thomas Gleixner wrote:
> > > On Wed, 28 Aug 2019, Ming Lei wrote:
> > > > On Wed, Aug 28, 2019 at 01:09:44AM +0200, Thomas Gleixner wrote:
> > > > >
Hi Colin
>Hi Colin
>
>>
>>From: Colin Ian King
>>
>>Currently the check on a non-zero return code in ret is false because
>>ret has been initialized to zero. I believe that ret should be assigned
>>to the return from the call to readl_poll_timeout_atomic before the
>>check on ret. Since ret is
Changes in v2:
- Prepare arm_smu_flush_ops for override.
- Remove NVIDIA_SMMUv2 and use ARM_SMMUv2 model as T194 SMMU hasn't modified
ARM MMU-500.
- Add T194 specific compatible string - "nvidia,tegra194-smmu"
- Remove tlb_sync hook added in v1 and Override arm_smmu_flush_ops->tlb_sync()
from imp
Add binding for NVIDIA's Tegra194 Soc SMMU that is based
on ARM MMU-500.
Signed-off-by: Krishna Reddy
---
Documentation/devicetree/bindings/iommu/arm,smmu.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
b/Documentation/devicetree/
Add the TMU (Thermal Monitoring Unit) device node to enable
TMU feature.
Signed-off-by: Yuantian Tang
---
.../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 108 +++---
1 file changed, 92 insertions(+), 16 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
b/arch
> -Original Message-
> From: Andrew Murray
> Sent: 2019年9月3日 0:26
> To: Xiaowei Bao
> Cc: robh...@kernel.org; mark.rutl...@arm.com; shawn...@kernel.org; Leo
> Li ; kis...@ti.com; lorenzo.pieral...@arm.com; M.h.
> Lian ; Mingkai Hu ; Roy
> Zang ; jingooh...@gmail.com;
> gustavo.pimen...@
> -Original Message-
> From: Cornelia Huck
> Sent: Monday, September 2, 2019 8:16 PM
> To: Parav Pandit
> Cc: alex.william...@redhat.com; Jiri Pirko ;
> kwankh...@nvidia.com; da...@davemloft.net; k...@vger.kernel.org;
> linux-kernel@vger.kernel.org; net...@vger.kernel.org
> Subject: Re
> -Original Message-
> From: Cornelia Huck
> Sent: Monday, September 2, 2019 8:07 PM
> To: Parav Pandit
> Cc: alex.william...@redhat.com; Jiri Pirko ;
> kwankh...@nvidia.com; da...@davemloft.net; k...@vger.kernel.org;
> linux-kernel@vger.kernel.org; net...@vger.kernel.org
> Subject: Re
Uacce (Unified/User-space-access-intended Accelerator Framework) targets to
provide Shared Virtual Addressing (SVA) between accelerators and processes.
So accelerator can access any data structure of the main cpu.
This differs from the data sharing between cpu and io device, which share
data conten
From: Kenneth Lee
Uacce (Unified/User-space-access-intended Accelerator Framework) is
a kernel module targets to provide Shared Virtual Addressing (SVA)
between the accelerator and process.
This patch add document to explain how it works.
Signed-off-by: Kenneth Lee
Signed-off-by: Zaibo Xu
Sig
From: Kenneth Lee
Uacce (Unified/User-space-access-intended Accelerator Framework) targets to
provide Shared Virtual Addressing (SVA) between accelerators and processes.
So accelerator can access any data structure of the main cpu.
This differs from the data sharing between cpu and io device, whi
4.169095][T1] Read of size 4 at addr by task systemd/1
[ 104.176227][T1]
[ 104.178416][T1] CPU: 166 PID: 1 Comm: systemd Not tainted
5.3.0-rc6-next-20190902 #2
[ 104.186504][T1] Hardware name: HPE Apollo 70 /C01_APACHE_MB
, BIOS L50_5.13_1.11 06
Hi all,
After merging the regulator tree, today's linux-next build (powerpc
ppc64_defconfig) failed like this:
ld: drivers/ata/ahci.o:(.opd+0x150): multiple definition of
`regulator_bulk_set_supply_names'; drivers/phy/phy-core.o:(.opd+0x3f0): first
defined here
ld: drivers/ata/ahci.o: in functi
On Wed, Jul 17, 2019 at 01:30:27PM +0200, Stefano Garzarella wrote:
> In order to reduce the number of credit update messages,
> we send them only when the space available seen by the
> transmitter is less than VIRTIO_VSOCK_MAX_PKT_BUF_SIZE.
>
> Signed-off-by: Stefano Garzarella
> ---
> include/
On Mon, Sep 02, 2019 at 11:57:23AM +0200, Stefano Garzarella wrote:
> >
> > Assuming we miss nothing and buffers < 4K are broken,
> > I think we need to add this to the spec, possibly with
> > a feature bit to relax the requirement that all buffers
> > are at least 4k in size.
> >
>
> Okay, shou
I have split this work into 3 simple patches, so the code is straight
forward to review and so that if any mistakes slip in it is easy to
bisect them. In the process of review what it takes to remove
task_rcu_dereference I found yet another user of tasks on the
runqueue in rcu context; the rcuwa
Add a count of the number of rcu users (currently 1) of the task
struct so that we can later add the scheduler case and get rid of the
very subtle task_rcu_dereference, and just use rcu_dereference.
As suggested by Oleg have the count overlap rcu_head so that no
additional space in task_struct i
In the ordinary case today the rcu grace period of a task comes when a
task is reaped, well after the task has left the runqueue. This
change guarantees that the rcu grace period always happens after a
task has left the runqueue. As this is something that usaually happens
today I do not expect
Use rcu_dereference instead of task_rcu_dereference.
Remove task_rcu_dereference.
Remove the complications of rcuwait that were in place because tasks
on the runqueue were not rcu protected. It is now safe to call
wake_up_process if the target was know to be on the runqueue in the
current rcu
On 02-09-2019 16:15, Jon Hunter wrote:
>
> On 28/08/2019 12:18, Nagarjuna Kristam wrote:
>> Tegra fuse clock handle is retrieved in tegra_fuse_probe().
>> tegra_fuse_readl() is exported symbol, which can be called from drivers
>> at any time. tegra_fuse_readl() enables fuse clock and reads corr
On (09/02/19 11:18), James Byrne wrote:
> Commit 5aa068ea4082 ("printk: remove games with previous record flags")
> abolished the practice of setting the log flag to 'c' for the first
> continuation line and '+' for subsequent lines. Now all continuation
> lines are flagged with 'c' and '+' is neve
With the underscore character in the lsm9ds1_imu device name, we get the
following error below, so use a dash, just like the other device names do too.
[3.961399] Unable to handle kernel NULL pointer dereference at virtual
address 0018
[4.010581] Mem abort info:
[4.013838]
On 09/02/2019 11:53 PM, Michael Ellerman wrote:
Segher Boessenkool writes:
On Mon, Sep 02, 2019 at 12:03:12PM +1000, Michael Ellerman wrote:
Michal Suchanek writes:
On bigendian ppc64 it is common to have 32bit legacy binaries but much
less so on littleendian.
I think the toolchain peop
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