> … Thus add a call of the function
> “nfp_nsp_close” for the completion of the exception handling.
I suggest to mention also the addition of a jump target because of
a Linux coding style concern.
…
> +++ b/drivers/net/ethernet/netronome/nfp/abm/main.c
…
> @@ -300,12 +297,16 @@
Hi Stephen,
On 4/22/2020 2:34 PM, Stephen Boyd wrote:
Quoting Sivaprakash Murugesan (2020-04-13 19:55:19)
The CPU on Qualcomm's IPQ platform devices are clocked primarily by a
PLL and xo which are connected to a mux and enable block, This patch adds
The comma should be a period? Don't write
Hi Rob,
On 4/21/2020 2:31 AM, Rob Herring wrote:
On Tue, Apr 14, 2020 at 08:25:16AM +0530, Sivaprakash Murugesan wrote:
This patch adds schema for primary CPU PLL found on few Qualcomm
platforms.
Signed-off-by: Sivaprakash Murugesan
---
[V3]
* Fixed dt binding error in "$id" field.
On 4/21/2020 2:29 AM, Rob Herring wrote:
On Tue, Apr 14, 2020 at 08:25:15AM +0530, Sivaprakash Murugesan wrote:
Qualcomm APCS global block provides a bunch of generic properties which
are required in a device tree. Add YAML schema for these properties.
Signed-off-by: Sivaprakash Murugesan
On 28-04-20, 16:13, Sanjay R Mehta wrote:
> +static void pt_do_cmd_complete(unsigned long data)
> +{
> + struct pt_tasklet_data *tdata = (struct pt_tasklet_data *)data;
> + struct pt_cmd *cmd = tdata->cmd;
> + struct pt_cmd_queue *cmd_q = >pt->cmd_q;
> + u32 tail;
> +
> + tail
On Thu, Apr 30, 2020 at 12:36:09PM -0700, Bjorn Andersson wrote:
> On Wed 29 Apr 23:30 PDT 2020, Manivannan Sadhasivam wrote:
>
> > Add devicetree YAML binding for Qualcomm Inter-Processor Communication
> > Controller (IPCC) block.
> >
> > Signed-off-by: Manivannan Sadhasivam
> > ---
> >
On 28-04-20, 16:13, Sanjay R Mehta wrote:
> From: Sanjay R Mehta
>
> Expose data about the configuration and operation of the
> PTDMA through debugfs entries: device name, capabilities,
> configuration, statistics.
>
> Signed-off-by: Sanjay R Mehta
> ---
> drivers/dma/ptdma/Makefile|
The CPU on Qualcomm's IPQ6018 devices are primarily fed by APSS PLL and XO,
these are connected to a clock mux and enable block.
This patch series adds support for these clocks and inturn enables clocks
required for CPU freq.
[V4]
* Re-written PLL found on IPQ platforms as a separate driver
*
The Qualcomm ipq6018 has apcs block, add compatible for the same.
Also, the apcs provides a clock controller functionality similar
to msm8916 but the clock driver is different.
Create a child platform device based on the apcs compatible for the
clock controller functionality.
Signed-off-by:
add dt-binding for ipq6018 apss clock controller
Signed-off-by: Sivaprakash Murugesan
---
include/dt-bindings/clock/qcom,apss-ipq.h | 12
1 file changed, 12 insertions(+)
create mode 100644 include/dt-bindings/clock/qcom,apss-ipq.h
diff --git
add support for apps pll and apcs clock.
Signed-off-by: Sivaprakash Murugesan
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index
Add dt-bindings for ipq6018 mailbox driver
Reviewed-by: Rob Herring
Signed-off-by: Sivaprakash Murugesan
---
.../bindings/mailbox/qcom,apcs-kpss-global.yaml | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git
Qualcomm APCS global block provides a bunch of generic properties which
are required in a device tree. Add YAML schema for these properties.
Signed-off-by: Sivaprakash Murugesan
---
[V4]
* Addressed Rob's review comments
.../bindings/mailbox/qcom,apcs-kpss-global.txt | 88
The CPUs on Qualcomm ipq based devices are clocked by an alpha PLL.
Add support for the apss pll found on ipq based devices which can
support CPU frequencies above 1Ghz.
Signed-off-by: Sivaprakash Murugesan
---
drivers/clk/qcom/Kconfig| 8
drivers/clk/qcom/Makefile | 1 +
The CPU on Qualcomm ipq platform is clocked primarily by a aplha PLL
and xo which are connected to a mux and enable block.
Add support for the mux and enable block which feeds the CPU on ipq
based devices.
Signed-off-by: Sivaprakash Murugesan
---
[V4]
* Addressed review comments
Add dt-binding for apss pll found on QCOM IPQ platforms
Signed-off-by: Sivaprakash Murugesan
---
.../bindings/clock/qcom,ipq-apsspll.yaml | 49 ++
1 file changed, 49 insertions(+)
create mode 100644
Documentation/devicetree/bindings/clock/qcom,ipq-apsspll.yaml
Hi Robert,
On 20-04-30 18:11, Robert Foss wrote:
> Hey Marco,
>
> On Thu, 30 Apr 2020 at 14:07, Marco Felsch wrote:
> >
> > On 20-04-30 13:20, Sakari Ailus wrote:
> > > On Thu, Apr 30, 2020 at 12:11:57PM +0200, Marco Felsch wrote:
> > > > On 20-04-30 12:59, Sakari Ailus wrote:
> > > > > Hi
On Mon, May 4, 2020 at 9:24 AM Zong Li wrote:
>
> Put __cpu_up_stack_pointer and __cpu_up_task_pointer in data section.
> Currently, these two variables are put in bss section, there is a
> potential risk that secondary harts get the uninitialized value before
> main hart finishing the bss
The paranoidal pointer check in IRQ handler looks very strange - it
really protects us only against bogus drivers which request IRQ line
with null pointer dev_id. However, the code fragment is incorrect
because the dev pointer is used before the actual check which leads
to undefined behavior.
On Sat, May 2, 2020 at 2:03 AM Konrad Dybcio wrote:
>
> Signed-off-by: Konrad Dybcio
Reviewed-by: Amit Kucheria
> ---
> Documentation/devicetree/bindings/thermal/qcom-tsens.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
On Sun, 2020-05-03 at 12:37 +0100, Jonathan Cameron wrote:
> [External]
>
> On Wed, 29 Apr 2020 10:21:29 +0300
> Alexandru Ardelean wrote:
>
> > From: Dragos Bogdan
> >
> > If the serial interface is used, the 8-bit address should be latched using
> > the rising edge of the WR/FSYNC signal.
>
This patch adds schema for primary CPU PLL found on few Qualcomm
platforms.
Signed-off-by: Sivaprakash Murugesan
---
.../devicetree/bindings/clock/qcom,a53pll.txt | 22
.../devicetree/bindings/clock/qcom,a53pll.yaml | 40 ++
2 files changed, 40
Paolo,
On 5/3/20 12:19 AM, Paolo Bonzini wrote:
On 02/05/20 11:24, Suravee Suthikulpanit wrote:
The questions to answer are: what is causing the re-entrancy? and why
is dropping the second EOI update safe?
The answer to the latter could well be "because we've already processed
it", but
On 30. 04. 20, 13:34, Gregory CLEMENT wrote:
> Warn the upper layer when n_gms is ready to receive data
> again. Without this the associated virtual tty remain blocked
s/remain//
> indefinitely.
>
> Fixes: 96fd7ce58ffb ("TTY: create drivers/tty and move the tty core files
> there")
This looks
On Sat, May 2, 2020 at 2:03 AM Konrad Dybcio wrote:
>
> Signed-off-by: Konrad Dybcio
> ---
> drivers/thermal/qcom/tsens-v0_1.c | 142 +-
> drivers/thermal/qcom/tsens.c | 3 +
> drivers/thermal/qcom/tsens.h | 2 +-
> 3 files changed, 145 insertions(+), 2
so that the driver can load by matching the device tree
if compiled as module.
Cc: sta...@vger.kernel.org # v5.3+
Fixes: 90b86fcc47b4 ("DRM: Add KMS driver for the Ingenic JZ47xx SoCs")
Signed-off-by: H. Nikolaus Schaller
---
drivers/gpu/drm/ingenic/ingenic-drm.c | 1 +
1 file changed, 1
Maxime Ripard 於 2020年4月29日 週三 上午12:21寫道：
>
> Hi,
>
> On Mon, Apr 27, 2020 at 03:23:42PM +0800, Jian-Hong Pan wrote:
> > Hi Maxime,
> >
> > Thanks for your V2 patch series! I'm testing it.
> >
> > This patch series is applied upon mainline kernel 5.7-rc2 cleanly and built.
> > System can boot
On 30. 04. 20, 13:34, Gregory CLEMENT wrote:
> Use appropriate print helpers for debug messages.
>
> Signed-off-by: Gregory CLEMENT
> ---
> drivers/tty/n_gsm.c | 18 +-
> 1 file changed, 5 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/tty/n_gsm.c b/drivers/tty/n_gsm.c
On 30. 04. 20, 13:34, Gregory CLEMENT wrote:
> For at least some modems like the TELIT LE910, skipping SOF makes
> transfers blocking indefinitely after a short amount of data
> transferred.
>
> Given the small improvement provided by skipping the SOF (just one
> byte on about 100 bytes), it
From: Ben Chuang
Need to clear some bits in a vendor-defined register after reboot from
Windows 10.
Fixes: e51df6ce668a ("mmc: host: sdhci-pci: Add Genesys Logic GL975x support")
Reported-by: Grzegorz Kowal
Signed-off-by: Ben Chuang
---
drivers/mmc/host/sdhci-pci-gli.c | 5 +
1 file
On Sun, 2020-05-03 at 13:51 +0100, Jonathan Cameron wrote:
> On Wed, 29 Apr 2020 18:17:39 +0300
> Alexandru Ardelean wrote:
>
> > From: Lars-Peter Clausen
> >
> > Let the core handle the buffer scan mask management including allocation
> > and channel selection. Having this handled in a
On Sun, 2020-05-03 at 16:39 +0100, Jonathan Cameron wrote:
> [External]
>
> On Mon, 27 Apr 2020 16:10:57 +0300
> Alexandru Ardelean wrote:
>
> > The final intent is to localize all buffer ops into the
> > industrialio-buffer.c file, to be able to add support for multiple buffers
> > per IIO
On 5/1/20 11:03 PM, Ian Rogers wrote:
> Current expression allows 2 escaped '-,=' characters. However, some
> metrics require more, for example Haswell DRAM_BW_Use.
>
> Fixes: 26226a97724d (perf expr: Move expr lexer to flex)
> Signed-off-by: Ian Rogers
> ---
> tools/perf/util/expr.l | 2 +-
On 5/1/20 11:03 PM, Ian Rogers wrote:
> This is expected in expr.y and metrics use floating point values such as
> x86 broadwell IFetch_Line_Utilization.
>
> Fixes: 26226a97724d (perf expr: Move expr lexer to flex)
> Signed-off-by: Ian Rogers
> ---
> tools/perf/util/expr.l | 14
On Sat, May 2, 2020 at 1:06 PM Bin Meng wrote:
> From: Bin Meng
>
> CONFIG_MTD_M25P80 was removed and replaced by CONFIG_MTD_SPI_NOR in
> commit b35b9a10362d ("mtd: spi-nor: Move m25p80 code in spi-nor.c")
>
> Signed-off-by: Bin Meng
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Hi Bin,
On Sat, May 2, 2020 at 1:05 PM Bin Meng wrote:
> On Sat, May 2, 2020 at 6:09 PM Geert Uytterhoeven
> wrote:
> > On Sat, May 2, 2020 at 6:27 AM Bin Meng wrote:
> > > From: Bin Meng
> > >
> > > Drop CONFIG_MTD_M25P80 that was removed in
> > > commit b35b9a10362d ("mtd: spi-nor: Move
On Thu 30-04-20 11:27:12, Shakeel Butt wrote:
> Lowering memory.max can trigger an oom-kill if the reclaim does not
> succeed. However if oom-killer does not find a process for killing, it
> dumps a lot of warnings.
It shouldn't dump much more than the regular OOM report AFAICS. Sure
there is
On Thu 30-04-20 13:20:10, Shakeel Butt wrote:
> On Thu, Apr 30, 2020 at 12:29 PM Johannes Weiner wrote:
> >
> > On Thu, Apr 30, 2020 at 11:27:12AM -0700, Shakeel Butt wrote:
> > > Lowering memory.max can trigger an oom-kill if the reclaim does not
> > > succeed. However if oom-killer does not
On Thu, Apr 30, 2020 at 01:18:07PM -0700, Bjorn Andersson wrote:
> On Wed 29 Apr 23:30 PDT 2020, Manivannan Sadhasivam wrote:
>
> > From: Venkata Narendra Kumar Gutta
> >
> > Add support for the Inter-Processor Communication Controller (IPCC)
> > driver that coordinates the interrupts (inbound
Use the defined variable "dev" to make the code cleaner.
Signed-off-by: Zhang Shengju
Signed-off-by: Tang Bin
---
sound/soc/qcom/lpass-apq8016.c | 9
sound/soc/qcom/lpass-cpu.c | 39 --
2 files changed, 22 insertions(+), 26 deletions(-)
diff --git
On Fri 01-05-20 09:39:24, Yafang Shao wrote:
> On Fri, May 1, 2020 at 2:27 AM Shakeel Butt wrote:
> >
> > Lowering memory.max can trigger an oom-kill if the reclaim does not
> > succeed. However if oom-killer does not find a process for killing, it
> > dumps a lot of warnings.
> >
>
> I have
The TI PCIe-to-PCI bridge prevents the Intel SoC from entering power
state deeper than PC3, consumes lots of unnecessary power.
On Windows ASPM L1 is enabled on the device and its upstream bridge,
so it can make the Intel SoC reach PC8 or PC10 to save lots of power.
So enable ASPM L1 like
syzbot suspects this bug was fixed by commit:
commit 10476e6304222ced7df9b3d5fb0a043b3c2a1ad8
Author: Peter Zijlstra
Date: Fri Mar 13 08:56:38 2020 +
locking/lockdep: Fix bad recursion pattern
bisection log: https://syzkaller.appspot.com/x/bisect.txt?x=142baee410
start commit:
On Mon, 4 May 2020 10:02:35 +0800
"Ramuthevar, Vadivel MuruganX"
wrote:
> Hi Boris,
>
> On 30/4/2020 9:01 pm, Boris Brezillon wrote:
> > On Thu, 30 Apr 2020 14:36:00 +0200
> > Boris Brezillon wrote:
> >
> >> On Thu, 30 Apr 2020 17:07:03 +0800
> >> "Ramuthevar, Vadivel MuruganX"
> >> wrote:
Gentle reminder.
> -Original Message-
> From: Sandipan Patra
> Sent: Monday, April 20, 2020 9:24 PM
> To: Thierry Reding ; robh...@kernel.org; u.kleine-
> koe...@pengutronix.de; Jonathan Hunter
> Cc: Bibek Basu ; Laxman Dewangan
> ; linux-...@vger.kernel.org;
>
Hi Amit,
On Mon, Mar 30, 2020 at 1:42 PM Amit Daniel Kachhap
wrote:
> This option can be used in Kconfig files to compare the ld version
> and enable/disable incompatible config options if required.
>
> This option is used in the subsequent patch along with GCC_VERSION to
> filter out an
changes v5:
- set MASTER_SLAVE_CFG_UNSUPPORTED as default value
- send a netlink error message on validation error
- more code fixes
changes v4:
- rename port_mode to master_slave
- move validation code to net/ethtool/linkmodes.c
- add UNSUPPORTED state and avoid sending unsupported fields
-
The TJA11xx PHYs have a vendor specific Master/Slave configuration bit,
which is not compatible with IEEE 803.2-2018 spec for 100Base-T1
devices. So, provide a custom config_ange call back to solve this
problem.
Signed-off-by: Oleksij Rempel
---
drivers/net/phy/nxp-tja11xx.c | 43
This UAPI is needed for BroadR-Reach 100BASE-T1 devices. Due to lack of
auto-negotiation support, we needed to be able to configure the
MASTER-SLAVE role of the port manually or from an application in user
space.
The same UAPI can be used for 1000BASE-T or MultiGBASE-T devices to
force MASTER or
On Fri, May 01, 2020 at 10:47:22AM -0500, Jeremy Linton wrote:
> Hi,
>
> Thanks for taking a look at this.
>
> On 5/1/20 2:05 AM, Greg KH wrote:
> > On Thu, Apr 30, 2020 at 04:19:22PM -0500, Jeremy Linton wrote:
> > > On arm64, and possibly other architectures, requesting
> > > IO coherent
Hi!
There's something going wrong with the version numbers:
> I'm pleased to announce the 4.4.220-rt196 stable release.
>
> This release is just an update to the new stable 4.4.215 version
> Or to build 4.4.220-rt196 directly, the following patches should be
...
> You can also build from
Gentle reminder.
> -Original Message-
> From: Sandipan Patra
> Sent: Friday, April 17, 2020 7:03 PM
> To: Thierry Reding ; robh...@kernel.org; u.kleine-
> koe...@pengutronix.de; Jonathan Hunter
> Cc: Bibek Basu ; Bitan Biswas ;
> linux-...@vger.kernel.org; devicet...@vger.kernel.org;
On Mon, May 04, 2020 at 11:47:56AM +1000, Stephen Rothwell wrote:
> Hi all,
>
> [Just adding cc]
>
> On Mon, 4 May 2020 11:46:25 +1000 Stephen Rothwell
> wrote:
> >
> > Hi all,
> >
> > After merging the char-misc tree, Friday's linux-next build (arm64
> > allmodconfig) failed like this:
> >
Gentle reminder.
> -Original Message-
> From: Sandipan Patra
> Sent: Friday, April 17, 2020 7:03 PM
> To: Thierry Reding ; robh...@kernel.org; u.kleine-
> koe...@pengutronix.de; Jonathan Hunter
> Cc: Bibek Basu ; Bitan Biswas ;
> linux-...@vger.kernel.org; devicet...@vger.kernel.org;
Hi Wesley,
On 09-04-20, 15:52, Wesley Cheng wrote:
> This series adds support for the Synopsis 7nm HSPHY USB driver being
> used in QCOM chipsets. The HSPHY register map differs compared to
> other PHY revisions. In addition, modifications and updates are done
> to the QMP driver to add new
Hi Boris,
Thank you very much for the prompt review and suggestions...
On 4/5/2020 3:08 pm, Boris Brezillon wrote:
On Mon, 4 May 2020 10:02:35 +0800
"Ramuthevar, Vadivel MuruganX"
wrote:
Hi Boris,
On 30/4/2020 9:01 pm, Boris Brezillon wrote:
On Thu, 30 Apr 2020 14:36:00 +0200
Boris
On Mon, 4 May 2020 15:15:08 +0800
"Ramuthevar, Vadivel MuruganX"
wrote:
> Hi Boris,
>
>Thank you very much for the prompt review and suggestions...
>
> On 4/5/2020 3:08 pm, Boris Brezillon wrote:
> > On Mon, 4 May 2020 10:02:35 +0800
> > "Ramuthevar, Vadivel MuruganX"
> > wrote:
> >
>
On Sun, May 3, 2020 at 12:29 PM Siddharth Gupta wrote:
>
> Misuse of CONFIG_* in UAPI headers should result in an error as it exposes
> configuration of different targets to userspace.
Sorry, I missed to point out this.
This statement is not precious; it does not expose the kernel
On 03/05/2020 14.58, Peter Zijlstra wrote:
> On Sat, May 02, 2020 at 03:08:00PM +0200, Rasmus Villemoes wrote:
>> On 01/05/2020 22.29, Peter Zijlstra wrote:
>>> +#define static_cond_call(name)
>>> \
>>> + if (STATIC_CALL_KEY(name).func)
Below is the list of build error/warning regressions/improvements in
v5.7-rc4[1] compared to v5.6[2].
Summarized:
- build errors: +1/-3
- build warnings: +95/-80
JFYI, when comparing v5.7-rc4[1] to v5.7-rc3[3], the summaries are:
- build errors: +3/-123
- build warnings: +8/-160
Happy
On Fri 01-05-20 07:59:57, Yafang Shao wrote:
> On Thu, Apr 30, 2020 at 10:57 PM Michal Hocko wrote:
> >
> > On Wed 29-04-20 12:56:27, Johannes Weiner wrote:
> > [...]
> > > I think to address this, we need a more comprehensive solution and
> > > introduce some form of serialization. I'm not sure
On 4/05/20 9:39 am, Ben Chuang wrote:
> From: Ben Chuang
>
> Need to clear some bits in a vendor-defined register after reboot from
> Windows 10.
>
> Fixes: e51df6ce668a ("mmc: host: sdhci-pci: Add Genesys Logic GL975x support")
> Reported-by: Grzegorz Kowal
> Signed-off-by: Ben Chuang
Use devm_platform_ioremap_resource_byname() instead of
platform_get_resource_byname() + devm_ioremap_resource().
Signed-off-by: Zhang Shengju
Signed-off-by: Tang Bin
---
sound/soc/qcom/lpass-cpu.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git
On Mon, May 4, 2020 at 3:03 PM Michal Hocko wrote:
>
> On Fri 01-05-20 09:39:24, Yafang Shao wrote:
> > On Fri, May 1, 2020 at 2:27 AM Shakeel Butt wrote:
> > >
> > > Lowering memory.max can trigger an oom-kill if the reclaim does not
> > > succeed. However if oom-killer does not find a process
On 2/05/20 5:28 pm, Wolfram Sang wrote:
> The 'pengutronix' address is defunct for years. Use the proper contact
> address.
>
> Signed-off-by: Wolfram Sang
Acked-by: Adrian Hunter
> ---
> drivers/mmc/host/sdhci-esdhc.h | 2 +-
> include/linux/platform_data/mmc-esdhc-imx.h | 2 +-
On 30-04-20, 15:15, Dilip Kota wrote:
> +enum {
> + PHY_0,
> + PHY_1,
> + PHY_MAX_NUM
PHY_MAX_NUM = PHY_1?
> +static inline void combo_phy_w32_off_mask(void __iomem *base, unsigned int
> reg,
> + u32 mask, u32 val)
> +{
> + u32 reg_val;
> +
On Mon, May 04, 2020 at 07:05:50AM +, Rajan Vaja wrote:
> Hi Greg,
A: Because it messes up the order in which people normally read text.
Q: Why is top-posting such a bad thing?
A: Top-posting.
Q: What is the most annoying thing in e-mail?
A: No.
Q: Should I include quotations after my
On Mon, May 4, 2020 at 9:24 AM Geert Uytterhoeven wrote:
> JFYI, when comparing v5.7-rc4[1] to v5.7-rc3[3], the summaries are:
> - build errors: +3/-123
> [1]
> http://kisskb.ellerman.id.au/kisskb/branch/linus/head/0e698dfa282211e414076f9dc7e83c1c288314fd/
> (all 239 configs)
> [3]
>
Add a second reset of the I2S block after the audio parameters are set.
Without this, it was observed on the R-Car Gen3 platform that in ~50% of
audio stream starts, the samples on each odd-numbered channel were delayed
by one sample relative to the even-numbered channels: A stereo test stream
was
> But when nfp_nsp_has_hwinfo_lookup fail, the pointer is not released,
Do you distinguish between releasing items and the role of such a pointer?
> which can lead to a memory leak bug.
Would you like to reconsider the usage of the word “can” for
such change descriptions?
Regards,
Markus
On Mon 04-05-20 15:26:52, Yafang Shao wrote:
> On Mon, May 4, 2020 at 3:03 PM Michal Hocko wrote:
> >
> > On Fri 01-05-20 09:39:24, Yafang Shao wrote:
> > > On Fri, May 1, 2020 at 2:27 AM Shakeel Butt wrote:
> > > >
> > > > Lowering memory.max can trigger an oom-kill if the reclaim does not
> >
Hi all,
Changes since 20200501:
My fixes tree contains:
bbefc924d0ff ("ubsan: disable UBSAN_ALIGNMENT under COMPILE_TEST")
7cb1d38f52b1 ("drm/msm: Fix undefined "rd_full" link error")
The qcom tree still had its build failure for which I reverted a commit.
The keys tree gained a conflict
It's not necessary to specify 'void const __force *' casting
for 'drvdata->lpaif'.
Signed-off-by: Zhang Shengju
Signed-off-by: Tang Bin
---
sound/soc/qcom/lpass-cpu.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/sound/soc/qcom/lpass-cpu.c
On 03-05-20, 22:18, Robert Marko wrote:
> Add a driver to setup the USB PHY-s on Qualcom m IPQ40xx series SoCs.
> The driver sets up HS and SS phys.
Applied, thanks
--
~Vinod
On 03-05-20, 22:18, Robert Marko wrote:
> This patch adds the binding documentation for the HS/SS USB PHY found
> inside Qualcom Dakota SoCs.
Applied, thanks
--
~Vinod
On 03-05-20, 22:18, Robert Marko wrote:
> From: John Crispin
>
> Since we now have driver for the USB PHY, lets add the necessary nodes to
> DTSI.
Reviewed-by: Vinod Koul
Bjorn, I have picked the phy and dt binding, feel free to apply this one
Thanks
--
~Vinod
On Mon, May 4, 2020 at 3:35 PM Michal Hocko wrote:
>
> On Mon 04-05-20 15:26:52, Yafang Shao wrote:
> > On Mon, May 4, 2020 at 3:03 PM Michal Hocko wrote:
> > >
> > > On Fri 01-05-20 09:39:24, Yafang Shao wrote:
> > > > On Fri, May 1, 2020 at 2:27 AM Shakeel Butt wrote:
> > > > >
> > > > >
Hi, Corey:
On 2020/4/19 14:29, Tang Bin wrote:
Hi, Corey:
On 2020/4/18 21:49, Corey Minyard wrote:
On Sat, Apr 18, 2020 at 04:02:29PM +0800, Tang Bin wrote:
If the function platform_get_irq() failed, the negative
value returned will not be detected here. So fix error
handling in
30.04.2020 01:00, Sowjanya Komatineni пишет:
> +/*
> + * VI channel input data type enum.
> + * These data type enum value gets programmed into corresponding Tegra VI
> + * channel register bits.
> + */
> +enum tegra_image_dt {
> + TEGRA_IMAGE_DT_YUV420_8 = 24,
> +
On Mai 04 2020, Anup Patel wrote:
> Slightly improved text:
>
> This issue happens on random booting of multiple harts, which means
> it will manifest for BBL and OpenSBI v0.6 (or older version). In OpenSBI
> v0.7 (or higher version), we have HSM extension so all the secondary harts
> are
On 5/4/2020 12:15 AM, Vinod Koul wrote:
> Hi Wesley,
>
> On 09-04-20, 15:52, Wesley Cheng wrote:
>> This series adds support for the Synopsis 7nm HSPHY USB driver being
>> used in QCOM chipsets. The HSPHY register map differs compared to
>> other PHY revisions. In addition, modifications
On Mon, 4 May 2020 at 03:57, Hillf Danton wrote:
>
>
> The comment says, if there is an imbalance between LLC domains (IOW we
> could increase the overall cache use), we need some less-loaded LLC
> domain to pull some load.
>
> To show that imbalance, record busy CPUs as they come and go by
Hi,
On Sun, May 03, 2020 at 11:51:00AM -0700, Reinette Chatre wrote:
> I am struggling with what should follow ...
Since a diff is better than a thousand words :-) see below.
It builds here with my .config but I'm sure it still needs work but you
get the idea. When you do the final version,
On Mon 04-05-20 15:40:18, Yafang Shao wrote:
> On Mon, May 4, 2020 at 3:35 PM Michal Hocko wrote:
> >
> > On Mon 04-05-20 15:26:52, Yafang Shao wrote:
[...]
> > > As explianed above, no eligible task is different from no task.
> > > If there are some candidates but no one is eligible, the system
Lantiq serial driver/IP is reused for a x86 based SoC as well.
Update the Kconfig accordingly.
Signed-off-by: Rahul Tanwar
---
drivers/tty/serial/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index
Thanks for your review. I'll hopefully send a v2 later today.
As for the sensor count, I don't know how many there actually are. I'm
an independent dev and don't have access to any documentation and I'm
solely basing on what I find in downstream, and I think it's 10,
unless mainline expects the
@Michal,
i noticed that linkmodes_fill_reply() some times get not enough
tailroom.
if data->peer_empty == 0
linkmodes_reply_size() size: 476
linkmodes_fill_reply() skb tailroom: 724
if data->peer_empty == 1
linkmodes_reply_size() size: 216
On Mon, May 04, 2020 at 09:11:12AM +0200, Geert Uytterhoeven wrote:
> On Mon, Mar 30, 2020 at 1:42 PM Amit Daniel Kachhap
> wrote:
> > This option can be used in Kconfig files to compare the ld version
> > and enable/disable incompatible config options if required.
> >
> > This option is used in
Am Sonntag, den 03.05.2020, 09:49 -0500 schrieb Adam Ford:
> On Thu, Apr 30, 2020 at 7:46 AM Schrempf Frieder
> wrote:
> > From: Frieder Schrempf
> >
> > According to the documents, the i.MX8M-Mini features a GC320 and a
> > GCNanoUltra GPU core. Etnaviv detects them as:
> >
> >
Merge {CLEAN,MRPROPER,DISTCLEAN}_DIRS into {CLEAN,MRPROPER,DISTCLEAN}_FILES
because the difference is just the -r option passed to the 'rm' command.
Do likewise as commit 1634f2bfdb84 ("kbuild: remove clean-dirs syntax").
Signed-off-by: Masahiro Yamada
---
Makefile | 22
This comment was added by commit ("kbuild: Restore build nr, improve
vmlinux link") [1].
It was talking about if_changed_rule at that time. Now, it is unclear
what to fix.
[1]:
Stripe control programming is governed by following formula, which is
referenced from the HD Audio specification(Revision 1.0a).
{ ((num_channels * bits_per_sample) / number of SDOs) >= 8 }
Currently above is implemented in snd_hdac_get_stream_stripe_ctl().
This patch introduces a structure
Tegra194 supports 4 SDO lines but GCAP register indicates 2 lines. Thus it
does not reflect the true capability of the HW. This patch presents a
workaround by updating NSDO value accordingly in T_AZA_DBG_CFG_2 register.
Signed-off-by: Sameer Pujar
---
sound/pci/hda/hda_tegra.c | 33
This series proposes SW workarounds for Tegra194 HDA HW bugs.
Following are the two issues seen:
1. GCAP register does not reflect true capability.
The actual number of SDO lines is "4", where as it reflects "2".
2. With 4 SDO line configuration playback fails for,
44.1K/48K, 2-channel,
Tegra194 has 4 SDO lines and with this configuration playback fails
for 44.1K/48K, 2-channel and 16-bps. It results in below print,
"aplay: pcm_write:2011: write error: Input/output error"
Below relation is used to derive stripe control and is referenced
from HD Audio Specification: Revision
On Thu, 30 Apr 2020 at 20:28, Arvind Sankar wrote:
>
> This series is on top of efi/next.
>
> Patch 1 fixes the size allocated for x86 boot_params.
> Patch 2 refactors the setting of various hi/lo 32-bit fields, mainly on x86.
> Patch 3 renames pr_efi/pr_efi_err
> Patches 4-6 convert the
Hi Arnd
On Tue, Apr 28, 2020 at 4:41 PM Baolin Wang wrote:
>
> On Tue, Apr 28, 2020 at 4:19 PM Lee Jones wrote:
> >
> > On Tue, 28 Apr 2020, Baolin Wang wrote:
> >
> > > On Tue, Apr 28, 2020 at 3:14 PM Lee Jones wrote:
> > > >
> > > > On Tue, 28 Apr 2020, Baolin Wang wrote:
> > > >
> > > > >
The following commit has been merged into the ras/core branch of tip:
Commit-ID: 3b4ff4eb904fef04c36b39052ca8eb31fa41fad0
Gitweb:
https://git.kernel.org/tip/3b4ff4eb904fef04c36b39052ca8eb31fa41fad0
Author:He Zhe
AuthorDate:Wed, 04 Mar 2020 14:39:07 +08:00
Committer:
> From: Jonathan Cameron
> Sent: Samstag, 2. Mai 2020 19:19
> To: Sa, Nuno
> Cc: Ardelean, Alexandru ; linux-
> i...@vger.kernel.org; linux-kernel@vger.kernel.org; l...@metafoo.de
> Subject: Re: [RFC PATCH 4/4] iio: Track enabled channels on a per channel
> basis
>
> [External]
>
> On Mon, 27
... and correct SPDX-License-Identifier.
Signed-off-by: Oleksij Rempel
---
.../devicetree/bindings/net/nxp,tja11xx.yaml | 51 ---
1 file changed, 32 insertions(+), 19 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml
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