hi Andy,
sorry from a newbie
we found Linux kernel has max joystick buttons up to 80, no more
We are selling USB joystick device QMCP737C for flight simulator,
which is nothing but common USB joystick. it has 104 buttons
Product link
https://x-plane.vip/quickmade/qmcp737c/
it works well on
On 13/07/20 11:03, Catalin Marinas wrote:
> On Sun, Jul 12, 2020 at 05:59:17PM +0100, Valentin Schneider wrote:
>> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
>> index 66dc41fd49f2..96d478fb7a2e 100644
>> --- a/arch/arm64/Kconfig
>> +++ b/arch/arm64/Kconfig
>> @@ -100,6 +100,7 @@ config
On Fri, Jun 26, 2020 at 11:21:06AM -0700, Dexuan Cui wrote:
> parse_apic() allows the user to try a different APIC driver than the
> default one that's automatically chosen. It works for X86-32, but
> doesn't work for X86-64 because it was removed in 2009 for X86-64 by
> commit 7b38725318f4 ("x86:
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
On Fri, Jul 10, 2020 at 05:51:44PM +0100, Will Deacon wrote:
> SeongJae Park (1):
> Documentation/barriers/kokr: Remove references to
> [smp_]read_barrier_depends()
>
> Will Deacon (18):
> tools: bpf: Use local copy of headers including uapi/linux/filter.h
> compiler.h: Split
Lee Jones 於 2020年7月13日 週一 下午2:51寫道：
>
> On Fri, 10 Jul 2020, Matthias Brugger wrote:
>
> >
> >
> > On 07/07/2020 12:30, Gene Chen wrote:
> > > From: Gene Chen
> > >
> > > Rearrange include file.
> > > Remove brackets around raw numbers.
> > > Indicate sub-dev compatible name by using "-"
> > >
On Sun, Jul 12, 2020 at 05:59:14PM +0100, Valentin Schneider wrote:
> Valentin Schneider (3):
> arch_topology, sched/core: Cleanup thermal pressure definition
> sched: Cleanup SCHED_THERMAL_PRESSURE kconfig entry
> arm, arm64: Select CONFIG_SCHED_THERMAL_PRESSURE
Thanks!
13.07.2020 11:31, Chanwoo Choi пишет:
> DEVFREQ supports the default governors like performance, powersave and also
> allows the devfreq driver to add their own governor like tegra30-devfreq.c
> according to their requirement. In result, some sysfs attributes are
> useful or not useful. Prior to
Changelog:
v5 -> v6
Change base commit to b53293fa662e28ae0cdd40828dc641c09f133405
v4 -> v5
Delete unused macro define.
v3 -> v4
1. Cleanup.
v2 -> v3
1. Add checking input module parameter value.
2. Change base commit from 5.8/scsi-queue to 5.9/scsi-queue.
3. Cleanup for unused variables and
This is a patch for parameters to be used for UFS features layer and HPB
module.
Tested-by: Bean Huo
Signed-off-by: Daejun Park
---
drivers/scsi/ufs/ufs.h | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/scsi/ufs/ufs.h b/drivers/scsi/ufs/ufs.h
index
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
On Mon, 13 Jul 2020, Gene Chen wrote:
> Lee Jones 於 2020年7月13日 週一 下午2:51寫道：
> >
> > On Fri, 10 Jul 2020, Matthias Brugger wrote:
> >
> > >
> > >
> > > On 07/07/2020 12:30, Gene Chen wrote:
> > > > From: Gene Chen
> > > >
> > > > Rearrange include file.
> > > > Remove brackets around raw
This patch is adding UFS feature layer to UFS core driver.
UFS Driver data structure (struct ufs_hba)
│
┌--┐
│ UFS feature │ <-- HPB module
│layer │ <-- other extended feature module
└--┘
Each extended UFS-Feature module has a bus of ufs-ext feature type.
在 2020/7/13 下午5:31, Alex Shi 写道:
> diff --git a/Documentation/conf.py b/Documentation/conf.py
> index c50310d9..b5b2be8eec22 100644
> --- a/Documentation/conf.py
> +++ b/Documentation/conf.py
> @@ -36,7 +36,7 @@ needs_sphinx = '1.3'
> # Add any Sphinx extension module names here, as
On Mon, Jul 13, 2020 at 06:46:29AM +0530, Agrawal, Akshu wrote:
> clk binding is present for AMD ST platform and using the same.
This is something you should be doing through UEFI forum as a generic
ACPI thing, and if you need to read the name from the firmware that
really does sound like
On Mon, Jul 13, 2020 at 11:46:04AM +0200, Ahmad Fatoum wrote:
> Hello Philippe,
>
> On 7/10/20 3:24 PM, Philippe Schenker wrote:
> > Since the runtime-pm wakeup bug was fixed in
> > drivers/usb/chipidea/core.c usb dual-role host/device switching is
> > working. So make use of it.
> >
> >
This is a patch for the HPB module.
The HPB module queries UFS for device information during initialization.
We added the export symbol to two functions in ufshcd.c to initialize
the HPB module.
The HPB module can be loaded or built-in as needed.
The mininum size of the memory pool used in the
On Fri, Jul 10, 2020 at 02:12:43PM +0200, Stefano Garzarella wrote:
> Commit 0deab087b16a ("vsock/virtio: use RCU to avoid use-after-free
> on the_virtio_vsock") starts to use RCU to protect 'the_virtio_vsock'
> pointer, but we forgot to annotate it.
>
> This patch adds the annotation to fix the
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
This is a patch for managing L2P map in HPB module.
The HPB divides logical addresses into several regions. A region consists
of several sub-regions. The sub-region is a basic unit where L2P mapping is
managed. The driver loads L2P mapping data of each sub-region. The loaded
sub-region is called
On Mon, Jul 06, 2020 at 08:20:49PM +0300, Mike Rapoport wrote:
> From: Mike Rapoport
>
> Extend memfd_create() system call with the ability to create memory areas
> visible only in the context of the owning process and not mapped not only
> to other processes but in the kernel page tables as
On Mon, Jul 13, 2020 at 5:37 AM Randy Dunlap wrote:
> On 7/12/20 7:27 PM, Linus Torvalds wrote:
> Thanks for replying.
>
> I've already got it built & working.
Me too. 0.6.2 works for me.
--
With Best Regards,
Andy Shevchenko
TI's J721E SoC uses Cadence PCIe core to implement both RC mode
and EP mode.
The high level features are:
*) Supports Legacy, MSI and MSI-X interrupt
*) Supports upto GEN4 speed mode
*) Supports SR-IOV
*) Supports multiple physical function
*) Ability to route all transactions via SMMU
Add a macro for aligning down a pointer. This is useful to get an
aligned register address when a device allows only word access and
doesn't allow half word or byte access.
Acked-by: Rob Herring
Signed-off-by: Kishon Vijay Abraham I
---
include/linux/kernel.h | 1 +
1 file changed, 1
commit bd22885aa188 ("PCI: cadence: Refactor driver to use as a core
library") while refactoring the Cadence PCIe driver to be used as
library, removed pm_runtime_get_sync() from cdns_pcie_ep_setup()
and cdns_pcie_host_setup() but missed to remove the corresponding
pm_runtime_put_sync() in the
Add Kishon Vijay Abraham I as MAINTAINER for TI J721E SoC PCIe.
Acked-by: Rob Herring
Signed-off-by: Kishon Vijay Abraham I
---
MAINTAINERS | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 5bbc2649566b..bdec73c3069e 100644
--- a/MAINTAINERS
Add J721E in pci_device_id table so that pci-epf-test can be used
for testing PCIe EP in J721E.
Reviewed-by: Rob Herring
Signed-off-by: Kishon Vijay Abraham I
---
drivers/misc/pci_endpoint_test.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/misc/pci_endpoint_test.c
Add cdns_pcie_ops to start link and verify link status. The registers
to start link and to check link status is in Platform specific PCIe
wrapper. Add support for platform specific drivers to add callback
functions for the PCIe Cadence core to start link and verify link status.
Signed-off-by:
Certain platforms like TI's J721E using Cadence PCIe IP can perform only
32-bit accesses for reading or writing to Cadence registers. Convert all
read and write accesses to 32-bit in Cadence PCIe driver in preparation
for adding PCIe support in TI's J721E SoC.
Also add spin lock to disable
Certain platforms like TI's J721E allows only 32-bit configuration
space access. In such cases pci_generic_config_read and
pci_generic_config_write cannot be used. Add support in Cadence core
to let pci_host_bridge have custom pci_ops.
Signed-off-by: Kishon Vijay Abraham I
---
Add PCIe EP mode dt-bindings for TI's J721E SoC.
Signed-off-by: Kishon Vijay Abraham I
Reviewed-by: Rob Herring
---
.../bindings/pci/ti,j721e-pci-ep.yaml | 94 +++
1 file changed, 94 insertions(+)
create mode 100644
Add support for PCIe controller in J721E SoC. The controller uses the
Cadence PCIe core programmed by pcie-cadence*.c. The PCIe controller
will work in both host mode and device mode.
Some of the features of the controller are:
*) Supports both RC mode and EP mode
*) Supports MSI and MSI-X
Cadence driver uses "mem" memory resource to obtain the offset of
configuration space address region, memory space address region and
message space address region. The obtained offset is used to program
the Address Translation Unit (ATU). However certain platforms like TI's
J721E SoC require the
Commit 1b79c5284439 ("PCI: cadence: Add host driver for Cadence PCIe
controller") in order to update Vendor ID, directly wrote to
PCI_VENDOR_ID register. However PCI_VENDOR_ID in root port configuration
space is read-only register and writing to it will have no effect.
Use local management
"mem" is not a memory resource and it overlaps with PCIe config space
and memory region. Remove "mem" from reg binding.
Signed-off-by: Kishon Vijay Abraham I
Reviewed-by: Rob Herring
---
.../devicetree/bindings/pci/cdns,cdns-pcie-host.yaml | 8 +++-
1 file changed, 3 insertions(+), 5
From: Alan Douglas
Implement ->set_msix() and ->get_msix() callback functions in order
to configure MSIX capability in the PCIe endpoint controller.
Add cdns_pcie_ep_send_msix_irq() to send MSIX interrupts to Host.
cdns_pcie_ep_send_msix_irq() gets the MSIX table address (virtual
address) from
Add host mode dt-bindings for TI's J721E SoC.
Signed-off-by: Kishon Vijay Abraham I
Reviewed-by: Rob Herring
---
.../bindings/pci/ti,j721e-pci-host.yaml | 113 ++
1 file changed, 113 insertions(+)
create mode 100644
This patch changes the read I/O to the HPB read I/O.
If the logical address of the read I/O belongs to active sub-region, the
HPB driver modifies the read I/O command to HPB read. It modifies the upiu
command of UFS instead of modifying the existing SCSI command.
In the HPB version 1.0, the
This series contains a fix for a edge case in my earlier protection
calculation patches, and a patch to make the area overall a little more
robust to hopefully help avoid this in future.
Changes in v4:
- Fix premature OOM when checking protection on root memcg. Thanks
Naresh and Michal for
On Mon, Jul 06, 2020 at 08:20:50PM +0300, Mike Rapoport wrote:
> From: Mike Rapoport
>
> Removing a PAGE_SIZE page from the direct map every time such page is
> allocated for a secret memory mapping will cause severe fragmentation of
> the direct map. This fragmentation can be reduced by using
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
From: Yafang Shao
A cgroup can have both memory protection and a memory limit to isolate
it from its siblings in both directions - for example, to prevent it
from being shrunk below 2G under high pressure from outside, but also
from growing beyond 4G under low pressure.
Commit 9783aa9917f8
mem_cgroup_protected currently is both used to set effective low and min
and return a mem_cgroup_protection based on the result. As a user, this
can be a little unexpected: it appears to be a simple predicate function,
if not for the big warning in the comment above about the order in which
it
On sparc32, tcflag_t is "unsigned long", unlike on all other
architectures, where it is "unsigned int":
drivers/net/usb/hso.c: In function ‘hso_serial_set_termios’:
include/linux/kern_levels.h:5:18: warning: format ‘%d’ expects argument of
type ‘unsigned int’, but argument 4 has type
On Fri, Jul 10, 2020 at 11:38 PM Bjorn Helgaas wrote:
>
> From: Bjorn Helgaas
>
> Unexport a couple functions that are no longer needed by modules.
>
> Bjorn Helgaas (2):
> PCI/ACPI: Unexport acpi_pci_osc_control_set()
> PCI/ACPI: Unexport acpi_pci_find_root()
For both:
Acked-by: Rafael J.
Hello all,
On Mon, Jul 13, 2020 at 3:29 AM Jiaxun Yang wrote:
>
> 在 2020/7/12 18:01, kernel test robot 写道:
> > tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> > master
> > head: 0aea6d5c5be33ce94c16f9ab2f64de1f481f424b
> > commit:
On 13-07-20, 11:38, Swapnil Jakhade wrote:
> Add new PHY attribute max_link_rate to struct phy_attrs.
> Add a pair of PHY APIs to get/set all the PHY attributes.
> Use phy_set_attrs() to set attribute values in the PHY provider driver.
> Use phy_get_attrs() to get attribute values in the
On Fri, 2020-07-10 at 15:47 +0200, Matthias Brugger wrote:
>
> On 02/07/2020 14:57, Hanks Chen wrote:
> > this adds initial MT6779 dts settings for board support,
> > including cpu, gic, timer, ccf, pinctrl, uart, sysirq...etc.
> >
> > Signed-off-by: Hanks Chen
> > ---
> >
On Thu, Jul 9, 2020 at 8:43 PM David E. Box wrote:
>
> This patch implements a solution for a BIOS hack used on some currently
> shipping Intel systems to change driver power management policy for PCIe
> NVMe drives. Some newer Intel platforms, like some Comet Lake systems,
> require that PCIe
On Mon, Jul 13, 2020 at 01:10:50AM +0200, Sedat Dilek wrote:
> When using Clang's Integrated Assembler (LLVM_IAS=1) we fell over
> ClangBuiltLinux (CBL) issue #1043 where Jian Cai provided a fix.
>
> With Jian's fix applied another issue raised up when CONFIG_HYPERV=m.
>
> It turned out that the
On 13/07/2020 09:45, Neal Liu wrote:
On Fri, 2020-07-10 at 14:14 +0200, Matthias Brugger wrote:
[snip]
+
+static int get_vio_slave_num(int slave_type)
I have a hard time to understand the usefullness of this, can you please
explain.
The basic idea is to get total numbers of slaves.
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
On Mon, Jul 13, 2020 at 10:35 AM Shiju Jose wrote:
>
> Hi Rafael, Hi James,
>
> Can you help to merge this patch because I added and tested all the
> suggestions from James.
I could apply the [1/2] in principle, but I need an ACK for the [2/2]
from the PCI side.
That said, it looks like the
On 10/07/2020 14:39, Cristian Marussi wrote:
Remove __packed attribute from struct scmi_event_header.
Signed-off-by: Cristian Marussi
A drive-by review. But this doesn't look safe to me. sizeof(struct
scmi_event_header) is used in several places and this change will modify
that from 13 to
On Thu, Jul 9, 2020 at 5:16 AM Douglas Anderson wrote:
>
> As per Qualcomm, there is a PDC hardware issue (with the specific IP
> rev that exists on sc7180) that causes the PDC not to work properly
> when configured to handle dual edges.
>
> Let's work around this by emulating only ever letting
On 10/07/2020 14:39, Cristian Marussi wrote:
Remove __packed attribute from struct scmi_event_header.
Signed-off-by: Cristian Marussi
A drive-by review. But this doesn't look safe to me. sizeof(struct
scmi_event_header) is used in several places and this change will modify
that from 13 to
On Mon, 13 Jul 2020 05:07:44 +
"Ardelean, Alexandru" wrote:
> On Sun, 2020-07-12 at 13:02 +0100, Jonathan Cameron wrote:
> > On Thu, 9 Jul 2020 17:21:56 +0200
> > Artur Rojek wrote:
> >
> > > Introduce error checks for the clk_enable calls used in this driver.
> > > As part of the
On Mon, Jul 06, 2020 at 03:28:38PM +0100, Qais Yousef wrote:
> +static void __uclamp_sync_util_min_rt_default(struct task_struct *p)
> +{
> + unsigned int default_util_min;
> + struct uclamp_se *uc_se;
> +
> + WARN_ON_ONCE(!rcu_read_lock_held());
> +
> + if (!rt_task(p))
> +
On Mon, Jul 13, 2020 at 08:59:49AM +0100, Lee Jones wrote:
> This is the only use of kerneldoc in the sourcefile and no
> descriptions are provided.
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/scsi/virtio_scsi.c:109: warning: Function parameter or member
> 'vscsi' not
On Wed, Jul 8, 2020 at 7:48 PM Lad Prabhakar
wrote:
> RZ/G2H (R8A774E1) SoC also has the R-Car gen3 compatible SCIF ports,
> so document the SoC specific bindings.
>
> Signed-off-by: Lad Prabhakar
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert
On Mon, Jul 13, 2020 at 10:27:47AM +0200, Pali Rohár wrote:
> On Friday 10 July 2020 10:18:00 Lorenzo Pieralisi wrote:
> > On Thu, Jul 09, 2020 at 05:09:59PM +0200, Pali Rohár wrote:
> > > > I understand that but the bridge bus resource can be trimmed to just
> > > > contain the root bus because
On Wed, Jul 8, 2020 at 7:48 PM Lad Prabhakar
wrote:
> RZ/G2H (R8A774E1) SoC also has the R-Car gen3 compatible HSCIF ports,
> so document the SoC specific bindings.
>
> Signed-off-by: Lad Prabhakar
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert
On 10-07-20, 09:06, Greg KH wrote:
> On Thu, Jul 09, 2020 at 11:09:33PM +0200, Alexander A. Klimov wrote:
> > Rationale:
> > Reduces attack surface on kernel devs opening the links for MITM
> > as HTTPS traffic is much harder to manipulate.
> >
> > Deterministic algorithm:
> > For each file:
> >
On Wed, Jul 8, 2020 at 7:48 PM Lad Prabhakar
wrote:
> Document SDHI controller for RZ/G2H (R8A774E1) SoC, which is compatible
> with R-Car Gen3 SoC family.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
On Wed, Jul 8, 2020 at 7:48 PM Lad Prabhakar
wrote:
> From: Marian-Cristian Rotariu
>
> Document SoC specific bindings for RZ/G2H (r8a774e1) SoC.
>
> Signed-off-by: Marian-Cristian Rotariu
>
> Signed-off-by: Lad Prabhakar
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
On Fri, Jul 10, 2020 at 09:16:57AM -0600, Rob Herring wrote:
> On Tue, Jun 16, 2020 at 6:57 AM Bharat Kumar Gogada
> wrote:
> >
> > - Add support for Versal CPM as Root Port.
> > - The Versal ACAP devices include CCIX-PCIe Module (CPM). The integrated
> > block for CPM along with the integrated
On Fri, Jul 10, 2020 at 05:51:51PM +0100, Will Deacon wrote:
> Since commit 76ebbe78f739 ("locking/barriers: Add implicit
> smp_read_barrier_depends() to READ_ONCE()"), there is no need to use
> smp_read_barrier_depends() outside of the Alpha architecture code.
>
> Unfortunately, there is
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
Hi, Shuah!
> On Fri, 10 Jul 2020 08:18:49 -0600, Shuah Khan wrote:
> On 7/10/20 12:02 AM, Yauheni Kaliuta wrote:
>> On Thu, Jul 9, 2020 at 6:36 PM Shuah Khan wrote:
>>>
>>> On 7/9/20 12:49 AM, kernel test robot wrote:
Greeting,
FYI, we noticed the following commit
On Wed, Jul 8, 2020 at 7:48 PM Lad Prabhakar
wrote:
> From: Marian-Cristian Rotariu
>
> Enable the Renesas RZ/G2H (R8A774E1) SoC in the ARM64 defconfig.
>
> Signed-off-by: Marian-Cristian Rotariu
>
> Signed-off-by: Lad Prabhakar
Reviewed-by: Geert Uytterhoeven
i.e. will queue in
On Mon, Jul 13, 2020 at 01:21:25PM +0200, Peter Zijlstra wrote:
> + * copy_process() sysctl_uclamp
> + *uclamp_min_rt = X;
> + * write_lock(_lock) read_lock(_lock)
> + * // link thread
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
On 2020-07-13 10:12, Claire Chang wrote:
This series implements mitigations for lack of DMA access control on
systems without an IOMMU, which could result in the DMA accessing the
system memory at unexpected times and/or unexpected addresses, possibly
leading to data leakage or corruption.
For
Changes since v1:
- Reclaim only SWAP_CLUSTER_MAX pages on reclaim retries, and add
comment explaining why. Thanks Johannes for the suggestion.
- Unify into series.
Chris Down (2):
mm, memcg: reclaim more aggressively before high allocator throttling
mm, memcg: unify reclaim retry limits
Reclaim retries have been set to 5 since the beginning of time in
commit 66e1707bc346 ("Memory controller: add per cgroup LRU and
reclaim"). However, we now have a generally agreed-upon standard for
page reclaim: MAX_RECLAIM_RETRIES (currently 16), added many years later
in commit 0a0337e0d1d1
In Facebook production, we've seen cases where cgroups have been put
into allocator throttling even when they appear to have a lot of slack
file caches which should be trivially reclaimable.
Looking more closely, the problem is that we only try a single cgroup
reclaim walk for each return to
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 11ba468877bb23f28956a35e896356252d63c983
commit: 670d0a4b10704667765f7d18f7592993d02783aa sparse: use identifiers to
define address spaces
date: 4 weeks ago
config: powerpc-randconfig-s031-20200713
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
On Tue, Jun 23, 2020 at 11:35:47AM -0700, Tim Harvey wrote:
> Add Gateworks System Controller support to Gateworks Ventana boards:
> - add dt bindings for GSC mfd driver and hwmon driver for ADC's and
> fan controllers.
> - add dt bindings for gpio-keys driver for push-button and interrupt
Just to check in again since this is still happening: is this expected?
I expect that if this is IWL_WARN, it should indicate some unexpected or
non-ideal state, but the card seems to operate just fine afterwards.
On Sat, Jul 11, 2020 at 05:59:54PM +0300, Alexey Dobriyan wrote:
> Leading comma prevents arbitrary reordering of initialisation clauses.
> The whole point of C99 initialisation is to allow any such reordering.
I'm conflicted on this argument, the only reason I'd be inclined to take
this patch is
Steven suggested a way to resolve the appearance of the warning banner
that appears as a result of using trace_printk() in BPF [1].
Applying the patch and testing reveals all works as expected; we
can call bpf_trace_printk() and see the trace messages in
/sys/kernel/debug/tracing/trace_pipe and no
Simple selftests that verifies bpf_trace_printk() returns a sensible
value and tracing messages appear.
Signed-off-by: Alan Maguire
Acked-by: Andrii Nakryiko
---
.../selftests/bpf/prog_tests/trace_printk.c| 75 ++
tools/testing/selftests/bpf/progs/trace_printk.c |
On Mon, 13 Jul 2020, Michael S. Tsirkin wrote:
> On Mon, Jul 13, 2020 at 08:59:49AM +0100, Lee Jones wrote:
> > This is the only use of kerneldoc in the sourcefile and no
> > descriptions are provided.
> >
> > Fixes the following W=1 kernel build warning(s):
> >
> >
On Mon, 2020-07-13 at 11:46 +0200, Ahmad Fatoum wrote:
> Hello Philippe,
>
> On 7/10/20 3:24 PM, Philippe Schenker wrote:
> > Since the runtime-pm wakeup bug was fixed in
> > drivers/usb/chipidea/core.c usb dual-role host/device switching is
> > working. So make use of it.
> >
> > Signed-off-by:
On 2020-07-13 10:12, Claire Chang wrote:
The bounced DMA ops provide an implementation of DMA ops that bounce
streaming DMA in and out of a specially allocated region. Only the
operations relevant to streaming DMA are supported.
I think there are too many implicit assumptions here - apparently
The bpf helper bpf_trace_printk() uses trace_printk() under the hood.
This leads to an alarming warning message originating from trace
buffer allocation which occurs the first time a program using
bpf_trace_printk() is loaded.
We can instead create a trace event for bpf_trace_printk() and enable
On Mon, Jul 13, 2020 at 03:23:21PM +1000, Nicholas Piggin wrote:
> Excerpts from Pratik Rajesh Sampat's message of July 10, 2020 3:22 pm:
> > Changelog v1 --> v2:
> > 1. Save-restore DAWR and DAWRX unconditionally as they are lost in
> > shallow idle states too
> > 2. Rename
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
Translate the admin-guide index.rst file into Chinese. and link it into
Chinese top index file.
Signed-off-by: Alex Shi
Cc: Harry Wei
Cc: Jonathan Corbet
Cc: linux-...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
.../translations/zh_CN/admin-guide/index.rst | 112 ++
On 7/13/2020 4:41 PM, Vinod Koul wrote:
> On 13-07-20, 11:38, Swapnil Jakhade wrote:
>> Add new PHY attribute max_link_rate to struct phy_attrs.
>> Add a pair of PHY APIs to get/set all the PHY attributes.
>> Use phy_set_attrs() to set attribute values in the PHY provider driver.
>> Use
and link it into admin-guide.
Signed-off-by: Alex Shi
Cc: Harry Wei
Cc: Jonathan Corbet
Cc: linux-...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
.../zh_CN/admin-guide/clearing-warn-once.rst | 9 +
.../translations/zh_CN/admin-guide/index.rst | 15 ++-
The add words is:
Tranlation plan:
Welcome for any part of kernel doc Chinese translation, expecially for
admin-guide part.
Signed-off-by: Alex Shi
Cc: Harry Wei
Cc: Jonathan Corbet
Cc: linux-...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
Documentation/translations/zh_CN/index.rst
On Sun, 12 Jul 2020 at 18:59, Valentin Schneider
wrote:
>
> Hi folks,
>
> This stems from this thread [1] on the list. TL;DR: the thermal pressure
> config
> has no helpful documentation, and figuring out if the right dependencies are
> in
> place is not easy for a regular user.
>
> The current
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
Hi,
On Mon, Jul 13, 2020 at 10:41:31AM +0200, SeongJae Park wrote:
> From: SeongJae Park
>
> This commit exports 'lookup_page_ext()' to GPL modules. It will be used
> by DAMON in following commit for the implementation of the region based
> sampling.
Maybe I'm missing something, but why is
If CONFIG_DEBUG_SHIRQ was enabled, r8a77951-salvator-xs could boot
correctly. If we appended "earlycon keep_bootcon" to the kernel
command like, we could get kernel log like below.
SError Interrupt on CPU0, code 0xbf02 -- SError
CPU: 0 PID: 1 Comm: swapper/0 Not tainted
On 07/13/20 13:21, Peter Zijlstra wrote:
> > +* 2. fork()->sched_post_fork()
> > +*__setscheduler_uclamp()
> > +*
> > +* Both of these functions could read the old value but then get
> > +* preempted, during which a user might write new value to
> > +*
On Sun, Jul 12, 2020 at 08:51:26PM -0700, Linus Torvalds wrote:
> > > Maybe saying "doing the pmd copies for the initial stack isn't
> > > important, so let's just note this as a special case and get rid of
> > > the WARN_ON()" might be an alternative solution.
> >
> > Personally, I feel it is
On 2020-07-13 18:38, Daejun Park wrote:
This is a patch for parameters to be used for UFS features layer and
HPB
module.
Tested-by: Bean Huo
Signed-off-by: Daejun Park
Reviewed-by: Can Guo
---
drivers/scsi/ufs/ufs.h | 12
1 file changed, 12 insertions(+)
diff --git
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