[PATCH] Documentation: filesystems: better locations for sysfs-pci, sysfs-tagging

sysfs-pci and sysfs-tagging were mis-filed: their locations with Documentation/ implied that they were related to file systems. Actually, each topic is about a very specific *use* of sysfs, and sysfs *happens* to be a (virtual) filesystem, so this is not really the right place. It's jarring to be

Re: [PATCH] docs: Make automarkup ready for Sphinx 3.1+

On Wed, Oct 07, 2020 at 11:12:25PM +, Nícolas F. R. A. Prado wrote: > While Sphinx 2 used a single c:type role for struct, union, enum and > typedef, Sphinx 3 uses a specific role for each one. > To keep backward compatibility, detect the Sphinx version and use the > correct roles for that vers

[PATCH v4 17/21] spi: dw: Add memory operations support

Aside from the synchronous Tx-Rx mode, which has been utilized to create the normal SPI transfers in the framework of the DW SSI driver, DW SPI controller supports Tx-only and EEPROM-read modes. The former one just enables the controller to transmit all the data from the Tx FIFO ignoring anything r

[PATCH v4 14/21] spi: dw: Explicitly de-assert CS on SPI transfer completion

By design of the currently available native set_cs callback, the CS de-assertion will be done only if it's required by the corresponding controller capability. But in order to pre-fill the Tx FIFO buffer with data during the SPI memory ops execution the SER register needs to be left cleared before

[PATCH v4 15/21] spi: dw: Move num-of retries parameter to the header file

The parameter will be needed for another wait-done method being added in the framework of the SPI memory operation modification in a further commit. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-dma.c | 5 ++--- drivers/spi/spi-dw.h | 2 ++ 2 files changed, 4 insertions(+), 3 deletions(-

[PATCH v4 18/21] spi: dw: Introduce max mem-ops SPI bus frequency setting

In some circumstances the current implementation of the SPI memory operations may occasionally fail even though they are executed in the atomic context. This may happen if the system bus is relatively slow in comparison to the SPI bus frequency, or there is a concurrent access to it, which makes th

[PATCH v4 16/21] spi: dw: Add generic DW SSI status-check method

The DW SSI errors handling method can be generically implemented for all types of the transfers: IRQ, DMA and poll-based ones. It will be a function which checks the overflow/underflow error flags and resets the controller if any of them is set. In the framework of this commit we make use of the ne

[PATCH v4 10/21] spi: dw: Perform IRQ setup in a dedicated function

In order to make the transfer_one() callback method more readable and for unification with the DMA-based transfer, let's detach the IRQ setup procedure into a dedicated function. While at it rename the IRQ-based transfer handler function to be dw_spi-prefixe and looking more like the DMA-related on

[PATCH v4 11/21] spi: dw: Unmask IRQs after enabling the chip

It's theoretically erroneous to enable IRQ before the chip is turned on. If IRQ handler gets executed before the chip is enabled, then any data written to the Tx FIFO will be just ignored. I say "theoretically" because we haven't noticed any problem with that, but let's fix it anyway just in case.

[PATCH v4 01/21] spi: dw: Use an explicit set_cs assignment

Simplify the dw_spi_add_host() method a bit by replacing the currently implemented default set_cs callback setting up and later having it overwritten by a custom function with direct if-else-based callback assignment. Signed-off-by: Serge Semin --- Changelog v2: - Replace the ternary operator w

[PATCH v4 03/21] spi: dw: Detach SPI device specific CR0 config method

Indeed there is no point in detecting the SPI peripheral device parameters and initializing the CR0 register fields each time an SPI transfer is executed. Instead let's define a dedicated CR0 chip-data member, which will be initialized in accordance with the SPI device settings at the moment of set

[PATCH v4 06/21] spi: dw: Update Rx sample delay in the config function

Rx sample delay can be SPI device specific, and should be synchronously initialized with the rest of the communication and peripheral device related controller setups. So let's move the Rx-sample delay setup into the DW APB SSI configuration update method. Signed-off-by: Serge Semin --- drivers/

[PATCH v4 13/21] spi: dw: De-assert chip-select on reset

SPI memory operations implementation will require to have the CS register cleared before executing the operation in order not to have the transmission automatically started prior the Tx FIFO is pre-initialized. Let's clear the register then on explicit controller reset to fulfil the requirements in

[PATCH v4 20/21] dt-bindings: spi: dw: Add Baikal-T1 SPI Controllers

These controllers are based on the DW APB SSI IP-core and embedded into the SoC, so two of them are equipped with IRQ, DMA, 64 words FIFOs and 4 native CS, while another one as being utilized by the Baikal-T1 System Boot Controller has got a very limited resources: no IRQ, no DMA, only a single nat

[PATCH v4 05/21] spi: dw: Simplify the SPI bus speed config procedure

The code currently responsible for the SPI communication speed setting up is a bit messy. Most likely for some historical reason the bus frequency is saved in the peripheral chip private data. It's pointless now since the custom communication speed is a SPI-transfer-specific thing and only if there

[PATCH v4 21/21] spi: dw: Add Baikal-T1 SPI Controller glue driver

Baikal-T1 is equipped with three DW APB SSI-based MMIO SPI controllers. Two of them are pretty much normal: with IRQ, DMA, FIFOs of 64 words depth, 4x CSs, but the third one as being a part of the Baikal-T1 System Boot Controller has got a very limited resources: no IRQ, no DMA, only a single nativ

[PATCH v4 04/21] spi: dw: Update SPI bus speed in a config function

The SPI bus speed update functionality will be useful in another parts of the driver too (like to implement the SPI memory operations and from the DW SPI glue layers). Let's move it to the update_cr0() method then and since the later is now updating not only the CTRLR0 register alter its prototype

[PATCH v4 12/21] spi: dw: Discard chip enabling on DMA setup error

It's pointless to enable the chip back if the DMA setup procedure fails, since we'll disable it on the next transfer anyway. For the same reason We don't do that in case of a failure detected in any other methods called from the transfer_one() method. While at it consider any non-zero value return

[PATCH v4 09/21] spi: dw: Refactor IRQ-based SPI transfer procedure

Current IRQ-based SPI transfer execution procedure doesn't work well at the final stage of the execution. If all the Tx data is sent out (written to the Tx FIFO) but there is some data left to receive, the Tx FIFO Empty IRQ will constantly happen until all of the requested inbound data is received.

[PATCH v4 19/21] spi: dw: Add poll-based SPI transfers support

A functionality of the poll-based transfer has been removed by commit 1ceb09717e98 ("spi: dw: remove cs_control and poll_mode members from chip_data") with a justification that "there is no user of one anymore". It turns out one of our DW APB SSI core is synthesized with no IRQ line attached and th

[PATCH v4 02/21] spi: dw: Add DWC SSI capability

Currently DWC SSI core is supported by means of setting up the core-specific update_cr0() callback. It isn't suitable for multiple reasons. First of all having exported several methods doing the same thing but for different chips makes the code harder to maintain. Secondly the spi-dw-core driver ex

[PATCH v4 00/21] spi: dw: Add full Baikal-T1 SPI Controllers support

Originally I intended to merge a dedicated Baikal-T1 System Boot SPI Controller driver into the kernel and leave the DW APB SSI driver untouched. But after a long discussion (see the link at the bottom of the letter) Mark and Andy persuaded me to integrate what we developed there into the DW APB SS

[PATCH v4 08/21] spi: dw: Refactor data IO procedure

The Tx and Rx data write/read procedure can be significantly simplified by using Tx/Rx transfer lengths instead of the end pointers. By having the Tx/Rx data leftover lengths (in the number of transfer words) we can get rid of all subtraction and division operations utilized here and there in the t

[PATCH v4 07/21] spi: dw: Add DW SPI controller config structure

DW APB SSI controller can be used by the two SPI core interfaces: traditional SPI transfers and SPI memory operations. The controller needs to be accordingly configured at runtime when the corresponding operations are executed. In order to do that for the both interfaces from a single function we i

Re: [PATCH 4/4] soc: mediatek: mmsys: Use an array for setting the routing registers

Hi, Enric: Enric Balletbo i Serra 於 2020年10月7日 週三 上午3:33寫道： > > From: CK Hu > > Actually, setting the registers for routing, use multiple 'if-else' for > different > routes, but this code would be more and more complicated while we > support more and more SoCs. Change that and use a table per S

Re: [PATCH v3 06/10] x86: elf: Use e_machine to select start_thread for x32

On Sat, Oct 3, 2020 at 8:26 PM Gabriel Krisman Bertazi wrote: > > Since TIF_X32 is going away, avoid using it to find the ELF type in > compat_start_thread. > > According to SysV AMD64 ABI Draft, an AMD64 ELF object using ILP32 must > have ELFCLASS32 with (E_MACHINE == EM_X86_64), so use that ELF

Re: [PATCH v3 09/10] x86: Convert mmu context ia32_compat into a proper flags field

On Sat, Oct 3, 2020 at 8:26 PM Gabriel Krisman Bertazi wrote: > > The ia32_compat attribute is a weird thing. It mirrors TIF_IA32 and > TIF_X32 and is used only in two very unrelated places: (1) to decide if > the vsyscall page is accessible (2) for uprobes to find whether the > patched instructi

[PATCH v4 0/7] FPGA Security Manager Class Driver

The FPGA Security Manager class driver provides a common API for user-space tools to manage updates for secure FPGA devices. Device drivers that instantiate the FPGA Security Manager class driver will interact with a HW secure update engine in order to transfer new FPGA and BMC images to FLASH so t

[PATCH v4 3/7] fpga: sec-mgr: expose sec-mgr update status

Extend the FPGA Security Manager class driver to include an update/status sysfs node that can be polled and read to monitor the progress of an ongoing secure update. Sysfs_notify() is used to signal transitions between different phases of the update process. Signed-off-by: Russ Weight Reviewed-by

[PATCH v4 4/7] fpga: sec-mgr: expose sec-mgr update errors

Extend the FPGA Security Manager class driver to include an update/error sysfs node that can be read for error information when a secure update fails. Signed-off-by: Russ Weight Reviewed-by: Tom Rix --- v4: - Changed from "Intel FPGA Security Manager" to FPGA Security Manager" and removed

[PATCH v4 1/7] fpga: sec-mgr: intel fpga security manager class driver

Create the FPGA Security Manager class driver. The security manager provides interfaces to manage secure updates for the FPGA and BMC images that are stored in FLASH. The driver can also be used to update root entry hashes and to cancel code signing keys. This patch creates the class driver and pr

[PATCH v4 6/7] fpga: sec-mgr: enable cancel of secure update

Extend the FPGA Security Manager class driver to include an update/cancel sysfs file that can be written to request that an update be canceled. The write may return EBUSY if the update has progressed to the point that it cannot be canceled by software or ENODEV if there is no update in progress. S

[PATCH v4 2/7] fpga: sec-mgr: enable secure updates

Extend the FPGA Security Manager class driver to include an update/filename sysfs node that can be used to initiate a security update. The filename of a secure update file (BMC image, FPGA image, Root Entry Hash image, or Code Signing Key cancellation image) can be written to this sysfs entry to c

[PATCH v4 5/7] fpga: sec-mgr: expose sec-mgr update size

Extend the FPGA Security Manager class driver to include an update/remaining_size sysfs node that can be read to determine how much data remains to be transferred to the secure update engine. This file can be used to monitor progress during the "writing" phase of an update. Signed-off-by: Russ Wei

[PATCH v4 7/7] fpga: sec-mgr: expose hardware error info

Extend the FPGA Security Manager class driver to include an optional update/hw_errinfo sysfs node that can be used to retrieve 64 bits of device specific error information following a secure update failure. The underlying driver must provide a get_hw_errinfo() callback function to enable this feat

Re: [PATCH v4 6/7] selftests/ftrace: Add test case for synthetic event dynamic strings

On Sun, 4 Oct 2020 17:14:08 -0500 Tom Zanussi wrote: > Add a selftest that defines and traces a synthetic event that uses a > dynamic string event field. > > Signed-off-by: Tom Zanussi This looks good to me. Acked-by: Masami Hiramatsu Thank you! > --- > .../trigger-synthetic-event-dynstri

Re: [PATCH 1/3] ARM: dts: BCM5301X: Linksys EA9500 make use of pinctrl

On Wed, Oct 07, 2020 at 05:46:33PM -0400, Vivek Unune wrote: > On Wed, Oct 07, 2020 at 11:01:34PM +0200, Andrew Lunn wrote: > > On Wed, Oct 07, 2020 at 03:01:50PM -0400, Vivek Unune wrote: > > > Forgo the use of mmioreg mdio mux infavor of the pinctrl > > > > Hi Vivek > > > > Could you add some m

Re: [PATCH 3/3] f2fs: Add metadata encryption support

On Wed, Oct 07, 2020 at 02:20:52PM -0700, Eric Biggers wrote: > On Mon, Oct 05, 2020 at 07:36:06AM +, Satya Tangirala wrote: > > Wire up metadata encryption support with the fscrypt metadata crypt > > additions. > > > > Introduces a new mount option for metadata encryption - > > metadata_crypt

Re: [PATCH 2/3] ARM: dts: BCM5301X: Linksys EA9500 add port 5 and port 7

> This router is currently not enabled in Openwrt You have to be careful here. Not everything runs OpenWRT. You cannot break backwards compatibility in mainline, simple as that. You need to ensure that mainline does not see a change in the CPU port. Andrew

Re: [PATCH v4 5/7] tracing: Add README information for synthetic_events file

Hi Tom, On Sun, 4 Oct 2020 17:14:07 -0500 Tom Zanussi wrote: > Add an entry with a basic description of events/synthetic_events along > with a simple example. > > Signed-off-by: Tom Zanussi This looks good to me. Reviewed-by: Masami Hiramatsu Thank you, > --- > kernel/trace/trace.c | 7

Re: [PATCH v9 03/15] dt-bindings: usb: Maxim type-c controller device tree binding document

Hi Robb, Thanks for the reviews ! Responses inline. Regards, Badhri On Mon, Oct 5, 2020 at 7:46 AM Rob Herring wrote: > > On Mon, Sep 28, 2020 at 07:39:52PM -0700, Badhri Jagan Sridharan wrote: > > Add device tree binding document for Maxim TCPCI based Type-C chip driver > > > > Signed-off-by:

[PATCH 3/5] memory: tegra: Sort tegra210_swgroups by reg address

This is a cleanup change to prepare for new swgroups. Signed-off-by: Nicolin Chen --- drivers/memory/tegra/tegra210.c | 20 ++-- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/memory/tegra/tegra210.c b/drivers/memory/tegra/tegra210.c index e8a7d266802c..b

[PATCH 1/5] memory: tegra: Correct la.reg address of seswr

According to Tegra X1 TRM, ALLOWANCE_SESWR is located in field [23:16] of register at address 0x3e0 with a reset value of 0x80 at register 0x3e0, while bit-1 of register 0xb98 is for enable bit of seswr. So this patch fixes it. Signed-off-by: Nicolin Chen --- drivers/memory/tegra/tegra210.c | 2

[PATCH 0/5] memory: tegra: Fix client list and add swgroups

This series has two fixes of tegra210_mc_clients, and three changes to add missing swgroups, according to Tegra X1 TRM. Nicolin Chen (5): memory: tegra: Correct la.reg address of seswr memory: tegra: Correct tegra210_mc_clients def values memory: tegra: Sort tegra210_swgroups by reg address

[PATCH 4/5] dt-bindings: memory: tegra: Add missing swgroups

According to Tegra X1 TRM, there are missing swgroups in the tegra210_swgroups list. So this patch adds them in bindings. Note that the TEGRA_SWGROUP_GPU (in list) should be actually TEGRA_SWGROUP_GPUB (in TRM), yet TEGRA_SWGROUP_GPU (in TRM) is not being used -- only TEGRA_SWGROUP_GPUB (in TRM) i

Re: [PATCH 07/13] mm: close race in generic_access_phys

On 10/7/20 9:44 AM, Daniel Vetter wrote: Way back it was a reasonable assumptions that iomem mappings never change the pfn range they point at. But this has changed: - gpu drivers dynamically manage their memory nowadays, invalidating ptes with unmap_mapping_range when buffers get moved - co

[PATCH 5/5] memory: tegra: Complete tegra210_swgroups

According to Tegra X1 TRM, there are missing swgroups in the tegra210_swgroups list. So this patch adds them to the list. Note that the TEGRA_SWGROUP_GPU (in list) should be actually TEGRA_SWGROUP_GPUB (in TRM), yet TEGRA_SWGROUP_GPU (in TRM) is not being used -- only TEGRA_SWGROUP_GPUB (in TRM) i

[PATCH 2/5] memory: tegra: Correct tegra210_mc_clients def values

Some def values are mismatched with Tegra X1 TRM, probably because being copied from tegra124.c file. So this patch fixes them. Signed-off-by: Nicolin Chen --- drivers/memory/tegra/tegra210.c | 28 ++-- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/drive

Re: [PATCH v2 1/6] mfd: intel-m10-bmc: support for MAX10 BMC Security Engine

On 10/7/20 12:00 AM, Lee Jones wrote: > On Fri, 02 Oct 2020, Russ Weight wrote: > >> Add macros and definitions required by the MAX10 BMC >> Security Engine driver. >> >> Signed-off-by: Russ Weight >> --- >> v2: >> - These functions and macros were previously distributed among >> the patc

RE: [PATCH V2 0/7] remoteproc: imx_rproc: support iMX8MQ/M

Mathieu, Oleksij > Subject: [PATCH V2 0/7] remoteproc: imx_rproc: support iMX8MQ/M Do you have time to give a look at this patchset? Thanks, Peng. > > V2: > Rebased on linux-next > Dropped early boot feature to make patchset simple. > Drop rsc-da > > V1: > https://patchwork.kernel.org/cov

Re: [PATCH v2 1/6] mfd: intel-m10-bmc: support for MAX10 BMC Security Engine

On 10/6/20 9:34 AM, Tom Rix wrote: > On 10/2/20 6:24 PM, Russ Weight wrote: >> Add macros and definitions required by the MAX10 BMC >> Security Engine driver. >> >> Signed-off-by: Russ Weight >> --- >> v2: >> - These functions and macros were previously distributed among >> the patches th

Re: [PATCH v9 05/15] dt-bindings: connector: Add property to set initial current cap for FRS

On Tue, Oct 6, 2020 at 11:29 AM Rob Herring wrote: > > On Mon, Sep 28, 2020 at 07:39:54PM -0700, Badhri Jagan Sridharan wrote: > > This change adds frs-typec-current which allows setting the initial current > > capability of the new source when vSafe5V is applied during PD3.0 > > sink Fast Role Sw

Re: [PATCH] PM: runtime: Use pmruntime sync variant to put suppliers

Hi Rafael, On 10/7/20 5:37 PM, Rafael J. Wysocki wrote: > On Wed, Oct 7, 2020 at 2:20 AM Stanimir Varbanov > wrote: >> >> Calling pm_runtime_put_sync over a device with suppliers with device >> link flags PM_RUNTIME | RPM_ACTIVE it is observed that the supplier >> is not put (turned off) at the e

[PATCH 2/2] Arm: dts: aspeed-g6: Add sgpio node and pinctrl setting

This patch is used to add sgpiom and sgpios nodes and add pinctrl setting for sgpiom1 Signed-off-by: Billy Tsai --- arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi | 5 ++ arch/arm/boot/dts/aspeed-g6.dtsi | 53 ++ drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c | 30

[PATCH 0/2] Fix the memory layout and add sgpio node for aspeed g6

Fix the memory layout and add sgpio node for aspeed g6 Billy Tsai (2): Arm: dts: aspeed-g6: Fix the register range of gpio Arm: dts: aspeed-g6: Add sgpio node and pinctrl setting arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi | 5 ++ arch/arm/boot/dts/aspeed-g6.dtsi | 55 +

[PATCH 1/2] Arm: dts: aspeed-g6: Fix the register range of gpio

This patch is used to fix the memory range of gpio0 Signed-off-by: Billy Tsai --- arch/arm/boot/dts/aspeed-g6.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index 97ca743363d7..ad19dce038ea 100644 --- a

Re: [PATCH 10/18] clk: meson: use semicolons rather than commas to separate statements

Quoting Jerome Brunet (2020-09-28 02:47:24) > > On Sun 27 Sep 2020 at 21:12, Julia Lawall wrote: > > Hi Stephen, > > Do you want to take all the clock related patches directly ? > > Sure that's fine.

Re: [PATCH v10 3/3] clk: mediatek: add UART0 clock support

Quoting Hanks Chen (2020-10-03 03:06:47) > Hi Michael & Stephen, > > Please kindly let me know your comments about this patch. > Thanks > What's the base for this patch? I tried applying to v5.9-rc1 and it didn't work.

Re: [PATCH v3 0/2] scsi: arcmsr: use upper_32_bits() instead of dma_addr_hi32()

Ching, > 1. Use upper_32_bits() instead of dma_addr_hi32(). > 2. Use round_up() instead of logical operation. Merged these. Thanks! -- Martin K. Petersen Oracle Linux Engineering

Re: ext4 regression in v5.9-rc2 from e7bfb5c9bb3d on ro fs with overlapped bitmaps

On Wed, Oct 07, 2020 at 01:14:24PM -0700, Josh Triplett wrote: > > That sounds like a conversation that would have been a lot more > interesting and enjoyable if it hadn't started with "can we shoot it in > the head", and continued with the notion that anything other than > e2fsprogs making someth

[PATCH v4 1/4] firmware: keembay: Add support for Arm Trusted Firmware Service call

From: Muhammad Husaini Zulkifli Add header file to handle API function for device driver to communicate with Arm Trusted Firmware. Signed-off-by: Muhammad Husaini Zulkifli --- .../linux/firmware/intel/keembay_firmware.h | 47 +++ 1 file changed, 47 insertions(+) create mode

[PATCH v4 2/4] dt-bindings: mmc: Add uhs-gpio for Keem Bay UHS-1 Support

From: Muhammad Husaini Zulkifli Add DT bindings of uhs-gpio for Keem Bay SOC UHS Mode Support Signed-off-by: Muhammad Husaini Zulkifli --- Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree

[PATCH v4 3/4] mmc: sdhci-of-arasan: Add structure device pointer in probe

From: Muhammad Husaini Zulkifli Add struct device *dev in probe func() so that it can widely use in probe to make code more readable. Signed-off-by: Muhammad Husaini Zulkifli --- drivers/mmc/host/sdhci-of-arasan.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mmc/host/sdhci-of-ar

[PATCH v4 0/4] mmc: sdhci-of-arasan: Enable UHS-1 support for Keem Bay SOC

From: Muhammad Husaini Zulkifli Hi. The first patch is the header file to handle ATF call. The second patch is DT binding for arasan controller for uhs support. The third patch is to introduce the structure device pointer in arasan controller probe. The fourth patch is to enable UHS-1 Suppor

[PATCH v4 4/4] mmc: sdhci-of-arasan: Enable UHS-1 support for Keem Bay SOC

From: Muhammad Husaini Zulkifli Voltage switching sequence is needed to support UHS-1 interface. There are 2 places to control the voltage. 1) By setting the AON register using firmware driver calling system-level platform management layer (SMC) to set the register. 2) By controlling the GPIO exp

Re: [PATCH] qla2xxx: Use constant when it is known.

Pavel, > Directly return constant when it is known, to make code easier to > understand. Applied to 5.10/scsi-staging, thanks! -- Martin K. Petersen Oracle Linux Engineering

Re: [PATCH] docs: Make automarkup ready for Sphinx 3.1+

On Wed Oct 7, 2020 at 8:40 PM -03, Matthew Wilcox wrote: > > On Wed, Oct 07, 2020 at 11:12:25PM +, Nícolas F. R. A. Prado wrote: > > While Sphinx 2 used a single c:type role for struct, union, enum and > > typedef, Sphinx 3 uses a specific role for each one. > > To keep backward compatibility,

Re: [PATCH] misc: Kconfig: add a new dependency for HISI_HIKEY_USB

On Wed, Oct 07, 2020 at 07:09:54AM +0200, Mauro Carvalho Chehab wrote: > As warned by Randy: > > on x86_64: > CONFIG_USB_ROLE_SWITCH=m > and HISI_HIKEY_USB=y. > > ld: drivers/misc/hisi_hikey_usb.o: in function `hisi_hikey_usb_remove': > hisi_hikey_usb.c:(.text+0x61):

Re: [PATCH] qla2xxx: Do not consume srb greedily

Daniel, > qla2xx_process_get_sp_from_handle() will clear the slot which the > current srb is stored. So this function has a side effect. Therefore, > we can't use it in qla24xx_process_mbx_iocb_response() to check > for consistency and later again in qla24xx_mbx_iocb_entry(). > > Let's move the

Re: [PATCH] scsi: qla2xxx: initialize value

Tom, > clang static analysis reports this problem: > > qla_nx2.c:694:3: warning: 6th function call argument is > an uninitialized value > ql_log(ql_log_fatal, vha, 0xb090, > ^ Applied to 5.10/scsi-staging, thanks! -- Martin K. Petersen Or

Re: Bug in herd7 [Was: Re: Litmus test for question from Al Viro]

On Wed, Oct 07, 2020 at 03:38:51PM -0700, Paul E. McKenney wrote: > On Wed, Oct 07, 2020 at 03:40:50PM -0400, Alan Stern wrote: > > On Wed, Oct 07, 2020 at 10:50:40AM -0700, Paul E. McKenney wrote: > > > And here is the updated version. > > > > > >

Re: [PATCH -next v2] scsi: qla2xxx: Convert to DEFINE_SHOW_ATTRIBUTE

>> Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code. Applied to 5.10/scsi-staging, thanks! -- Martin K. Petersen Oracle Linux Engineering

Re: [PATCH 2/2] riscv: Fixup static_obj() fail v2

On Thu, Oct 8, 2020 at 3:46 AM Atish Patra wrote: > > On Wed, Oct 7, 2020 at 8:09 AM wrote: > > > > From: Guo Ren > > > > v1 is commit: 6184358da0004c8fd940afda6c0a0fa4027dc911 which has > > been reverted. > > > > When enable LOCKDEP, static_obj() will cause error: > > > > [0.067192] INFO: t

Re: [PATCH 02/14] target/rd: drop double zeroing

Julia, > sg_init_table zeroes its first argument, so the allocation of that argument > doesn't have to. Applied to 5.10/scsi-staging, thanks! -- Martin K. Petersen Oracle Linux Engineering

Re: [PATCH 1/2] drm/i915/dpcd_bl: Skip testing control capability with force DPCD quirk

Hi Lyude, > On Oct 8, 2020, at 05:53, Lyude Paul wrote: > > Hi! I thought this patch rang a bell, we actually already had some discussion > about this since there's a couple of other systems this was causing issues > for. > Unfortunately it never seems like that patch got sent out. Satadru? >

RE: [PATCH 1/1] clk: aspeed: modify some default clks are critical

> -Original Message- > From: Joel Stanley > Sent: Wednesday, October 7, 2020 7:34 PM > To: Ryan Chen > Cc: Jae Hyun Yoo ; Andrew Jeffery > ; Michael Turquette ; Stephen > Boyd ; linux-...@vger.kernel.org; Linux ARM > ; linux-aspeed > ; Linux Kernel Mailing List > ; BMC-SW > Subject: Re:

Re: [PATCH -next] [SCSI] fnic: simplify the return expression of vnic_wq_copy_alloc

Liu, > Simplify the return expression. Applied to 5.10/scsi-staging, thanks! -- Martin K. Petersen Oracle Linux Engineering

Re: [PATCH v7 2/2] soc: mediatek: add mt6779 devapc driver

On Wed, 2020-10-07 at 12:44 +0200, Matthias Brugger wrote: > > On 27/08/2020 05:06, Neal Liu wrote: > > MediaTek bus fabric provides TrustZone security support and data > > protection to prevent slaves from being accessed by unexpected > > masters. > > The security violation is logged and sent to

[PATCH-next 0/4] RDMA: sprintf to sysfs_emit conversions

A recent commit added a sysfs_emit and sysfs_emit_at to allow various sysfs show functions to ensure that the PAGE_SIZE buffer argument is never overrun and always NUL terminated. Convert the RDMA/InfiniBand subsystem to use these new functions. The first 2 patches exclusively used coccinelle to

Re: [PATCH -next] snic: simplify the return expression of svnic_cq_alloc

Liu, > Simplify the return expression. Applied to 5.10/scsi-staging, thanks! -- Martin K. Petersen Oracle Linux Engineering

Re: [PATCH -next] scsi: fcoe: simplify the return expression of fcoe_sysfs_setup

Qinglang, > Simplify the return expression. Applied to 5.10/scsi-staging, thanks! -- Martin K. Petersen Oracle Linux Engineering

Re: [PATCH v10 3/3] clk: mediatek: add UART0 clock support

On Wed, 2020-10-07 at 19:00 -0700, Stephen Boyd wrote: > Quoting Hanks Chen (2020-10-03 03:06:47) > > Hi Michael & Stephen, > > > > Please kindly let me know your comments about this patch. > > Thanks > > > > What's the base for this patch? I tried applying to v5.9-rc1 and it > didn't work. Sor

Re: [PATCH] scsi: bfa: fix error return in bfad_pci_init()

Jing, > Fix to return error code -ENODEV from the error handling case instead > of 0. Applied to 5.10/scsi-staging, thanks! -- Martin K. Petersen Oracle Linux Engineering

Re: [PATCH] docs: Make automarkup ready for Sphinx 3.1+

On Thu, Oct 08, 2020 at 02:15:24AM +, Nícolas F. R. A. Prado wrote: > > I have a feature request ... could you automarkup NULL as being > > :c:macro? > > Or maybe just anything matching \<[[:upper:]_[:digit:]]*\> > > (i may have my regex syntax confused ... a word composed of any > > arrangemen

[likely PATCH] MAINTAINERS: CISCO VIC LOW LATENCY NIC DRIVER

Parvi Kaustubhi's email bounces. Signed-off-by: Joe Perches --- MAINTAINERS | 1 - 1 file changed, 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 9ecb727f0a8f..3647500be78f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4275,7 +4275,6 @@ F:drivers/net/ethernet/cisco/enic/ C

Re: [PATCH] scsi: myrb: remove redundant assignment to variable timeout

Jing, > The variable timeout has been initialized with a value '0'. The assignment > before while loop is redundant. So remove it. Applied to 5.10/scsi-staging, thanks! -- Martin K. Petersen Oracle Linux Engineering

Re: Bug in herd7 [Was: Re: Litmus test for question from Al Viro]

On Wed, Oct 07, 2020 at 10:25:37PM -0400, Alan Stern wrote: > On Wed, Oct 07, 2020 at 03:38:51PM -0700, Paul E. McKenney wrote: > > On Wed, Oct 07, 2020 at 03:40:50PM -0400, Alan Stern wrote: > > > On Wed, Oct 07, 2020 at 10:50:40AM -0700, Paul E. McKenney wrote: > > > > And here is the updated ver

Re: [PATCH] misc: Kconfig: add a new dependency for HISI_HIKEY_USB

On 10/7/20 7:18 PM, Nathan Chancellor wrote: > On Wed, Oct 07, 2020 at 07:09:54AM +0200, Mauro Carvalho Chehab wrote: >> As warned by Randy: >> >> on x86_64: >> CONFIG_USB_ROLE_SWITCH=m >> and HISI_HIKEY_USB=y. >> >> ld: drivers/misc/hisi_hikey_usb.o: in function `hisi_hikey_usb

Re: ext4 regression in v5.9-rc2 from e7bfb5c9bb3d on ro fs with overlapped bitmaps

On Oct 7, 2020, at 2:14 PM, Josh Triplett wrote: > If those aren't the right way to express that, I could potentially > adapt. I had a similar such conversation on linux-ext4 already (about > inline data with 128-bit inodes), which led to me choosing to abandon > 128-byte inodes rather than try to

[PATCH] kprobes: Correct a type error in function kprobes_module_callback

There is a tiny type error in comment of function kprobes_module_callback. Signed-off-by: Zhouyi Zhou --- kernel/kprobes.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/kernel/kprobes.c b/kernel/kprobes.c index e995541..9d2042b 100644 --- a/kernel/kprobes.c +++ b/kern

Re: [PATCH] kprobes: Correct a type error in function kprobes_module_callback

Hi, On 10/7/20 7:59 PM, Zhouyi Zhou wrote: > There is a tiny type error in comment of function kprobes_module_callback. Preferable typo and same in $Subject. 'type' usually means data type or maybe typedef, or even font or typeface. I suppose you could say a "typing" error (as

Re: [PATCH] kprobes: Correct a type error in function kprobes_module_callback

Thanks for the tip! On Thu, Oct 8, 2020 at 11:06 AM Randy Dunlap wrote: > > Hi, > > On 10/7/20 7:59 PM, Zhouyi Zhou wrote: > > There is a tiny type error in comment of function kprobes_module_callback. > > Preferable > typo > and same in $Subject. > > 'type' usually means data t

linux-next: build failure after merge of the drm-misc tree

Hi all, After merging the drm-misc tree, today's linux-next build (x86_64 allmodconfig) failed like this: I noticed that the ingenic driver revert I had been waiting for appeared in hte drm-misc tree, so I removed the BROKEN dependency for it, but it produced the above errors, so I have marked it

Re: [PATCH] scsi: isci: Fix a typo in a comment

Christophe, > s/remtoe/remote/ > and add a missing '.' Applied to 5.10/scsi-staging, thanks! -- Martin K. Petersen Oracle Linux Engineering

RE: [likely PATCH] MAINTAINERS: CISCO VIC LOW LATENCY NIC DRIVER

> -Original Message- > From: Joe Perches > Sent: Wednesday, October 7, 2020 7:47 PM > To: Christian Benvenuti (benve) ; Nelson Escobar > (neescoba) > Cc: Doug Ledford ; Jason Gunthorpe > ; linux-r...@vger.kernel.org; LKML ker...@vger.kernel.org> > Subject: [likely PATCH] MAINTAINERS: CIS

[PATCH V2] kprobes: Correct a typo in function kprobes_module_callback

There is a tiny typo in comment of function kprobes_module_callback. Signed-off-by: Zhouyi Zhou --- kernel/kprobes.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/kernel/kprobes.c b/kernel/kprobes.c index e995541..9d2042b 100644 --- a/kernel/kprobes.c +++ b/kernel/kpr

Re: [PATCH] scsi: sym53c8xx_2: fix sizeof mismatch

Colin, > An incorrect sizeof is being used, struct sym_ccb ** is not correct, > it should be struct sym_ccb *. Note that since ** is the same size as > * this is not causing any issues. Improve this fix by using the idiom > sizeof(*np->ccbh) as this allows one to not even reference the type of

Re: [PATCH V2] kprobes: Correct a typo in function kprobes_module_callback

On 10/7/20 8:13 PM, Zhouyi Zhou wrote: > There is a tiny typo in comment of function kprobes_module_callback. > > Signed-off-by: Zhouyi Zhou Acked-by: Randy Dunlap Thanks. > --- > kernel/kprobes.c |2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) > > diff --git a/kernel/kprobes.

Re: [PATCH v3 7/8] mm/mempolicy: use a standard migration target allocation callback

On Tue, 7 Jul 2020, Qian Cai wrote: > On Tue, Jun 23, 2020 at 03:13:47PM +0900, js1...@gmail.com wrote: > > From: Joonsoo Kim > > > > There is a well-defined migration target allocation callback. > > Use it. > > > > Signed-off-by: Joonsoo Kim > > --- ... > > migrate_pages() starts failing like

Re: [PATCH 1/4] drivers core: Introduce CPU type sysfs interface

On Wed, Oct 07, 2020 at 07:15:46AM +0200, Greg Kroah-Hartman wrote: > On Tue, Oct 06, 2020 at 08:14:47PM -0700, Ricardo Neri wrote: > > On Tue, Oct 06, 2020 at 09:37:44AM +0200, Greg Kroah-Hartman wrote: > > > On Mon, Oct 05, 2020 at 05:57:36PM -0700, Ricardo Neri wrote: > > > > On Sat, Oct 03, 202

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