> On Oct 24, 2020, at 7:38 AM, Dr. Greg wrote:
>
>
> I can't bring myself to believe that LSM's are going to be written
> that will be making enclave security decisions on a page by page
> basis. Given what I have written above, I think all of this comes
> down to giving platform administra
On Wed, Oct 21, 2020 at 06:52:43PM +0300, Alexey Budankov wrote:
>
> Changes in v2:
> - explicitly added credit tags to patches 6/15 and 15/15,
> additionally to cites [1], [2]
> - updated description of 3/15 to explicitly mention the reason
> to open data directories in read access mode (e.g.
On Wed, Oct 21, 2020 at 06:57:53PM +0300, Alexey Budankov wrote:
>
> Open files located at trace data directory in case read access
> mode is requested. File are opened and its fds assigned to
> perf_data dir files especially for loading data directories
> content in perf report mode.
>
> Signed-
On Wed, Oct 21, 2020 at 07:04:26PM +0300, Alexey Budankov wrote:
>
> Provide allocation, initialization, finalization and releasing of
> thread specific objects at thread specific data array. Allocate
> thread specific object for every data buffer making one-to-one
> relation between data buffer a
On Wed, Oct 21, 2020 at 07:01:19PM +0300, Alexey Budankov wrote:
>
> Read trace files located in data directory into tool process memory.
> Basic analysis support of data directories is provided for report
> mode. Raw dump (-D) and aggregated reports are available for data
> directories, still wit
On Wed, Oct 21, 2020 at 07:07:00PM +0300, Alexey Budankov wrote:
>
> Introduce thread local variable and use it for threaded trace streaming.
>
> Signed-off-by: Alexey Budankov
> ---
> tools/perf/builtin-record.c | 71 -
> 1 file changed, 62 insertions(+), 9
On Wed, Oct 21, 2020 at 07:10:09PM +0300, Alexey Budankov wrote:
>
> Start threads in detached state because its management is possible
> via messaging. Block signals prior the threads start so only main
> tool thread would be notified on external async signals during data
> collection. Streaming
On Wed, Oct 21, 2020 at 07:03:48PM +0300, Alexey Budankov wrote:
>
> Introduce thread local data object and its array to be used for
> threaded trace streaming.
>
> Signed-off-by: Alexey Budankov
> ---
> tools/perf/builtin-record.c | 18 ++
> 1 file changed, 18 insertions(+)
>
On Wed, Oct 21, 2020 at 07:00:30PM +0300, Alexey Budankov wrote:
>
> Introduce decompressor to trace reader object so that decompression
> could be executed on per trace file basis separately for every
> trace file located in trace directory.
>
> Signed-off-by: Alexey Budankov
> ---
> tools/per
On Wed, Oct 21, 2020 at 06:59:48PM +0300, Alexey Budankov wrote:
>
> Move definition of reader to session header file to be shared
> among different source files. Introduce reference to active
> reader object from session object.
>
> Signed-off-by: Alexey Budankov
> ---
> tools/perf/util/sessio
This clock must be always enabled to allow access to any registers in
fsys1 CMU. Until proper solution based on runtime PM is applied
(similar to what was done for Exynos5433), mark that clock as critical
so it won't be disabled.
It was observed on Samsung Galaxy S6 device (based on Exynos7420), w
On Wed, Oct 21, 2020 at 07:02:56PM +0300, Alexey Budankov wrote:
SNIP
>
> record__synthesize(rec, true);
> - /* this will be recalculated during process_buildids() */
> - rec->samples = 0;
>
> if (!err) {
> if (!rec->timestamp_filename) {
> @@ -2680,9 +2709,1
On Sat, Oct 24, 2020 at 4:34 AM Jarkko Sakkinen wrote:
>
> On Fri, Oct 23, 2020 at 07:19:05AM -0700, Dave Hansen wrote:
> > On 10/23/20 3:17 AM, Jarkko Sakkinen wrote:
> > > On Tue, Oct 20, 2020 at 02:19:26PM -0700, Dave Hansen wrote:
> > >> On 10/2/20 9:50 PM, Jarkko Sakkinen wrote:
> > >>> + * F
On Fri, 23 Oct 2020 14:22:58 -0500
Rob Herring wrote:
> Clean-up incorrect indentation, extra spaces, and missing EOF newline in
> schema files. Most of the clean-ups are for list indentation which
> should always be 2 spaces more than the preceding keyword.
>
> Found with yamllint (now integrat
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: f11901ed723d1351843771c3a84b03a253bbf8b2
commit: 9934430e2178d5164eb1ac91a9b092f9e7e64745 SMB3.1.1: Fix ids returned in
POSIX query dir
date: 4 days ago
config: powerpc64-randconfig-r004-20201022 (attached
On Sat, Oct 24, 2020 at 1:23 AM Borislav Petkov wrote:
>
> On Fri, Oct 23, 2020 at 05:12:49PM -0700, Andy Lutomirski wrote:
> > I disagree. A real CPU does exactly what I'm describing. If I stick
>
> A real modern CPU fetches up to 32 bytes insn window which it tries
> to decode etc. I don't kno
This driver is intended to work with the multimedia block which
contains display and camera subsystems:
LCDIF
ISI
MIPI CSI
MIPI DSI
Signed-off-by: Adam Ford
---
drivers/clk/imx/clk-blk-ctl-imx8mn.c | 80
1 file changed, 80 insertions(+)
diff --git a/drivers/
These will be used by the imx8mn for blk_ctl driver.
Signed-off-by: Adam Ford
---
include/dt-bindings/reset/imx8mn-reset.h | 22 ++
1 file changed, 22 insertions(+)
diff --git a/include/dt-bindings/reset/imx8mn-reset.h
b/include/dt-bindings/reset/imx8mn-reset.h
new file mod
These will be used by the imx8mn for blk_ctl driver.
Signed-off-by: Adam Ford
---
include/dt-bindings/clock/imx8mn-clock.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/include/dt-bindings/clock/imx8mn-clock.h
b/include/dt-bindings/clock/imx8mn-clock.h
index 621ea0e87c67..2ba
There are some less-documented registers which control clocks and
resets for the multimedia block which controls the LCDIF, ISI, MIPI
CSI, and MIPI DSI.
The i.Mx8M Nano appears to have a subset of the i.MX8MP registers with
a couple shared registers with the i.MX8MM. This series builds on the
s
On Fri, Oct 23, 2020 at 6:24 PM syzbot
wrote:
>
> Hello,
>
> syzbot found the following issue on:
>
> HEAD commit:f804b315 Merge tag 'linux-watchdog-5.10-rc1' of git://www...
> git tree: upstream
> console output: https://syzkaller.appspot.com/x/log.txt?x=1797677f90
> kernel config:
From: Chen-Yu Tsai
The Ethernet PHY on the Bananapi M3 and Cubietruck Plus have the RX
and TX delays enabled on the PHY, using pull-ups on the RXDLY and
TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
ha
From: Chen-Yu Tsai
The Ethernet PHY on the Bananapi M64 has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with commit b
From: Chen-Yu Tsai
The Ethernet PHY on the Bananapi M2+ has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with commit b
From: Chen-Yu Tsai
The Ethernet PHY on the Cubietruck has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with commit bbc
From: Chen-Yu Tsai
The Ethernet PHY on the Orange Pi Plus 2E has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with com
From: Chen-Yu Tsai
The Ethernet PHY on the Bananapi M1+ has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with commit b
From: Chen-Yu Tsai
The Ethernet PHY on the Cubieboard 4 and A80 Optimus have the RX
and TX delays enabled on the PHY, using pull-ups on the RXDLY and
TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happe
From: Chen-Yu Tsai
The Ethernet PHY on the Libre Computer ALL-H5-CC has the RX and TX
delays enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened w
On Thu, 2020-10-22 at 20:37 +0800, Weiyi Lu wrote:
> Add MT8192 imp i2c wrapper c clock provider
>
> Signed-off-by: Weiyi Lu
> ---
> drivers/clk/mediatek/Kconfig | 6 +++
> drivers/clk/mediatek/Makefile| 1 +
> drivers/clk/mediatek/clk-mt8192-imp_iic_wra
From: Chen-Yu Tsai
This reverts commit 75ee680cbd2e4d0156b94f9fec50076361ab12f2.
Turns out the activity and link LEDs on the RJ45 port are active low,
just like on the Orange Pi PC.
Revert the commit that says otherwise.
Fixes: 75ee680cbd2e ("arm: sun8i: orangepi-pc-plus: Set EMAC activity LED
From: Chen-Yu Tsai
The Ethernet PHY on the A31 Hummingbird has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with commi
Currently intel_idle driver gets the c-state information from ACPI
_CST if the processor model is not recognized by it. However the
c-state in _CST starts with index 1 which is different from the
index in intel_idle driver's internal c-state table. While
intel_idle_max_cstate_reached() was previous
On 24/10/2020 15:29, Sakari Ailus wrote:
> On Sat, Oct 24, 2020 at 03:39:55AM +0300, Laurent Pinchart wrote:
>> Hi Sakari
>>
>> On Wed, Oct 21, 2020 at 01:49:10AM +0300, Sakari Ailus wrote:
>>> On Tue, Oct 20, 2020 at 08:56:07PM +0100, Dan Scally wrote:
On 20/10/2020 13:06, Sakari Ailus wrote:
The profile and level in op_set_ctrl was recently changed but during
v4l2_ctrl_handler_setup profile and level control values are mangled.
Fixes: 435c53c3698f ("media: venus: venc: Use helper to set profile and level")
Signed-off-by: Stanimir Varbanov
---
drivers/media/platform/qcom/venus/core.h
The default codec after driver open is set to be H264 but the
instance format for capture is wrongly set to H263. Correct this
to H264.
For regular applications this is not a big issue because they set
the format through S_FMT but for example v4l2-complience does not.
Signed-off-by: Stanimir Varb
On Sat, Oct 24, 2020 at 08:03:51AM -0700, Tom Rix wrote:
>
> On 10/23/20 1:45 AM, Xu Yilun wrote:
> > This driver supports the ethernet retimers (Parkvale) for the Intel PAC
> > (Programmable Acceleration Card) N3000, which is a FPGA based Smart NIC.
>
> Parkvale is a code name, it would be bette
Hi Dan,
On Sat, Oct 24, 2020 at 05:33:32PM +0100, Dan Scally wrote:
> On 24/10/2020 15:29, Sakari Ailus wrote:
> > On Sat, Oct 24, 2020 at 03:39:55AM +0300, Laurent Pinchart wrote:
> >> On Wed, Oct 21, 2020 at 01:49:10AM +0300, Sakari Ailus wrote:
> >>> On Tue, Oct 20, 2020 at 08:56:07PM +0100, Da
From: David Laight
> Sent: 23 October 2020 22:52
...
> Could do_put_user() do an initial check for 64 bit
> then expand a different #define that contains the actual
> code passing either "a" or "A" for the constriant.
>
> Apart from another level of indirection nothing is duplicated.
This code se
-s031-20201024 (attached as .config)
compiler: powerpc-linux-gcc (GCC) 9.3.0
reproduce:
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.3-17
El 24/10/20 a las 13:25, Chen-Yu Tsai escribió:
From: Chen-Yu Tsai
The Ethernet PHY on the Cubietruck has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the
On Fri, Oct 23, 2020 at 11:15:50PM +0800, zhang...@gmail.com wrote:
> From: Freeman Zhang
>
> Add the watchdog driver for Nuvoton NCT668x series. So far this driver only
> supports NCT6688DL and customized chip used in Lenovo ThinkCentre M90n Nano.
>
> Signed-off-by: Freeman Zhang
> ---
> driv
Hi Bernard.
On Fri, Oct 23, 2020 at 03:48:49PM +0800, Bernard wrote:
>
>
> From: Thomas Zimmermann
> Date: 2020-10-23 15:13:30
> To: Bernard Zhao ,Dave Airlie ,David
> Airlie ,Daniel Vetter
> ,dri-de...@lists.freedesktop.org,linux-kernel@vger.kernel.org
> Cc: opensource.ker...@vivo.com
> Su
> - Every PHY driver gains a .handle_interrupt() implementation that, for
> the most part, would look like below:
>
> irq_status = phy_read(phydev, INTR_STATUS);
> if (irq_status < 0) {
> phy_error(phydev);
> return IRQ_NONE;
> }
>
> if (irq_s
On 10/23/20 1:45 AM, Xu Yilun wrote:
> This driver supports the DFL Ether Group private feature for the Intel(R)
> PAC N3000 FPGA Smart NIC.
>
> The DFL Ether Group private feature contains an Ether Wrapper and several
> ports (phy-mac pair). There are two types of Ether Groups, line side &
(phy
On Fri, Oct 23, 2020 at 09:28:59PM +, David Laight wrote:
> From: Segher Boessenkool
> > Sent: 23 October 2020 19:27
> > On Fri, Oct 23, 2020 at 06:58:57PM +0100, Al Viro wrote:
> > > On Fri, Oct 23, 2020 at 03:09:30PM +0200, David Hildenbrand wrote:
> > > On arm64 when callee expects a 32bit a
On 10/24/20 9:39 AM, Andrew Lunn wrote:
> On Sat, Oct 24, 2020 at 08:03:51AM -0700, Tom Rix wrote:
>> On 10/23/20 1:45 AM, Xu Yilun wrote:
>>> This driver supports the ethernet retimers (Parkvale) for the Intel PAC
>>> (Programmable Acceleration Card) N3000, which is a FPGA based Smart NIC.
>> Pa
On 10/23/20 1:45 AM, Xu Yilun wrote:
> This patch adds 10G configurations support for dfl ether group private
> feature.
>
> 10G configurations have different PHY & MAC IP blocks from 25G, so a
> different set of HW operations is implemented, but the software arch is
> quite similar with 25G.
Ye
在 2020-10-25星期日的 00:25 +0800,Chen-Yu Tsai写道:
> From: Chen-Yu Tsai
>
> The Ethernet PHY on the A31 Hummingbird has the RX and TX delays
> enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
>
> Fix the phy-mode description to correct reflect this so that the
> implementation doesn't r
On Sat, 2020-10-24 at 03:09 +0100, Matthew Wilcox wrote:
> On Fri, Oct 23, 2020 at 08:48:04PM -0400, Rik van Riel wrote:
> > The allocation flags of anonymous transparent huge pages can be
> > controlled
> > through the files in /sys/kernel/mm/transparent_hugepage/defrag,
> > which can
> > help the
Hello!
On 10/19/20 10:32 AM, Andrew Gabbasov wrote:
Sorry for the delay again, I keep forgetting about the mails I' couldn't
reply
quickly. :-|
[...]
>>The patch was set to the "Changes Requested" state -- most probably
>> because of this
>> mail. Though unintentionally, it served to th
On 9/30/20 10:21 PM, Andrew Gabbasov wrote:
> In the function ravb_hwtstamp_get() in ravb_main.c with the existing
> values for RAVB_RXTSTAMP_TYPE_V2_L2_EVENT (0x2) and RAVB_RXTSTAMP_TYPE_ALL
> (0x6)
>
> if (priv->tstamp_rx_ctrl & RAVB_RXTSTAMP_TYPE_V2_L2_EVENT)
> config.rx_filter = HWTSTAM
On Sat, Oct 24, 2020 at 07:17:05PM +0200, Andrew Lunn wrote:
> > - Every PHY driver gains a .handle_interrupt() implementation that, for
> > the most part, would look like below:
> >
> > irq_status = phy_read(phydev, INTR_STATUS);
> > if (irq_status < 0) {
> > phy_error(phyde
On 24/10/20 9:03 pm, Joe Perches wrote:
> On Sat, 2020-10-24 at 18:54 +0530, Aditya wrote:
>>> Would you like to work on
>>> further rules that can be improved with your evaluation approach?
>>
>> Yes, I would like work on further rules.
>
> Some generic ideas:
>
> How about working to reduce ru
The pull request you sent on Fri, 23 Oct 2020 22:13:02 -0700 (PDT):
> git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git
> tags/riscv-for-linus-5.10-mw1
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/0593c1b4598a77b5f835b278cde0ab71e2578588
Thank you!
--
The pull request you sent on Sat, 24 Oct 2020 21:50:21 +1100:
> https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git
> tags/powerpc-5.10-2
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/b6f96e75ae121ead54da3f58c545d68184079f90
Thank you!
--
Deet-doot-d
CC: rdma, looks like rdma from the stack trace
On Fri, 23 Oct 2020 20:07:17 -0700 syzbot wrote:
> syzbot has found a reproducer for the following issue on:
>
> HEAD commit:3cb12d27 Merge tag 'net-5.10-rc1' of git://git.kernel.org/..
> git tree: net
> console output: https://syzkaller.ap
On Sat, Oct 24, 2020 at 07:17:05PM +0200, Andrew Lunn wrote:
> > - Every PHY driver gains a .handle_interrupt() implementation that, for
> > the most part, would look like below:
> >
> > irq_status = phy_read(phydev, INTR_STATUS);
> > if (irq_status < 0) {
> > phy_error(phyde
Antworten Sie zu den 850.000,00 Euro, die Ihnen gerade von Herrn Manuel Franco
gespendet wurden.
Antworten Sie zu den 850.000,00 Euro, die Ihnen gerade von Herrn Manuel Franco
gespendet wurden.
Dne sobota, 24. oktober 2020 ob 19:51:06 CEST je Icenowy Zheng napisal(a):
> 在 2020-10-25星期日的 00:25 +0800,Chen-Yu Tsai写道:
>
> > From: Chen-Yu Tsai
> >
> > The Ethernet PHY on the A31 Hummingbird has the RX and TX delays
> > enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
> >
> >
于 2020年10月25日 GMT+08:00 上午2:30:35, "Jernej Škrabec"
写到:
>Dne sobota, 24. oktober 2020 ob 19:51:06 CEST je Icenowy Zheng
>napisal(a):
>> 在 2020-10-25星期日的 00:25 +0800,Chen-Yu Tsai写道:
>>
>> > From: Chen-Yu Tsai
>> >
>> > The Ethernet PHY on the A31 Hummingbird has the RX and TX delays
>> > ena
Assorted stuff all over the place (the largest group here is
Christoph's stat cleanups). This is probably the last pull request
for this window - there's also a group of sparc patches in -next,
and davem seemed to be OK with that at the time, but I'd rather have
it go through his tree when
Previously ASPM L1-Sub-States control registers (CTL1 and CTL2) weren't
saved and restored during suspend/resume leading to ASPM-L1SS
configuration being lost post resume.
Save the ASPM-L1SS control registers so that the configuration is retained
post resume.
Signed-off-by: Vidya Sagar
---
v1:
*
Hi,
On Sat, 24 Oct 2020 at 20:39, Icenowy Zheng wrote:
>
>
>
> 于 2020年10月25日 GMT+08:00 上午2:30:35, "Jernej Škrabec"
> 写到:
> >Dne sobota, 24. oktober 2020 ob 19:51:06 CEST je Icenowy Zheng
> >napisal(a):
> >> 在 2020-10-25星期日的 00:25 +0800,Chen-Yu Tsai写道:
> >>
> >> > From: Chen-Yu Tsai
> >> >
> >>
On Sat, Oct 24, 2020 at 5:54 PM harshal chaudhari
wrote:
> On Tue, Oct 13, 2020 at 4:42 PM David Laight wrote:
> So I am a little bit confused about this check whether it's required or not
> Please could you point me in the right direction?
>
> In any case, thanks for your help ...
>
> Here is a
On Sat, Oct 24, 2020 at 07:47:13AM +, Peng Fan wrote:
> > Subject: Re: [PATCH 2/2] i2c: imx: remove id_table entry
> >
> > On Fri, Oct 23, 2020 at 04:18:23PM +0800, peng@nxp.com wrote:
> > > From: Peng Fan
> > >
> > > The legacy platform device code has been removed under
> > > arch/arm/m
On Sat, Oct 24, 2020 at 07:39:47AM +, Peng Fan wrote:
> > Subject: Re: [PATCH 1/2] i2c: imx: use devm_request_threaded_irq to simplify
> > code
> >
> > On Fri, 23 Oct 2020 at 10:27, wrote:
> > >
> > > From: Peng Fan
> > >
> > > Use devm_request_threaded_irq to simplify code
> > >
> > > Signe
International Monetary Fund (IMF)
Office of the Special Representative to the UN.
Head quarters,
Attn: Beneficiary,
This is to intimate you of a very important information which will be of great
help to redeem you from all the difficulties you have been experiencing in
getting your long overdu
84b03a253bbf8b2:
Merge tag 'xfs-5.10-merge-7' of git://git.kernel.org/pub/scm/fs/xfs/xfs-linux
(2020-10-23 17:15:06 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/wtarreau/prandom.git
tags/20201024-v4-5.10
for y
The pull request you sent on Sat, 24 Oct 2020 19:46:56 +0100:
> git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs.git work.misc
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/0eac1102e94807023e57d032bbba51830928b78e
Thank you!
--
Deet-doot-dot, I am a bot.
http
The pull request you sent on Sat, 24 Oct 2020 11:23:23 +0200:
> git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git
> tags/x86_seves_fixes_for_v5.10_rc1
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/c51ae1247262d4b19451ded1107d9b1b69c57541
Thank you!
--
Deet
The pull request you sent on Sat, 24 Oct 2020 16:19:35 +0200:
> git://git.infradead.org/users/hch/dma-mapping.git tags/dma-mapping-5.10-1
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/1b307ac87075c3207c345822ea276fe4f28481d7
Thank you!
--
Deet-doot-dot, I am a bot.
The pull request you sent on Sat, 24 Oct 2020 05:01:57 -0400:
> https://git.kernel.org/pub/scm/virt/kvm/kvm.git tags/for-linus
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/9bf8d8bcf3cebe44863188f1f2d822214e84f5b1
Thank you!
--
Deet-doot-dot, I am a bot.
https://ko
y on arm64.
The whole discussion around this is archived here:
https://lore.kernel.org/netdev/20200808152628.ga27...@sdf.org/
The code is also available for you to pull at:
git://git.kernel.org/pub/scm/linux/kernel/git/wtarreau/prandom.git
tags/20201024-v4-5.10
---
v4:
- access noise using ra
Given that this code is new, let's add a selftest for it as well.
It doesn't rely on fixed sets, instead it picks 1024 numbers and
verifies that they're not more correlated than desired.
Link: https://lore.kernel.org/netdev/20200808152628.ga27...@sdf.org/
Cc: George Spelvin
Cc: Amit Klein
Cc: Er
From: George Spelvin
Non-cryptographic PRNGs may have great statistical properties, but
are usually trivially predictable to someone who knows the algorithm,
given a small sample of their output. An LFSR like prandom_u32() is
particularly simple, even if the sample is widely scattered bits.
It
With the removal of the interrupt perturbations in previous random32
change (random32: make prandom_u32() output unpredictable), the PRNG
has become 100% deterministic again. While SipHash is expected to be
way more robust against brute force than the previous Tausworthe LFSR,
there's still the ris
The pull request you sent on Sat, 24 Oct 2020 09:13:29 -0600:
> git://git.kernel.dk/linux-block.git tags/libata-5.10-2020-10-24
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/cb6b2897b9b425433ae31dc01f4e1d549f0028c8
Thank you!
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The pull request you sent on Sat, 24 Oct 2020 09:13:33 -0600:
> git://git.kernel.dk/linux-block.git tags/io_uring-5.10-2020-10-24
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/af0041875ce7f5a05362b884e90cf82c27876096
Thank you!
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On Sun, Oct 25, 2020 at 12:25:15AM +0800, Chen-Yu Tsai wrote:
> From: Chen-Yu Tsai
>
> The Ethernet PHY on the Bananapi M64 has the RX and TX delays
> enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
>
> Fix the phy-mode description to correct reflect this so that the
> implementa
Add binding documentation of the regulator for MT6392 SoCs.
Signed-off-by: Fabien Parent
Reviewed-by: Rob Herring
---
v5:
* No change
v4:
* No change
v3:
* No change
v2:
* Use 'pmic' as node name for the pmic.
* Use 'regulators' as node name for the regul
The MT6392 is a regulator found on boards based on the MediaTek
MT8167, MT8516, and probably other SoCs. It is a so called PMIC and
connectcts as a slave to a SoC using SPI, wrapped inside PWRAP.
Signed-off-by: Fabien Parent
---
V5:
* Removed unneeded code
* Fix indentation
On Sat, Oct 24, 2020 at 07:09:53PM +0100, Russell King - ARM Linux admin wrote:
> On Sat, Oct 24, 2020 at 07:17:05PM +0200, Andrew Lunn wrote:
> > > - Every PHY driver gains a .handle_interrupt() implementation that, for
> > > the most part, would look like below:
> > >
> > > irq_status = phy_
On Sun, Oct 25, 2020 at 12:51 AM Arnd Bergmann wrote:
>
> On Sat, Oct 24, 2020 at 5:54 PM harshal chaudhari
> wrote:
> > On Tue, Oct 13, 2020 at 4:42 PM David Laight
> > wrote:
>
> > So I am a little bit confused about this check whether it's required or not
> > Please could you point me in the
On Sat, Oct 24, 2020 at 2:36 PM Dwaipayan Ray wrote:
>
> It is generally preferred that the macros from
> include/linux/compiler_attributes.h are used, unless there
> is a reason not to.
>
> checkpatch currently checks __attribute__ for each of
> packed, aligned, printf, scanf, and weak. Other dec
On Sat, Oct 24, 2020 at 08:47:28AM -0700, Andy Lutomirski wrote:
> On Sat, Oct 24, 2020 at 4:34 AM Jarkko Sakkinen wrote:
> >
> > On Fri, Oct 23, 2020 at 07:19:05AM -0700, Dave Hansen wrote:
> > > On 10/23/20 3:17 AM, Jarkko Sakkinen wrote:
> > > > On Tue, Oct 20, 2020 at 02:19:26PM -0700, Dave Ha
On 20-10-24 11:20:12, Adam Ford wrote:
> There are some less-documented registers which control clocks and
> resets for the multimedia block which controls the LCDIF, ISI, MIPI
> CSI, and MIPI DSI.
>
> The i.Mx8M Nano appears to have a subset of the i.MX8MP registers with
> a couple shared regis
On 24/10/2020 16:14, Sakari Ailus wrote:
> Hi Daniel,
>
> Thanks for the update.
Thanks for the comments as always
>> +// SPDX-License-Identifier: GPL-2.0
>> +// Author: Dan Scally
> /* Author: ... */
>
> But not the SPDX tag.
Weird - okedokey
>> +#include
>> +#include
>> +#include
>> +#include
On Sat, Oct 24, 2020 at 10:36:36AM -0700, Tom Rix wrote:
>
> On 10/24/20 9:39 AM, Andrew Lunn wrote:
> > On Sat, Oct 24, 2020 at 08:03:51AM -0700, Tom Rix wrote:
> >> On 10/23/20 1:45 AM, Xu Yilun wrote:
> >>> This driver supports the ethernet retimers (Parkvale) for the Intel PAC
> >>> (Programma
Hello,
# Intro
Pardon my tardiness in reporting this, I was stalling my disk upgrade to
help test a fix for a reiserfs problem. I needed to get my life going
again before taking the time to report this.
This is a heads up for a serious problem. I no longer use reiser4
anymore because I can't have
On Sat, Oct 24, 2020 at 3:23 PM Abel Vesa wrote:
>
> On 20-10-24 11:20:12, Adam Ford wrote:
> > There are some less-documented registers which control clocks and
> > resets for the multimedia block which controls the LCDIF, ISI, MIPI
> > CSI, and MIPI DSI.
> >
> > The i.Mx8M Nano appears to have a
On Fri, Oct 09, 2020 at 10:57:42AM -0600, Brigham Campbell wrote:
> The following patch is a bug fix for an issue introduced by commit
> abe60a3a7afb4058278864aa18c5faf62094c11a which removed the deprecated
> device tree skeletons.
>
> For the devices corresponding to these device trees, an update
From: Segher Boessenkool
> Sent: 24 October 2020 18:29
>
> On Fri, Oct 23, 2020 at 09:28:59PM +, David Laight wrote:
> > From: Segher Boessenkool
> > > Sent: 23 October 2020 19:27
> > > On Fri, Oct 23, 2020 at 06:58:57PM +0100, Al Viro wrote:
> > > > On Fri, Oct 23, 2020 at 03:09:30PM +0200, D
From: Arnd Bergmann
> Sent: 24 October 2020 20:21
> To: harshal chaudhari
> Cc: David Laight ; Greg KH
> ; Sudip Mukherjee
> ; linux-kernel
> Subject: Re: [PATCH] char: ppdev: check if ioctl argument is present and valid
>
> On Sat, Oct 24, 2020 at 5:54 PM harshal chaudhari
> wrote:
> > On Tue
Good Day,
I know this email might come as a surprise to you considering the number of
junk emails we all receive on a daily basis. I can assure you that this email
is authentic and I would appreciate it if the content of this letter is kept
strictly confidential and respects the integrity of th
From: David Woodhouse
Some hypervisors can allow the guest to use the Extended Destination ID
field in the MSI address to address up to 32768 CPUs.
This applies to all downstream devices which generate MSI cycles,
including HPET, I/OAPIC and PCI MSI.
HPET and PCI MSI use the same __irq_msi_comp
From: David Woodhouse
This allows the host to indicate that MSI emulation supports 15-bit
destination IDs, allowing up to 32768 CPUs without interrupt remapping.
cf. https://patchwork.kernel.org/patch/11816693/ for qemu
Signed-off-by: David Woodhouse
Acked-by: Paolo Bonzini
---
arch/x86/kern
From: David Woodhouse
If the 15-bit APIC ID support is present in emulated MSI then there's no
need for the pseudo-remapping support.
Signed-off-by: David Woodhouse
---
drivers/iommu/hyperv-iommu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/iommu/hyperv-iommu.c b/drivers/iommu
From: David Woodhouse
All possible parent domains have a select method now. Make use of it.
Signed-off-by: David Woodhouse
Signed-off-by: Thomas Gleixner
---
arch/x86/kernel/hpet.c | 24 ++--
1 file changed, 14 insertions(+), 10 deletions(-)
diff --git a/arch/x86/kernel/h
101 - 200 of 272 matches
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