[RFC][PATCH 4/5] sched/fair: Merge select_idle_core/cpu()

2020-12-14 Thread Peter Zijlstra
Both select_idle_core() and select_idle_cpu() do a loop over the same cpumask. Observe that by clearing the already visited CPUs, we can fold the iteration and iterate a core at a time. All we need to do is remember any non-idle CPU we encountered while scanning for an idle core. This way we'll on

[RFC][PATCH 3/5] sched/fair: Remove select_idle_smt()

2020-12-14 Thread Peter Zijlstra
In order to make the next patch more readable, and to quantify the actual effectiveness of this pass, start by removing it. Signed-off-by: Peter Zijlstra (Intel) --- kernel/sched/fair.c | 30 -- 1 file changed, 30 deletions(-) --- a/kernel/sched/fair.c +++ b/kernel

[RFC][PATCH 0/5] select_idle_sibling() wreckage

2020-12-14 Thread Peter Zijlstra
Hai, here them patches Mel asked for. They've not (yet) been through the robots, so there might be some build fail for configs I've not used. Benchmark time :-) --- include/linux/sched/topology.h |1 kernel/sched/core.c| 19 +++- kernel/sched/fair.c| 171

Re: [PATCH v1 bpf-next 03/11] tcp: Migrate TCP_ESTABLISHED/TCP_SYN_RECV sockets in accept queues.

2020-12-14 Thread Kuniyuki Iwashima
From: Martin KaFai Lau Date: Thu, 10 Dec 2020 11:33:40 -0800 > On Thu, Dec 10, 2020 at 02:58:10PM +0900, Kuniyuki Iwashima wrote: > > [ ... ] > > > > > I've implemented one-by-one migration only for the accept queue for now. > > > > In addition to the concern about TFO queue, > > > You meant

Re: [PATCH v2] proc: Allow pid_revalidate() during LOOKUP_RCU

2020-12-14 Thread Stephen Brennan
ebied...@xmission.com (Eric W. Biederman) writes: > Stephen Brennan writes: > >> The pid_revalidate() function requires dropping from RCU into REF lookup >> mode. When many threads are resolving paths within /proc in parallel, >> this can result in heavy spinlock contention as each thread tries t

Re: [RFC PATCH] ASoC: pcm_dmaengine: Add support for BE DAIs

2020-12-14 Thread Mark Brown
On Fri, Dec 11, 2020 at 06:00:55PM +, codrin.ciubota...@microchip.com wrote: > Also, I noticed that the HW constraints added by a DAI driver (a codec > for example) are added to PCM's runtime->hw_constraints, even if the DAI > driver is part of a BE. Shouldn't these constraints be applied on

drivers/clk/imx/clk-imx8mp.c:446:25: sparse: sparse: incorrect type in argument 1 (different address spaces)

2020-12-14 Thread kernel test robot
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: 2c85ebc57b3e1817b6ce1a6b703928e113a90442 commit: 9a976cd278eafa496ce30196810ef2e879a4a7d5 clk: imx8m: Support module build date: 4 months ago config: openrisc-randconfig-s031-20201214 (attached as .config

Re: [PATCH] kvm: don't lose the higher 32 bits of tlbs_dirty

2020-12-14 Thread Sean Christopherson
On Sun, Dec 13, 2020, Lai Jiangshan wrote: > From: Lai Jiangshan > > In kvm_mmu_notifier_invalidate_range_start(), tlbs_dirty is used as: > need_tlb_flush |= kvm->tlbs_dirty; > with need_tlb_flush's type being int and tlbs_dirty's type being long. > > It means that tlbs_dirty is always use

[PATCH] dm integrity: select the Kconfig option CRYPTO_SKCIPHER

2020-12-14 Thread Anthony Iliopoulos
The integrity target relies on skcipher for encryption/decryption, but certain kernel configurations may not enable CRYPTO_SKCIPHER, leading to compilation errors due to unresolved symbols. Explicitly select CRYPTO_SKCIPHER for DM_INTEGRITY, since it is unconditionally dependent on it. Signed-off-

Re: Linux 5.10

2020-12-14 Thread Jens Axboe
On 12/14/20 9:26 AM, Mike Snitzer wrote: > On Mon, Dec 14 2020 at 11:02am -0500, > Mike Snitzer wrote: > >> On Mon, Dec 14 2020 at 12:52am -0500, >> Greg KH wrote: >> >>> On Mon, Dec 14, 2020 at 12:31:47AM -0500, Dave Jones wrote: On Sun, Dec 13, 2020 at 03:03:29PM -0800, Linus Torvalds wro

[PATCH v5 1/2] mmc: sdhci-msm: Warn about overclocking SD/MMC

2020-12-14 Thread Douglas Anderson
As talked about in commit 5e4b7e82d497 ("clk: qcom: gcc-sdm845: Use floor ops for sdcc clks"), most clocks handled by the Qualcomm clock drivers are rounded _up_ by default instead of down. We should make sure SD/MMC clocks are always rounded down in the clock drivers. Let's add a warning in the Q

Re: [PATCH v4 2/2] mmc: sdhci-msm: Actually set the actual clock

2020-12-14 Thread Doug Anderson
Hi, On Mon, Dec 14, 2020 at 4:44 AM Veerabhadrarao Badiganti wrote: > > > On 12/11/2020 10:42 PM, Douglas Anderson wrote: > > The MSM SDHCI driver always set the "actual_clock" field to 0. It had > > a comment about it not being needed because we weren't using the > > standard SDHCI divider mech

[PATCH v5 2/2] mmc: sdhci-msm: Actually set the actual clock

2020-12-14 Thread Douglas Anderson
The MSM SDHCI driver always set the "actual_clock" field to 0. It had a comment about it not being needed because we weren't using the standard SDHCI divider mechanism and we'd just fallback to "host->clock". However, it's still better to provide the actual clock. Why? 1. It will make timeout c

Re: [PATCH 02/10] workqueue: use cpu_possible_mask instead of cpu_active_mask to break affinity

2020-12-14 Thread Peter Zijlstra
On Mon, Dec 14, 2020 at 11:54:49PM +0800, Lai Jiangshan wrote: > From: Lai Jiangshan > > There might be other CPU online. The workers losing binding on its CPU > should have chance to work on those later onlined CPUs. > > Fixes: 06249738a41a ("workqueue: Manually break affinity on hotplug") > Si

[PATCH 5.4 01/36] Kbuild: do not emit debug info for assembly with LLVM_IAS=1

2020-12-14 Thread Greg Kroah-Hartman
From: Nick Desaulniers commit b8a9092330da2030496ff357272f342eb970d51b upstream. Clang's integrated assembler produces the warning for assembly files: warning: DWARF2 only supports one section per compilation unit If -Wa,-gdwarf-* is unspecified, then debug info is not emitted for assembly sou

[PATCH 5.4 06/36] iwlwifi: mvm: fix kernel panic in case of assert during CSA

2020-12-14 Thread Greg Kroah-Hartman
From: Sara Sharon [ Upstream commit fe56d05ee6c87f6a1a8c7267affd92c9438249cc ] During CSA, we briefly nullify the phy context, in __iwl_mvm_unassign_vif_chanctx. In case we have a FW assert right after it, it remains NULL though. We end up running into endless loop due to mac80211 trying repeat

[PATCH 5.4 13/36] irqchip/gic-v3-its: Unconditionally save/restore the ITS state on suspend

2020-12-14 Thread Greg Kroah-Hartman
From: Xu Qiang [ Upstream commit 74cde1a53368aed4f2b4b54bf7030437f64a534b ] On systems without HW-based collections (i.e. anything except GIC-500), we rely on firmware to perform the ITS save/restore. This doesn't really work, as although FW can properly save everything, it cannot fully restore

Re: [PATCH 2/2] iov_iter: optimise iter type checking

2020-12-14 Thread Pavel Begunkov
On 14/12/2020 10:28, David Laight wrote: > From: Pavel Begunkov >> Sent: 13 December 2020 22:33 >> >> On 11/12/2020 02:01, Al Viro wrote: >>> On Thu, Nov 19, 2020 at 05:12:44PM +, Pavel Begunkov wrote: On 19/11/2020 17:03, Christoph Hellwig wrote: > On Thu, Nov 19, 2020 at 03:29:43PM +

Re: [RFC PATCH 09/14] cxl/mem: Add basic IOCTL interface

2020-12-14 Thread Ben Widawsky
On 20-12-09 19:32:19, Randy Dunlap wrote: > On 12/8/20 4:24 PM, Ben Widawsky wrote: > > + > > +#define CXL_MEM_QUERY_COMMANDS _IOR('C', 1, struct cxl_mem_query_commands) > > Hi, > I could have missed it, but IOCTL major "numbers" (like 'C') should be > listed in Documentation/userspace-api/ioctl/i

[PATCH 5.4 07/36] powerpc: Drop -me200 addition to build flags

2020-12-14 Thread Greg Kroah-Hartman
From: Michael Ellerman [ Upstream commit e02152ba2810f7c88cb54e71cda096268dfa9241 ] Currently a build with CONFIG_E200=y will fail with: Error: invalid switch -me200 Error: unrecognized option -me200 Upstream binutils has never supported an -me200 option. Presumably it was supported at som

[PATCH 5.4 22/36] can: m_can: m_can_dev_setup(): add support for bosch mcan version 3.3.0

2020-12-14 Thread Greg Kroah-Hartman
From: Pankaj Sharma [ Upstream commit 5c7d55bded77da6db7c5d249610e3a2eed730b3c ] Add support for mcan bit timing and control mode according to bosch mcan IP version 3.3.0. The mcan version read from the Core Release field of CREL register would be 33. Accordingly the properties are to be set for

Re: Linux 5.10

2020-12-14 Thread Dave Jones
On Mon, Dec 14, 2020 at 10:21:59AM -0700, Jens Axboe wrote: > [ 87.290698] attempt to access beyond end of device > md0: rw=4096, want=13996467328, limit=6261202944 > [ 87.293371] attempt to access beyond end of device > md0: rw=4096, want

[PATCH 5.4 08/36] arm64: dts: broadcom: clear the warnings caused by empty dma-ranges

2020-12-14 Thread Greg Kroah-Hartman
From: Zhen Lei [ Upstream commit 2013a4b684b6eb614ee5c9a3c07b0ae6f5ca96d9 ] The scripts/dtc/checks.c requires that the node have empty "dma-ranges" property must have the same "#address-cells" and "#size-cells" values as the parent node. Otherwise, the following warnings is reported: arch/arm64

[PATCH 5.4 05/36] iwlwifi: pcie: set LTR to avoid completion timeout

2020-12-14 Thread Greg Kroah-Hartman
From: Johannes Berg [ Upstream commit edb625208d84aef179e3f16590c1c582fc5fdae6 ] On some platforms, the preset values aren't correct and then we may get a completion timeout in the firmware. Change the LTR configuration to avoid that. The firmware will do some more complex reinit of this later,

[PATCH 5.4 09/36] ARC: stack unwinding: dont assume non-current task is sleeping

2020-12-14 Thread Greg Kroah-Hartman
From: Vineet Gupta [ Upstream commit e42404fa10fd11fe72d0a0e149a321d10e577715 ] To start stack unwinding (SP, PC and BLINK) are needed. When the explicit execution context (pt_regs etc) is not available, unwinder assumes the task is sleeping (in __switch_to()) and fetches SP and BLINK from kerne

[PATCH 5.4 04/36] arm64: dts: rockchip: Assign a fixed index to mmc devices on rk3399 boards.

2020-12-14 Thread Greg Kroah-Hartman
From: Markus Reichl [ Upstream commit 0011c6d182774fc781fb9e115ebe8baa356029ae ] Recently introduced async probe on mmc devices can shuffle block IDs. Pin them to fixed values to ease booting in environments where UUIDs are not practical. Use newly introduced aliases for mmcblk devices from [1].

[PATCH 5.4 03/36] iwlwifi: pcie: limit memory read spin time

2020-12-14 Thread Greg Kroah-Hartman
From: Johannes Berg [ Upstream commit 04516706bb99889986ddfa3a769ed50d2dc7ac13 ] When we read device memory, we lock a spinlock, write the address we want to read from the device and then spin in a loop reading the data in 32-bit quantities from another register. As the description makes clear,

[PATCH 5.4 02/36] x86/lib: Change .weak to SYM_FUNC_START_WEAK for arch/x86/lib/mem*_64.S

2020-12-14 Thread Greg Kroah-Hartman
From: Fangrui Song commit 4d6ffa27b8e5116c0abb318790fd01d4e12d75e6 upstream. Commit 393f203f5fd5 ("x86_64: kasan: add interceptors for memset/memmove/memcpy functions") added .weak directives to arch/x86/lib/mem*_64.S instead of changing the existing ENTRY macros to WEAK. This can lead to t

Re: [PATCH 2/2] soc: bcm: add PM driver for Broadcom's PMB

2020-12-14 Thread Florian Fainelli
On 12/14/20 4:24 AM, Rafał Miłecki wrote: > On 11.12.2020 23:08, Florian Fainelli wrote: >> On 12/11/20 1:59 PM, Rafał Miłecki wrote: >>> From: Rafał Miłecki >>> >>> PMB can be found on BCM4908 and many other chipsets (e.g. BCM63138). >>> It's needed to power on and off SoC blocks like PCIe, SATA,

[PATCH 5.4 00/36] 5.4.84-rc1 review

2020-12-14 Thread Greg Kroah-Hartman
This is the start of the stable review cycle for the 5.4.84 release. There are 36 patches in this series, all will be posted as a response to this one. If anyone has any issues with these being applied, please let me know. Responses should be made by Wed, 16 Dec 2020 17:25:32 +. Anything rece

[PATCH 5.4 11/36] interconnect: qcom: qcs404: Remove GPU and display RPM IDs

2020-12-14 Thread Greg Kroah-Hartman
From: Georgi Djakov [ Upstream commit 7ab1e9117607485df977bb6e271be5c5ad649a4c ] The following errors are noticed during boot on a QCS404 board: [2.926647] qcom_icc_rpm_smd_send mas 6 error -6 [2.934573] qcom_icc_rpm_smd_send mas 8 error -6 These errors show when we try to configure the

[PATCH 5.4 23/36] ktest.pl: Fix incorrect reboot for grub2bls

2020-12-14 Thread Greg Kroah-Hartman
From: Libo Chen commit 271e0c9dce1b02a825b3cc1a7aa1fab7c381d44b upstream. This issue was first noticed when I was testing different kernels on Oracle Linux 8 which as Fedora 30+ adopts BLS as default. Even though a kernel entry was added successfully and the index of that kernel entry was retrie

[PATCH 5.4 26/36] pinctrl: amd: remove debounce filter setting in IRQ type setting

2020-12-14 Thread Greg Kroah-Hartman
From: Coiby Xu commit 47a0001436352c9853d72bf2071e85b316d688a2 upstream. Debounce filter setting should be independent from IRQ type setting because according to the ACPI specs, there are separate arguments for specifying debounce timeout and IRQ type in GpioIo() and GpioInt(). Together with co

[PATCH 5.4 10/36] scsi: ufs: Make sure clk scaling happens only when HBA is runtime ACTIVE

2020-12-14 Thread Greg Kroah-Hartman
From: Can Guo [ Upstream commit 73cc291c270248567245f084dcdf5078069af6b5 ] If someone plays with the UFS clk scaling devfreq governor through sysfs, ufshcd_devfreq_scale may be called even when HBA is not runtime ACTIVE. This can lead to unexpected error. We cannot just protect it by calling pm_

[PATCH 5.4 25/36] Input: i8042 - add Acer laptops to the i8042 reset list

2020-12-14 Thread Greg Kroah-Hartman
From: Chris Chiu commit ce6520b0eafad5962ffc21dc47cd7bd3250e9045 upstream. The touchpad operates in Basic Mode by default in the Acer BIOS setup, but some Aspire/TravelMate models require the i8042 to be reset in order to be correctly detected. Signed-off-by: Chris Chiu Link: https://lore.kern

[PATCH 5.4 29/36] kbuild: avoid static_assert for genksyms

2020-12-14 Thread Greg Kroah-Hartman
From: Arnd Bergmann commit 14dc3983b5dff513a90bd5a8cc90acaf7867c3d0 upstream. genksyms does not know or care about the _Static_assert() built-in, and sometimes falls back to ignoring the later symbols, which causes undefined behavior such as WARNING: modpost: EXPORT symbol "ethtool_set_ethtoo

[PATCH 5.4 31/36] scsi: be2iscsi: Revert "Fix a theoretical leak in beiscsi_create_eqs()"

2020-12-14 Thread Greg Kroah-Hartman
From: Dan Carpenter commit eeaf06af6f87e1dba371fbe42674e6f963220b9c upstream. My patch caused kernel Oopses and delays in boot. Revert it. The problem was that I moved the "mem->dma = paddr;" before the call to be_fill_queue(). But the first thing that the be_fill_queue() function does is mem

[PATCH 5.4 19/36] platform/x86: acer-wmi: add automatic keyboard background light toggle key as KEY_LIGHTS_TOGGLE

2020-12-14 Thread Greg Kroah-Hartman
From: Timo Witte [ Upstream commit 9e7a005ad56aa7d6ea5830c5ffcc60bf35de380b ] Got a dmesg message on my AMD Renoir based Acer laptop: "acer_wmi: Unknown key number - 0x84" when toggling keyboard background light Signed-off-by: Timo Witte Reviewed-by: "Lee, Chun-Yi" Link: https://lore.kernel.o

[PATCH 5.9 003/105] kprobes: Remove NMI context check

2020-12-14 Thread Greg Kroah-Hartman
From: Masami Hiramatsu commit e03b4a084ea6b0a18b0e874baec439e69090c168 upstream. The in_nmi() check in pre_handler_kretprobe() is meant to avoid recursion, and blindly assumes that anything NMI is recursive. However, since commit: 9b38cc704e84 ("kretprobe: Prevent triggering kretprobe from w

Re: [PATCH 1/2] hwrng: iproc-rng200: Fix disable of the block.

2020-12-14 Thread Florian Fainelli
On 12/14/20 8:04 AM, matthias@kernel.org wrote: > From: Matthias Brugger > > When trying to disable the block we bitwise or the control > register with value zero. This will leave the block always turned on. > Fix this by setting the corresponding bit to zero. > > Fixes: c83d45d5685f ("hwrng

[PATCH 5.9 008/105] bpftool: Fix error return value in build_btf_type_table

2020-12-14 Thread Greg Kroah-Hartman
From: Zhen Lei [ Upstream commit 68878a5c5b852d17f5827ce8a0f6fbd8b4cdfada ] An appropriate return value should be set on the failed path. Fixes: 4d374ba0bf30 ("tools: bpftool: implement "bpftool btf show|list"") Reported-by: Hulk Robot Signed-off-by: Zhen Lei Signed-off-by: Daniel Borkmann A

[PATCH 5.9 009/105] vhost-vdpa: fix page pinning leakage in error path (rework)

2020-12-14 Thread Greg Kroah-Hartman
From: Si-Wei Liu [ Upstream commit ad89653f79f1882d55d9df76c9b2b94f008c4e27 ] Pinned pages are not properly accounted particularly when mapping error occurs on IOTLB update. Clean up dangling pinned pages for the error path. The memory usage for bookkeeping pinned pages is reverted to what it w

[PATCH 5.9 023/105] drm/panel: sony-acx565akm: Fix race condition in probe

2020-12-14 Thread Greg Kroah-Hartman
From: Sebastian Reichel [ Upstream commit 7c4bada12d320d8648ba3ede6f9b6f9e10f1126a ] The probe routine acquires the reset GPIO using GPIOD_OUT_LOW. Directly afterwards it calls acx565akm_detect(), which sets the GPIO value to HIGH. If the bootloader initialized the GPIO to HIGH before the probe

[PATCH 5.9 060/105] btrfs: fix lockdep splat when enabling and disabling qgroups

2020-12-14 Thread Greg Kroah-Hartman
From: Filipe Manana [ Upstream commit a855fbe69229078cd8aecd8974fb996a5ca651e6 ] When running test case btrfs/017 from fstests, lockdep reported the following splat: [ 1297.067385] == [ 1297.067708] WARNING: possible circular locking depen

[PATCH 5.9 056/105] spi: spi-nxp-fspi: fix fspi panic by unexpected interrupts

2020-12-14 Thread Greg Kroah-Hartman
From: Ran Wang [ Upstream commit 71d80563b0760a411cd90a3680536f5d887fff6b ] Given the case that bootloader(such as UEFI)'s FSPI driver might not handle all interrupts before loading kernel, those legacy interrupts would assert immidiately once kernel's FSPI driver enable them. Further, if it was

[PATCH 5.9 054/105] irqchip/gic-v3-its: Unconditionally save/restore the ITS state on suspend

2020-12-14 Thread Greg Kroah-Hartman
From: Xu Qiang [ Upstream commit 74cde1a53368aed4f2b4b54bf7030437f64a534b ] On systems without HW-based collections (i.e. anything except GIC-500), we rely on firmware to perform the ITS save/restore. This doesn't really work, as although FW can properly save everything, it cannot fully restore

[PATCH 5.9 065/105] platform/x86: thinkpad_acpi: add P1 gen3 second fan support

2020-12-14 Thread Greg Kroah-Hartman
From: Iakov 'Jake' Kirilenko [ Upstream commit 15d89c9f6f4a186ade7aefbe77e7ede9746b6c47 ] Tested on my P1 gen3, works fine with `thinkfan`. Since thinkpad_acpi fan control is off by default, it is safe to add 2nd fan control for brave overclockers Signed-off-by: Iakov 'Jake' Kirilenko Link: ht

[PATCH 5.9 057/105] arm-smmu-qcom: Ensure the qcom_scm driver has finished probing

2020-12-14 Thread Greg Kroah-Hartman
From: John Stultz [ Upstream commit 72b55c96f3a5ae6e486c20b5dacf5114060ed042 ] Robin Murphy pointed out that if the arm-smmu driver probes before the qcom_scm driver, we may call qcom_scm_qsmmu500_wait_safe_toggle() before the __scm is initialized. Now, getting this to happen is a bit contrived

[PATCH 5.9 099/105] zonefs: fix page reference and BIO leak

2020-12-14 Thread Greg Kroah-Hartman
From: Damien Le Moal commit 6bea0225a4bf14a58af71cb9677a756921469e46 upstream. In zonefs_file_dio_append(), the pages obtained using bio_iov_iter_get_pages() are not released on completion of the REQ_OP_APPEND BIO, nor when bio_iov_iter_get_pages() fails. Furthermore, a call to bio_put() is miss

[PATCH 5.9 101/105] x86/mm/mem_encrypt: Fix definition of PMD_FLAGS_DEC_WP

2020-12-14 Thread Greg Kroah-Hartman
From: Arvind Sankar commit 29ac40cbed2bc06fa218ca25d7f5e280d3d08a25 upstream. The PAT bit is in different locations for 4k and 2M/1G page table entries. Add a definition for _PAGE_LARGE_CACHE_MASK to represent the three caching bits (PWT, PCD, PAT), similar to _PAGE_CACHE_MASK for 4k pages, and

[PATCH 5.9 086/105] pinctrl: amd: remove debounce filter setting in IRQ type setting

2020-12-14 Thread Greg Kroah-Hartman
From: Coiby Xu commit 47a0001436352c9853d72bf2071e85b316d688a2 upstream. Debounce filter setting should be independent from IRQ type setting because according to the ACPI specs, there are separate arguments for specifying debounce timeout and IRQ type in GpioIo() and GpioInt(). Together with co

[PATCH v5 18/25] coresight: etm4x: Expose trcdevarch via trcidr

2020-12-14 Thread Suzuki K Poulose
Expose the TRCDEVARCH register via the sysfs for component detection. Given that the TRCIDR1 may not completely identify the ETM component and instead need to use TRCDEVARCH, expose this via sysfs for tools to use it for identification. Cc: Mike Leach Reviewed-by: Mathieu Poirier Signed-off-by:

[PATCH v5 14/25] coresight: etm4x: Clean up exception level masks

2020-12-14 Thread Suzuki K Poulose
etm4_get_access_type() calculates the exception level bits for use in address comparator registers. This is also used by the TRCVICTLR register by shifting to the required position. This patch cleans up the logic to make etm4_get_access_type() calcualte a generic mask which can be used by all user

[PATCH 5.9 087/105] mmc: sdhci-of-arasan: Fix clock registration error for Keem Bay SOC

2020-12-14 Thread Greg Kroah-Hartman
From: Muhammad Husaini Zulkifli commit a42a7ec9bb99a17869c3b9f3d365aaf2bdb1a554 upstream. The commit 16ada730a759 ("mmc: sdhci-of-arasan: Modify clock operations handling") introduced support for platform specific clock operations. Around the same point in time the commit 36c6aadaae86 ("mmc: sdh

Re: [PATCH 2/2] hwrng: iproc-rng200: Move enable/disable in separate function

2020-12-14 Thread Florian Fainelli
On 12/14/20 8:04 AM, matthias@kernel.org wrote: > From: Matthias Brugger > > We are calling the same code for enable and disable the block in various > parts of the driver. Put that code into a new function to reduce code > duplication. > > Signed-off-by: Matthias Brugger > > --- > > dri

Re: [PATCH] efi/libstub: Allow EFI_NOT_FOUND on LOAD_FILE2_PROTOCOL calls for initrd

2020-12-14 Thread Heinrich Schuchardt
On 14.12.20 18:01, Ilias Apalodimas wrote: > At the moment the EFI stub tries to load an initrd from the > cmdline provided option only if the LoadFile2 protocol does not exist > on the initrd device path. > > This might prove problematic for EFI installers that need their own > version of initrd t

Re: [net-next PATCH v3] tcp: Add logic to check for SYN w/ data in tcp_simple_retransmit

2020-12-14 Thread Eric Dumazet
On Sat, Dec 12, 2020 at 9:31 PM Alexander Duyck wrote: > > From: Alexander Duyck > > There are cases where a fastopen SYN may trigger either a ICMP_TOOBIG > message in the case of IPv6 or a fragmentation request in the case of > IPv4. This results in the socket stalling for a second or more as it

[PATCH v2] KVM: SVM: use vmsave/vmload for saving/restoring additional host state

2020-12-14 Thread Michael Roth
Using a guest workload which simply issues 'hlt' in a tight loop to generate VMEXITs, it was observed (on a recent EPYC processor) that a significant amount of the VMEXIT overhead measured on the host was the result of MSR reads/writes in svm_vcpu_load/svm_vcpu_put according to perf: 67.49%--kvm

[PATCH v5 16/25] coresight: etm4x: Detect access early on the target CPU

2020-12-14 Thread Suzuki K Poulose
In preparation to detect the support for system instruction support, move the detection of the device access to the target CPU. Cc: Mike Leach Reviewed-by: Mathieu Poirier Signed-off-by: Suzuki K Poulose --- Changes since v3 - Name constructs etm4_xx instead of etm_** (Mathieu) --- .../coresi

[RFC, v3 0/2] msi support for platform devices

2020-12-14 Thread Vikas Gupta
This RFC adds support for MSI for platform devices. MSI block is added as an ext irq along with the existing wired interrupt implementation. The patchset exports two caps for MSI and related data to configure MSI source device. Changes from: - v2 to v3: 1) Restored the vendor

[PATCH] Revert: "ring-buffer: Remove HAVE_64BIT_ALIGNED_ACCESS"

2020-12-14 Thread Steven Rostedt
From: "Steven Rostedt (VMware)" It was believed that metag was the only architecture that required the ring buffer to keep 8 byte words aligned on 8 byte architectures, and with its removal, it was assumed that the ring buffer code did not need to handle this case. It appears that sparc64 also re

[PATCH] venus: venc: set inband mode property to FW.

2020-12-14 Thread Dikshita Agarwal
set HFI_PROPERTY_CONFIG_VENC_SYNC_FRAME_SEQUENCE_HEADER to FW to support inband sequence header mode. Signed-off-by: Dikshita Agarwal --- drivers/media/platform/qcom/venus/venc_ctrls.c | 15 ++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom

[RFC v3 2/2] vfio/platform: msi: add Broadcom platform devices

2020-12-14 Thread Vikas Gupta
Add msi support for Broadcom platform devices Signed-off-by: Vikas Gupta --- drivers/vfio/platform/Kconfig | 1 + drivers/vfio/platform/Makefile| 1 + drivers/vfio/platform/msi/Kconfig | 9 drivers/vfio/platform/msi/Makefile| 2 +

[RFC v3 1/2] vfio/platform: add support for msi

2020-12-14 Thread Vikas Gupta
MSI support for platform devices.The MSI block is added as an extended IRQ which exports caps VFIO_IRQ_INFO_CAP_TYPE and VFIO_IRQ_INFO_CAP_MSI_DESCS. Signed-off-by: Vikas Gupta --- drivers/vfio/platform/vfio_platform_common.c | 179 +++- drivers/vfio/platform/vfio_platform_irq.c | 2

[PATCH 5.9 085/105] pinctrl: jasperlake: Fix HOSTSW_OWN offset

2020-12-14 Thread Greg Kroah-Hartman
From: Evan Green commit cdd8fc2dd64e3f1b22a6636e242d0eff49c4ba22 upstream. GPIOs that attempt to use interrupts get thwarted with a message like: "pin 161 cannot be used as IRQ" (for instance with SD_CD). This is because the HOSTSW_OWN offset is incorrect, so every GPIO looks like it's owned by

[PATCH 5.9 100/105] scsi: be2iscsi: Revert "Fix a theoretical leak in beiscsi_create_eqs()"

2020-12-14 Thread Greg Kroah-Hartman
From: Dan Carpenter commit eeaf06af6f87e1dba371fbe42674e6f963220b9c upstream. My patch caused kernel Oopses and delays in boot. Revert it. The problem was that I moved the "mem->dma = paddr;" before the call to be_fill_queue(). But the first thing that the be_fill_queue() function does is mem

Re: [PATCH] efi/libstub: Allow EFI_NOT_FOUND on LOAD_FILE2_PROTOCOL calls for initrd

2020-12-14 Thread Ilias Apalodimas
On Mon, Dec 14, 2020 at 06:39:21PM +0100, Heinrich Schuchardt wrote: > On 14.12.20 18:01, Ilias Apalodimas wrote: > > At the moment the EFI stub tries to load an initrd from the > > cmdline provided option only if the LoadFile2 protocol does not exist > > on the initrd device path. > > > > This mig

Re: [PATCH v3 1/4] spi: LS7A: Add Loongson LS7A SPI controller driver support

2020-12-14 Thread Mark Brown
On Mon, Dec 14, 2020 at 01:58:51PM +0800, Qing Zhang wrote: > +static int ls7a_spi_do_transfer(struct ls7a_spi *ls7a_spi, > + struct spi_device *spi, > + struct spi_transfer *t) This does a lot of configuration, as far as I can see only

[PATCH v5 04/25] coresight: tpiu: Prepare for using coresight device access abstraction

2020-12-14 Thread Suzuki K Poulose
Prepare the TPIU driver to make use of the CoreSight device access abstraction layer. The driver touches the device even before the coresight device is registered. Thus we could be accessing the devices without a csdev. As we are about to use the abstraction layer for accessing the device, pass in

Re: [PATCH v4 1/2] Partially revert ASoC: qcom: Fix enabling BCLK and LRCLK in LPAIF invalid state

2020-12-14 Thread Mark Brown
On Mon, Dec 14, 2020 at 06:13:22PM +0530, Srinivasa Rao Mandadapu wrote: > On 12/1/2020 11:21 PM, Mark Brown wrote: > > > Later from review comments by Srinivas kandagatla, I got to know > > > > > > about regcache sync APIs, which can be used  to sync cache after resume > > > and > > > > > > HW

[PATCH v5 01/25] coresight: etm4x: Handle access to TRCSSPCICRn

2020-12-14 Thread Suzuki K Poulose
TRCSSPCICR is present only if all of the following are true: TRCIDR4.NUMSSCC > n. TRCIDR4.NUMPC > 0b . TRCSSCSR.PC == 0b1 Add a helper function to check all the conditions. Cc: Mike Leach Reviewed-by: Mathieu Poirier Signed-off-by: Suzuki K Poulose --- Changes since

[PATCH v5 03/25] coresight: Introduce device access abstraction

2020-12-14 Thread Suzuki K Poulose
We are about to introduce support for sysreg access to ETMv4.4+ component. Since there are generic routines that access the registers (e.g, CS_LOCK/UNLOCK , claim/disclaim operations, timeout) and in order to preserve the logic of these operations at a single place we introduce an abstraction layer

[PATCH 5.9 062/105] sched/idle: Fix arch_cpu_idle() vs tracing

2020-12-14 Thread Greg Kroah-Hartman
From: Peter Zijlstra [ Upstream commit 58c644ba512cfbc2e39b758dd979edd1d6d00e27 ] We call arch_cpu_idle() with RCU disabled, but then use local_irq_{en,dis}able(), which invokes tracing, which relies on RCU. Switch all arch_cpu_idle() implementations to use raw_local_irq_{en,dis}able() and care

[PATCH 5.9 072/105] platform/x86: touchscreen_dmi: Add info for the Irbis TW118 tablet

2020-12-14 Thread Greg Kroah-Hartman
From: Hans de Goede [ Upstream commit c9aa128080cbce92f8715a9328f88d8ca3134279 ] Add touchscreen info for the Irbis TW118 tablet. Reported-and-tested-by: russianneuromancer Signed-off-by: Hans de Goede Link: https://lore.kernel.org/r/20201124110454.114286-1-hdego...@redhat.com Signed-off-by:

Re: [PATCH 1/2] hwrng: iproc-rng200: Fix disable of the block.

2020-12-14 Thread Scott Branden
On 2020-12-14 8:04 a.m., matthias@kernel.org wrote: > From: Matthias Brugger > > When trying to disable the block we bitwise or the control > register with value zero. This will leave the block always turned on. > Fix this by setting the corresponding bit to zero. > > Fixes: c83d45d5685f ("

Re: [PATCH 1/2] mm: Allow architectures to request 'old' entries when prefaulting

2020-12-14 Thread Linus Torvalds
On Mon, Dec 14, 2020 at 8:07 AM Kirill A. Shutemov wrote: > > Here it is. Still barely tested. Ok, from looking at the patch (not applying it and looking at the end result), I think the locking - at least for the filemap_map_pages() case - is a lot easier to understand. So you seem to have fixed

Re: [RFC PATCH] pinctrl: add helper to expose pinctrl state in debugfs

2020-12-14 Thread Andy Shevchenko
On Sat, Dec 12, 2020 at 1:43 AM Drew Fustini wrote: > On Fri, Dec 11, 2020 at 11:15:21PM +0200, Andy Shevchenko wrote: > > On Fri, Dec 11, 2020 at 1:54 PM Drew Fustini wrote: > > > > > > BeagleBoard.org [0] currently uses an out-of-tree driver called > > > bone-pinmux-helper [1] developed by Pant

[GIT PULL] dlm updates for 5.11

2020-12-14 Thread David Teigland
Hi Linus, Please pull dlm updates from tag: git://git.kernel.org/pub/scm/linux/kernel/git/teigland/linux-dlm.git dlm-5.11 This set includes more low level communication layer cleanups. The main change is the listening socket is no longer handled as a special case of node connection sockets. The

[PATCH 5.9 061/105] soc: fsl: dpio: Get the cpumask through cpumask_of(cpu)

2020-12-14 Thread Greg Kroah-Hartman
From: Hao Si [ Upstream commit 2663b3388551230cbc4606a40fabf3331ceb59e4 ] The local variable 'cpumask_t mask' is in the stack memory, and its address is assigned to 'desc->affinity' in 'irq_set_affinity_hint()'. But the memory area where this variable is located is at risk of being modified. Du

Re: [PATCH] mm/vmalloc: Fix unlock order in s_stop()

2020-12-14 Thread Uladzislau Rezki
On Mon, Dec 14, 2020 at 03:37:46PM +, Matthew Wilcox wrote: > On Mon, Dec 14, 2020 at 04:11:28PM +0100, Uladzislau Rezki wrote: > > On Sun, Dec 13, 2020 at 09:51:34PM +, Matthew Wilcox wrote: > > > If we need to iterate the list efficiently, i'd suggest getting rid of > > > the list and usi

[PATCH 5.9 049/105] scsi: ufs: Fix unexpected values from ufshcd_read_desc_param()

2020-12-14 Thread Greg Kroah-Hartman
From: Can Guo [ Upstream commit 1699f980d87fb678a669490462cf0b9517c1fb47 ] WB-related sysfs entries can be accessed even when an UFS device does not support the feature. The descriptors which are not supported by the UFS device may be wrongly reported when they are accessed from their corrspondi

[PATCH v5 15/25] coresight: etm4x: Handle ETM architecture version

2020-12-14 Thread Suzuki K Poulose
We are about to rely on TRCDEVARCH for detecting the ETM and its architecture version, falling back to TRCIDR1 if the former is not implemented (in older broken implementations). Also, we use the architecture version information to make some decisions. Streamline the architecture version handling

[PATCH v5 25/25] coresight: Add support for v8.4 SelfHosted tracing

2020-12-14 Thread Suzuki K Poulose
From: Jonathan Zhou v8.4 tracing extensions added support for trace filtering controlled by TRFCR_ELx. This must be programmed to allow tracing at EL1/EL2 and EL0. The timestamp used is the virtual time. Also enable CONTEXIDR_EL2 tracing if we are running the kernel at EL2. Cc: Catalin Marinas

RE: [PATCH v8 12/18] PCI: cadence: Configure LM_EP_FUNC_CFG based on epc->function_num_map

2020-12-14 Thread Tom Joseph
> -Original Message- > From: Kishon Vijay Abraham I > Sent: 11 November 2020 15:36 > > The number of functions supported by the endpoint controller is > configured in LM_EP_FUNC_CFG based on func_no member of struct > pci_epf. > Now that an endpoint function can be associated with two end

[PATCH v2 net-next] net: phy: mchp: Add 1588 support for LAN8814 Quad PHY

2020-12-14 Thread Divya Koppera
This patch add supports for 1588 Hardware Timestamping support to LAN8814 Quad Phy. It supports L2 and Ipv4 encapsulations. Signed-off-by: Divya Koppera --- v1 -> v2 * Fixed warnings Reported-by: kernel test robot --- drivers/net/phy/micrel.c | 1054 +- 1 fi

Re: [PATCH 2/2] hwrng: iproc-rng200: Move enable/disable in separate function

2020-12-14 Thread Scott Branden
On 2020-12-14 8:04 a.m., matthias@kernel.org wrote: > From: Matthias Brugger > > We are calling the same code for enable and disable the block in various > parts of the driver. Put that code into a new function to reduce code > duplication. Patch needs to be regenerated after most of PATCH

[PATCH v5 22/25] coresight: etm4x: Add support for sysreg only devices

2020-12-14 Thread Suzuki K Poulose
Add support for devices with system instruction access only. They don't have a memory mapped interface and thus are not AMBA devices. Cc: Mike Leach Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose --- Changes since v4 - Add "remove" callback for platform_driver. - Dropped Reviewed-by tag

RE: [PATCH v8 11/18] PCI: cadence: Implement ->msi_map_irq() ops

2020-12-14 Thread Tom Joseph
> -Original Message- > From: Kishon Vijay Abraham I > > Implement ->msi_map_irq() ops in order to map physical address to > MSI address and return MSI data. > > Signed-off-by: Kishon Vijay Abraham I > --- > .../pci/controller/cadence/pcie-cadence-ep.c | 53 +++ > 1 f

[PATCH v5 23/25] dts: bindings: coresight: ETM system register access only units

2020-12-14 Thread Suzuki K Poulose
Document the bindings for ETMs with system register accesses. Cc: devicet...@vger.kernel.org Cc: Mathieu Poirier Cc: Mike Leach Acked-by: Rob Herring Signed-off-by: Suzuki K Poulose --- Documentation/devicetree/bindings/arm/coresight.txt | 5 - 1 file changed, 4 insertions(+), 1 deletion(

[PATCH v5 21/25] coresight: etm4x: Refactor probing routine

2020-12-14 Thread Suzuki K Poulose
CoreSight ETM with system register access may not have a memory mapped i/o access. Refactor the ETM specific probing into a common routine to allow reusing the code for such ETMs. Cc: Mike Leach Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose --- Changes since v4: - Refactor the "remove" c

[PATCH v5 24/25] arm64: Add TRFCR_ELx definitions

2020-12-14 Thread Suzuki K Poulose
From: Jonathan Zhou Add definitions for the Arm v8.4 SelfHosted trace extensions registers. Acked-by: Catalin Marinas Cc: Will Deacon Signed-off-by: Jonathan Zhou [ split the register definitions to separate patch rename some of the symbols ] Signed-off-by: Suzuki K Poulose --- arch/arm64

[PATCH backport] membarrier: Explicitly sync remote cores when SYNC_CORE is requested

2020-12-14 Thread Andy Lutomirski
commit 758c9373d84168dc7d039cf85a0e920046b17b41 upstream membarrier() does not explicitly sync_core() remote CPUs; instead, it relies on the assumption that an IPI will result in a core sync. On x86, this may be true in practice, but it's not architecturally reliable. In particular, the SDM and

Re: [PATCH linux hwmon-next v5 1/3] hwmon: (sbtsi) Add basic support for SB-TSI sensors

2020-12-14 Thread Kun Yi
On Sat, Dec 12, 2020 at 8:44 AM Guenter Roeck wrote: > > On Fri, Dec 11, 2020 at 01:54:25PM -0800, Kun Yi wrote: > > SB Temperature Sensor Interface (SB-TSI) is an SMBus compatible > > interface that reports AMD SoC's Ttcl (normalized temperature), > > and resembles a typical 8-pin remote temperat

[PATCH v5 20/25] coresight: etm4x: Detect system instructions support

2020-12-14 Thread Suzuki K Poulose
ETM v4.4 onwards adds support for system instruction access to the ETM. Detect the support on an ETM and switch to using the mode when available. Cc: Mike Leach Reviewed-by: Mathieu Poirier Signed-off-by: Suzuki K Poulose --- .../coresight/coresight-etm4x-core.c | 39 +

[PATCH v5 17/25] coresight: etm4x: Use TRCDEVARCH for component discovery

2020-12-14 Thread Suzuki K Poulose
We have been using TRCIDR1 for detecting the ETM version. This is in preparation for the future IP support. Cc: Mike Leach Reviewed-by: Mathieu Poirier Signed-off-by: Suzuki K Poulose --- .../coresight/coresight-etm4x-core.c | 46 +-- 1 file changed, 23 insertions(+),

[PATCH v5 19/25] coresight: etm4x: Add necessary synchronization for sysreg access

2020-12-14 Thread Suzuki K Poulose
As per the specification any update to the TRCPRGCTLR must be synchronized by a context synchronization event (in our case an explicist ISB) before the TRCSTATR is checked. Cc: Mike Leach Reviewed-by: Mathieu Poirier Signed-off-by: Suzuki K Poulose --- drivers/hwtracing/coresight/coresight-etm

[PATCH v5 13/25] coresight: etm4x: Cleanup secure exception level masks

2020-12-14 Thread Suzuki K Poulose
We rely on the ETM architecture version to decide whether Secure EL2 is available on the CPU for excluding the level for address comparators and viewinst main control register. We must instead use the TRCDIDR3.EXLEVEL_S field to detect the supported levels. Reviewed-by: Mathieu Poirier Signed-off

[PATCH v5 08/25] coresight: etm4x: Convert all register accesses

2020-12-14 Thread Suzuki K Poulose
Convert all register accesses from etm4x driver to use a wrapper to allow switching the access at runtime with little overhead. co-developed by sed tool ;-), mostly equivalent to : s/readl\(_relaxed\)\?(drvdata->base + \(.*\))/etm4x_\1_read32(csdev, \2) s/writel\(_relaxed\)\?(\(.*\), drvdata->bas

[PATCH v5 06/25] coresight: Convert claim/disclaim operations to use access wrappers

2020-12-14 Thread Suzuki K Poulose
Convert the generic CLAIM tag management APIs to use the device access layer abstraction. Cc: Mike Leach Reviewed-by: Mathieu Poirier Signed-off-by: Suzuki K Poulose --- Changes since V3: - Removed WARN_ON(!csdev) check. (Mathieu) - Fixed indentation (Mathieu) --- drivers/hwtracing/coresight

[PATCH 5.9 034/105] perf/x86/intel: Fix a warning on x86_pmu_stop() with large PEBS

2020-12-14 Thread Greg Kroah-Hartman
From: Namhyung Kim [ Upstream commit 5debf02131227d39988e44adf5090fb796fa8466 ] The commit 3966c3feca3f ("x86/perf/amd: Remove need to check "running" bit in NMI handler") introduced this. It seems x86_pmu_stop can be called recursively (like when it losts some samples) like below: x86_pmu_s

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