On Thu, Jan 07, 2021 at 01:28:27PM +, Daniel Scally wrote:
> This function is used to find fwnode endpoints against a device. In
> some instances those endpoints are software nodes which are children of
> fwnode->secondary. Add support to fwnode_graph_get_endpoint_by_id() to
> find those
On Thu, Jan 07, 2021 at 01:28:28PM +, Daniel Scally wrote:
> Registering software_nodes with the .parent member set to point to a
> currently unregistered software_node has the potential for problems,
> so enforce parent -> child ordering in arrays passed in to
>
On Thu, Jan 07, 2021 at 01:28:26PM +, Daniel Scally wrote:
> Some types of fwnode_handle do not implement the device_is_available()
> check, such as those created by software_nodes. There isn't really a
> meaningful way to check for the availability of a device that doesn't
> actually exist,
On Thu, Jan 07, 2021 at 01:28:24PM +, Daniel Scally wrote:
> The software_node_get_next_child() function currently does not hold
> references to the child software_node that it finds or put the ref that
> is held against the old child - fix that.
>
> Fixes: 59abd83672f7 ("drivers: base:
Hello,
This is just a headsup that I've been working on the EDAC driver based on the
ARMv8 RAS extensions. AFAIK, there were 3 attempts [1][2][3] on getting this
merged in different forms.
I've collected the feedback on those submissions and came up with the idea of
a single "armv8_ras_edac"
On Fri, Jan 8, 2021 at 1:36 PM Radhey Shyam Pandey wrote:
>
> > -Original Message-
> > From: Paul Thomas
> > Sent: Friday, January 8, 2021 9:27 PM
> > To: Radhey Shyam Pandey
> > Cc: Dan Williams ; Vinod Koul
> > ; Michal Simek ; Matthew Murrian
> > ; Romain Perier
> > ; Krzysztof
On Sun, Jan 10, 2021 at 08:41:49PM +0530, Manivannan Sadhasivam wrote:
> I've collected the feedback on those submissions and came up with the idea of
> a single "armv8_ras_edac" driver which will work for both Devicetree and ACPI
"ras" and "edac" both is too much. Just call it armv8_edac or
From: Stefan Chulski
Armada hardware has a pause generation mechanism in GOP (MAC).
GOP has to generate flow control frames based on an indication
programmed in Ports Control 0 Register. There is a bit per port.
However assertion of the PortX Pause bits in the ports control 0 register
only sends
From: Stefan Chulski
Signed-off-by: Stefan Chulski
---
Documentation/devicetree/bindings/net/marvell-pp2.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/net/marvell-pp2.txt
b/Documentation/devicetree/bindings/net/marvell-pp2.txt
index b783976..f9f8cc6
From: Konstantin Porotchkin
CM3 SRAM address space would be used for Flow Control configuration.
Signed-off-by: Stefan Chulski
---
arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
From: Stefan Chulski
This patch adds CM3 memory map and CM3 read/write callbacks.
No functionality changes.
Change-Id: Ibae3f5e6695f3454f799568308d349addc730f01
Signed-off-by: Stefan Chulski
---
drivers/net/ethernet/marvell/mvpp2/mvpp2.h | 7 +++
From: Stefan Chulski
This patch add PPv23 version definition.
PPv23 is new packet processor in CP115.
Everything that supported by PPv22, also supported by PPv23.
No functional changes in this stage.
Signed-off-by: Stefan Chulski
---
drivers/net/ethernet/marvell/mvpp2/mvpp2.h | 24
From: Stefan Chulski
BM pool size increased to support Firmware Flow Control.
Minimum depletion thresholds to support FC is 1024 buffers.
BM pool size increased to 2048 to have some 1024 buffers
space between depletion thresholds and BM pool size.
Signed-off-by: Stefan Chulski
---
From: Stefan Chulski
RXQ size increased to support Firmware Flow Control.
Minimum depletion thresholds to support FC is 1024 buffers.
Default set to 1024 descriptors and maximum size to 2048.
Signed-off-by: Stefan Chulski
---
drivers/net/ethernet/marvell/mvpp2/mvpp2.h | 4 ++--
1 file
From: Stefan Chulski
Currently we have PP2v1 and PP2v2 hw-versions, with some different
handlers depending upon condition hw_version = MVPP21/MVPP22.
In a future there will be also PP2v3. Let's use now the generic
"if equal/notEqual MVPP21" for all cases instead of "if MVPP22".
This patch does
From: Stefan Chulski
RXQ non occupied descriptor threshold would be used by
Flow Control Firmware feature to move to the XOFF mode.
RXQ non occupied threshold would change interrupt cause
that polled by CM3 Firmware.
Actual non occupied interrupt masked and won't trigger interrupt.
From: Stefan Chulski
Spinlock added to MSS shared memory configuration space.
Signed-off-by: Stefan Chulski
---
drivers/net/ethernet/marvell/mvpp2/mvpp2.h | 5 +
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 3 +++
2 files changed, 8 insertions(+)
diff --git
From: Stefan Chulski
This patch did not change any functionality.
Added flow control RXQ and BM pool config callbacks that would be
used to configure RXQ and BM pool thresholds.
APIs also will disable/enable RXQ and pool Flow Control polling.
In this stage BM pool and RXQ has same stop/start
From: Stefan Chulski
This patch enable global flow control in FW.
Per port flow control is still disabled.
Signed-off-by: Stefan Chulski
---
drivers/net/ethernet/marvell/mvpp2/mvpp2.h | 3 +++
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 15 ++-
2 files changed, 17
From: Stefan Chulski
Flow Control periodic timer would be used if port in
XOFF to transmit periodic XOFF frames.
Signed-off-by: Stefan Chulski
---
drivers/net/ethernet/marvell/mvpp2/mvpp2.h | 13 +-
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 45
2 files
From: Stefan Chulski
This patch add RXQ flow control configurations.
Patch do not enable flow control itself, flow control
disabled by default.
Signed-off-by: Stefan Chulski
---
drivers/net/ethernet/marvell/mvpp2/mvpp2.h | 3 +++
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 7
From: Stefan Chulski
This patch add ethtool flow control configuration support.
Tx flow control retrieved correctly by ethtool get function.
FW per port ethtool configuration capability added.
Patch also takes care about mtu change procedure, if PPv2 switch
BM pools during mtu change.
From: Stefan Chulski
Feature double size of BPPI by decreasing number of pools from 16 to 8.
Increasing of BPPI size protect BM drop from BPPI underrun.
Underrun could occurred due to stress on DDR and as result slow buffer
transition from BPPE to BPPI.
New BPPI threshold recommended by spec is:
From: Stefan Chulski
New FIFO flow control feature were added in PPv23.
PPv2 FIFO polled by HW and trigger pause frame if FIFO
fill level is below threshold.
FIFO HW flow control enabled with CM3 RXQ flow
control with ethtool.
Current FIFO thresholds is:
9KB for port with maximum speed 10Gb/s
From: Stefan Chulski
Patch check that TX FC firmware is running in CM3.
If not, global TX FC would be disabled.
Signed-off-by: Stefan Chulski
---
drivers/net/ethernet/marvell/mvpp2/mvpp2.h | 1 +
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 39
2 files changed,
From: Stefan Chulski
This patch add ring size validation before enabling FC.
1. Flow control cannot be enabled if ring size is below start
threshold.
2. Flow control disabled if ring size set below start
threshold.
Signed-off-by: Stefan Chulski
---
From: Stefan Chulski
This patch fix GMAC TX flow control autoneg.
Flow control autoneg wrongly were disabled with enabled TX
flow control.
Signed-off-by: Stefan Chulski
---
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On 09/01/21, Fabio Estevam wrote:
> Hi Oliver,
>
> On Fri, Jan 8, 2021 at 7:24 PM Oliver Graute wrote:
> >
> > On 19/12/20, Oliver Graute wrote:
> > > Add support for the Solomon Goldentek Display Model: GKTW70SDAD1SD
> > > to panel-simple.
> > >
> > > The panel spec from Variscite can be found
Hi,
On Sun, Jan 10, 2021 at 10:45 PM Johan Jonker wrote:
>
> Hi Chen-Yu,
>
> Some comments, have a look if it is useful...
>
> On 1/10/21 4:58 AM, Chen-Yu Tsai wrote:
> > From: Chen-Yu Tsai
> >
> > Radxa ROCK Pi E is a router oriented SBC based on Rockchip's RK3328 SoC.
> > As the official wiki
On Sun, Jan 10, 2021 at 1:16 PM Laurent Pinchart
wrote:
> On Sat, Jan 09, 2021 at 11:07:33AM +0200, Andy Shevchenko wrote:
> > On Saturday, January 9, 2021, Laurent Pinchart wrote:
> > > Could you please let us know if you're fine with this patch getting
> > > merged in v5.12 through the
On Wed, Jan 06, 2021 at 04:04:21PM -0500, Qian Cai wrote:
> On Wed, 2021-01-06 at 10:05 +0200, Mike Rapoport wrote:
> > I think we trigger PF_POISONED_CHECK() in PageSlab(), then fffe
> > is "accessed" from VM_BUG_ON_PAGE().
> >
> > It seems to me that we are not initializing struct
On 1/10/21 4:16 PM, Paul Thomas wrote:
On Fri, Jan 8, 2021 at 1:36 PM Radhey Shyam Pandey wrote:
-Original Message-
From: Paul Thomas
Sent: Friday, January 8, 2021 9:27 PM
To: Radhey Shyam Pandey
Cc: Dan Williams ; Vinod Koul
; Michal Simek ; Matthew Murrian
; Romain Perier
;
On 1/7/21 8:09 AM, Tom Rix wrote:
> On 1/6/21 8:37 PM, Moritz Fischer wrote:
>> This is a resend of the previous (unfortunately late) patchset of
>> changes for FPGA DFL.
> Is there something I can do to help ?
>
> I am paid to look after linux-fpga, so i have plenty of time.
>
> Some ideas of
On Sun, Jan 10, 2021 at 04:29:43PM +0100, Borislav Petkov wrote:
> On Sun, Jan 10, 2021 at 08:41:49PM +0530, Manivannan Sadhasivam wrote:
> > I've collected the feedback on those submissions and came up with the idea
> > of
> > a single "armv8_ras_edac" driver which will work for both Devicetree
Hi Arnd,
Le 08/01/2021 à 23:55, Arnd Bergmann a écrit :
> After v5.10 was officially declared an LTS kernel, I had a look around
> the Arm platforms that look like they have not seen any patches from
> their maintainers or users that are actually running the hardware for
> at least five years
On Sun, Jan 10, 2021 at 05:38:03PM +0200, Andy Shevchenko wrote:
> On Sun, Jan 10, 2021 at 1:16 PM Laurent Pinchart wrote:
> > On Sat, Jan 09, 2021 at 11:07:33AM +0200, Andy Shevchenko wrote:
> > > On Saturday, January 9, 2021, Laurent Pinchart wrote:
> > > > Could you please let us know if you're
On Sun, Jan 10, 2021 at 4:51 PM Neil Armstrong wrote:
>
> Hi Arnd,
>
> Le 08/01/2021 à 23:55, Arnd Bergmann a écrit :
> > After v5.10 was officially declared an LTS kernel, I had a look around
> > the Arm platforms that look like they have not seen any patches from
> > their maintainers or users
This patch changes device name to more user friendly name of
Analog and SPDIF sound nodes for rk3399-rockpro64.
Signed-off-by: Katsuhiro Suzuki
---
arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
On 09/01/21, Fabio Estevam wrote:
> On Fri, Jan 8, 2021 at 7:23 PM Oliver Graute wrote:
>
> > + panel1: panel-lcd {
> > + compatible = "sgd,gktw70sdad1sd";
> > +
> > + backlight = <_lcd>;
> > + power-supply = <_touch_3v3>;
> > + label
On 09/01/21, Fabio Estevam wrote:
> On Fri, Jan 8, 2021 at 7:23 PM Oliver Graute wrote:
>
> > diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml
> > b/Documentation/devicetree/bindings/arm/fsl.yaml
> > index 05906e2..5f74d78 100644
> > ---
On Sat, 2021-01-09 at 12:51 +0800, Can Guo wrote:
> On 2021-01-09 12:45, Can Guo wrote:
> > On 2021-01-08 19:29, Bean Huo wrote:
> > > On Wed, 2021-01-06 at 09:20 +0800, Can Guo wrote:
> > > > Hi Bean,
> > > >
> > > > On 2021-01-06 02:38, Bean Huo wrote:
> > > > > On Tue, 2021-01-05 at 09:07
From: Liao Pingfang
The struct name should be file_system_type instead of
file_system_operations.
Signed-off-by: Liao Pingfang
---
Documentation/filesystems/vfs.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/filesystems/vfs.rst
On Sat, 2021-01-02 at 05:59 -0800, Can Guo wrote:
> + * @shutting_down: flag to check if shutdown has been invoked
> + * @host_sem: semaphore used to serialize concurrent contexts
> * @eh_wq: Workqueue that eh_work works on
> * @eh_work: Worker to handle UFS errors that require s/w attention
>
On Thu, Jan 07, 2021 at 08:15:41AM -0500, Mikulas Patocka wrote:
> Hi
>
> I announce a new version of NVFS - a filesystem for persistent memory.
> http://people.redhat.com/~mpatocka/nvfs/
Utilities, AFAICS
> git://leontynka.twibright.com/nvfs.git
Seems to hang on git pull at the
Hi Oliver,
On Sun, Jan 10, 2021 at 12:35 PM Oliver Graute wrote:
> the first two errors are gone. But I still get this:
>
> [ 42.387107] mxsfb 21c8000.lcdif: Cannot connect bridge: -517
>
> The panel is still off perhaps I miss something else.
Some suggestions:
- Take a look at
* Dmitry Torokhov [210110 06:31]:
> I do not quite like that we need to keep this in remove(). I had the
> patch below for quite some time, could you please try it?
Yes seems to work nice :)
> Input: omap4-keypad - switch to use managed resources
>
> From: Dmitry Torokhov
>
> Now that input
> For this platform, I'm most interested in whether there are still users
> that rely on board files instead of DT. AFAIU we could just fold
> the DT variant into arch-mvebu like kirkwood was, right?
Hi Arnd
I'm actually booting my device using a board file. But Debian
flash-kernel is pretty
* Dmitry Torokhov [210110 06:34]:
> Hi Tony,
>
> On Wed, Jan 06, 2021 at 02:58:21PM +0200, Tony Lindgren wrote:
> > @@ -301,6 +348,7 @@ static int omap4_keypad_probe(struct platform_device
> > *pdev)
> > }
> >
> > keypad_data->irq = irq;
> > + mutex_init(_data->lock);
> >
> >
On Sun, Jan 10, 2021 at 04:20:08PM +, Al Viro wrote:
> On Thu, Jan 07, 2021 at 08:15:41AM -0500, Mikulas Patocka wrote:
> > Hi
> >
> > I announce a new version of NVFS - a filesystem for persistent memory.
> > http://people.redhat.com/~mpatocka/nvfs/
> Utilities, AFAICS
>
> >
This makes sure the clock tree setup for the dphy is not dependent on
other components.
Without this change bringing up the display can fail like
kernel: phy phy-30a00300.dphy.2: Invalid CM/CN/CO values: 165/217/1
kernel: phy phy-30a00300.dphy.2: for hs_clk/ref_clk=451656000/59398 ~
On Mon, Jan 4, 2021 at 1:12 AM Sascha Hauer wrote:
>
> Hi Adam,
>
> On Tue, Dec 29, 2020 at 08:51:28AM -0600, Adam Ford wrote:
> > Remove the earlycon uart clocks that are hard cord in platforms
> > clock driver, instead of parsing the earlycon uart port from dt
>
> "instead parse the earlycon
Hi,
On Sun, Jan 10, 2021 at 08:46:29PM +0800, Shawn Guo wrote:
> On Fri, Dec 18, 2020 at 06:50:05PM +0100, Guido Günther wrote:
> > This makes sure the clock tree setup for the dphy is not dependent on
> > other components.
> >
> > Without this change bringing up the display can fail like
> >
>
> +static int mvpp2_get_sram(struct platform_device *pdev,
> + struct mvpp2 *priv)
> +{
> + struct device_node *dn = pdev->dev.of_node;
> + struct resource *res;
> +
> + if (has_acpi_companion(>dev)) {
> + res = platform_get_resource(pdev,
Tom,
On Sun, Jan 10, 2021 at 07:46:29AM -0800, Tom Rix wrote:
>
> On 1/7/21 8:09 AM, Tom Rix wrote:
> > On 1/6/21 8:37 PM, Moritz Fischer wrote:
> >> This is a resend of the previous (unfortunately late) patchset of
> >> changes for FPGA DFL.
> > Is there something I can do to help ?
> >
> > I
> -Original Message-
> From: Andrew Lunn
> Sent: Sunday, January 10, 2021 7:05 PM
> To: Stefan Chulski
> Cc: net...@vger.kernel.org; thomas.petazz...@bootlin.com;
> da...@davemloft.net; Nadav Haklai ; Yan Markman
> ; linux-kernel@vger.kernel.org; k...@kernel.org;
>
On Sun, Jan 10, 2021 at 05:30:10PM +0200, stef...@marvell.com wrote:
> From: Stefan Chulski
>
> BM pool size increased to support Firmware Flow Control.
> Minimum depletion thresholds to support FC is 1024 buffers.
> BM pool size increased to 2048 to have some 1024 buffers
> space between
Hi Stephen,
On Sun, 2021-01-10 at 13:14 +1100, Stephen Rothwell wrote:
> Hi all,
>
> In commit
>
> 2cc8aca9d547 ("NFS: Adjust fs_context error logging")
>
> Fixes tag
>
> Fixes: Fixes: ce8866f0913f ("NFS: Attach supplementary error
> information to fs_context.")
>
> has these problem(s):
On Sat, Jan 09, 2021 at 03:01:18AM -0500, Miaohe Lin wrote:
> Since commit 42e4089c7890 ("x86/speculation/l1tf: Disallow non privileged
> high MMIO PROT_NONE mappings"), when the first pfn modify is not allowed,
> we would break the loop with pte unchanged. Then the wrong pte - 1 would
> be passed
On Fri, 08 Jan 2021 13:25:32 -0800, mgr...@linux.intel.com wrote:
> From: Paul Murphy
>
> Add DT bindings documentation for the Keem Bay VPU IPC driver.
>
> Cc: Rob Herring
> Cc: devicet...@vger.kernel.org
> Reviewed-by: Mark Gross
> Signed-off-by: Paul Murphy
> Co-developed-by: Daniele
On Sat, 09 Jan 2021 15:02:04 +0100, AngeloGioacchino Del Regno wrote:
> Add bindings for the Awinic AW9523/AW9523B I2C GPIO Expander driver.
>
> Signed-off-by: AngeloGioacchino Del Regno
>
> ---
> .../pinctrl/awinic,aw9523-pinctrl.yaml| 111 ++
> 1 file changed, 111
On Sat, 09 Jan 2021 19:03:52 +0100, AngeloGioacchino Del Regno wrote:
> Convert the qcom,cpr.txt document to YAML schema and place it in the
> appropriate directory, since this driver was moved from power/avs
> to soc/qcom, but forgets to move the documentation.
>
> Fixes: a7305e684fcf ("PM: AVS:
On Sat, 09 Jan 2021 14:29:18 +0100, AngeloGioacchino Del Regno wrote:
> Document properties to configure soft start and discharge resistor
> for LAB and IBB respectively.
>
> Signed-off-by: AngeloGioacchino Del Regno
>
> ---
> .../bindings/regulator/qcom-labibb-regulator.yaml | 8
On Fri, 08 Jan 2021 13:25:45 -0800, mgr...@linux.intel.com wrote:
> From: Seamus Kelly
>
> Add device tree bindings for keembay-xlink.
>
> Cc: Rob Herring
> Cc: devicet...@vger.kernel.org
> Reviewed-by: Mark Gross
> Signed-off-by: Seamus Kelly
> Signed-off-by: Ryan Carnaghi
> ---
>
On Sat, 09 Jan 2021 19:03:59 +0100, AngeloGioacchino Del Regno wrote:
> The OSM programming addition has been done under the
> qcom,cpufreq-hw-8998 compatible name: specify the requirement
> of two additional register spaces for this functionality.
> This implementation, with the same compatible,
On Fri, 08 Jan 2021 13:25:43 -0800, mgr...@linux.intel.com wrote:
> From: Seamus Kelly
>
> Add device tree bindings for the xLink IPC driver which enables xLink to
> control and communicate with the VPU IP present on the Intel Keem Bay
> SoC.
>
> Cc: Rob Herring
> Cc:
On Fri, 08 Jan 2021 23:40:06 +0100, Jonathan Neuschäfer wrote:
> The general trend is to have devicetree bindings in YAML format, to
> allow automatic validation of bindings and devicetrees.
>
> Convert the NPCM SoC family's binding to YAML before it accumulates more
> entries.
>
> The
From: Hailong Liu
The *PTE_HWTABLE_OFF + PTE_HWTABLE_SIZE* may be a more accurate and
meaningful size for PTE tables than *PAGE_SIZE* when populating the
PMD entries for arm.
Signed-off-by: Hailong Liu
---
arch/arm/mm/kasan_init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
On Sun, Jan 10, 2021 at 11:19 AM Sasha Levin wrote:
>
> On Sat, Jan 09, 2021 at 05:23:22PM -0800, Linus Torvalds wrote:
> >Ack, I think 436e980e2ed5 ("kbuild: don't hardcode depmod path") is
> >stable material even if it doesn't fix a bug.
> >
> >Not only does the fix for that commit not make
> -Original Message-
> From: Greg KH
> Sent: Thursday, January 7, 2021 2:40 PM
> To: Chen, Mike Ximing
> Cc: linux-kernel@vger.kernel.org; a...@arndb.de; Williams, Dan J
> ; pierre-louis.boss...@linux.intel.com; Gage Eads
>
> Subject: Re: [PATCH v8 03/20] dlb: add resource and device
On Sun, Jan 10, 2021 at 5:48 PM Andrew Lunn wrote:
>
> > For this platform, I'm most interested in whether there are still users
> > that rely on board files instead of DT. AFAIU we could just fold
> > the DT variant into arch-mvebu like kirkwood was, right?
>
> Hi Arnd
>
> I'm actually booting
> External Email
>
> --
> On Sun, Jan 10, 2021 at 05:30:10PM +0200, stef...@marvell.com wrote:
> > From: Stefan Chulski
> >
> > BM pool size increased to support Firmware Flow Control.
> > Minimum depletion thresholds to support
> @@ -5373,6 +5402,30 @@ static int mvpp2_ethtool_set_pause_param(struct
> net_device *dev,
>struct ethtool_pauseparam *pause)
> {
> struct mvpp2_port *port = netdev_priv(dev);
> + int i;
> +
> + if (pause->tx_pause &&
Hi Arnd!
(Please let's have this cross-posted for more visibility. I only learned about
this
while reading Phoronix news)
> I also looked at non-ARM platforms while preparing for my article. Some of
> these look like they are no longer actively maintained or used, but I'm not
> doing anything
On Sun, Jan 10, 2021 at 05:30:22PM +0200, stef...@marvell.com wrote:
> From: Stefan Chulski
>
> This patch add ring size validation before enabling FC.
> 1. Flow control cannot be enabled if ring size is below start
> threshold.
> 2. Flow control disabled if ring size set below start
>
Before this, only the owner of the user namespace had an entry in ucounts.
This entry addressed the user in the given user namespace.
Now we create such an entry in ucounts for all users in the user namespace.
Each user has only one entry for each user namespace.
This commit is in preparation
Preface
---
These patches are for binding the rlimit counters to a user in user namespace.
This patch set can be applied on top of:
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git v5.11-rc2
Problem
---
Some rlimits are set per user: RLIMIT_NPROC, RLIMIT_MEMLOCK,
Signed-off-by: Alexey Gladkov
---
include/linux/sched/user.h | 4
include/linux/user_namespace.h | 8
ipc/mqueue.c | 29 +++--
kernel/fork.c | 1 +
kernel/ucount.c| 1 +
kernel/user_namespace.c
Signed-off-by: Alexey Gladkov
---
fs/proc/array.c| 2 +-
include/linux/sched/user.h | 1 -
include/linux/signal_types.h | 4 ++-
include/linux/user_namespace.h | 1 +
kernel/fork.c | 1 +
kernel/signal.c| 53
> > Should there be -EPROBE_DEFER handling in here somewhere? The SRAM is a
> > device, so it might not of been probed yet?
>
> No, firmware probed during bootloader boot and we can use SRAM. SRAM
> memory can be safely used.
A previous patch added:
+ CP11X_LABEL(cm3_sram):
Signed-off-by: Alexey Gladkov
---
fs/hugetlbfs/inode.c | 17 -
include/linux/hugetlb.h| 3 +--
include/linux/mm.h | 4 ++--
include/linux/shmem_fs.h | 2 +-
include/linux/user_namespace.h | 1 +
ipc/shm.c | 31
Signed-off-by: Alexey Gladkov
---
include/linux/user_namespace.h | 2 +-
kernel/ucount.c| 10 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/include/linux/user_namespace.h b/include/linux/user_namespace.h
index 64cf8ebdc4ec..84fefa9247c4 100644
---
RLIMIT_NPROC is implemented on top of ucounts. The process counter is
tied to the user in the user namespace. Therefore, there is no longer
one single counter for the user. Instead, there is now one counter for
each user namespace. Thus, getting the RLIMIT_NPROC counter value to
check the rlimit
This commit is preparation for migrating rlimits counters to ucounts.
Signed-off-by: Alexey Gladkov
---
include/linux/user_namespace.h | 4 ++--
kernel/ucount.c| 14 +++---
2 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/include/linux/user_namespace.h
After calling set_user(), we always have to call commit_creds() to apply
new credentials upon the current task. There is no need to separate
limit check and counter incrementing.
Signed-off-by: Alexey Gladkov
---
kernel/cred.c | 22 +-
kernel/sys.c | 13 -
2
>
> > > Should there be -EPROBE_DEFER handling in here somewhere? The SRAM
> > > is a device, so it might not of been probed yet?
> >
>
> > No, firmware probed during bootloader boot and we can use SRAM. SRAM
> > memory can be safely used.
>
> A previous patch added:
>
> +
Hello,
I believe that the following commit does introduce a gentle "functionality
bug":
"module: delay kobject uevent until after module init call":
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/kernel/module.c?id=38dc717e97153e46375ee21797aa54777e5498f3
The official
The device link device's name was of the form:
--
This can cause name collision as reported here [1] as device names are
not globally unique. Since device names have to be unique within the
bus/class, add the bus/class name as a prefix to the device names used to
construct the device link device
On Sun, Jan 10, 2021 at 05:30:07PM +0200, stef...@marvell.com wrote:
> + } else {
> + priv->sram_pool = of_gen_pool_get(dn, "cm3-mem", 0);
> + if (!priv->sram_pool) {
> + dev_warn(>dev, "DT is too old, TX FC disabled\n");
I don't see anything in
> > @@ -5373,6 +5402,30 @@ static int
> mvpp2_ethtool_set_pause_param(struct net_device *dev,
> > struct ethtool_pauseparam *pause) {
> > struct mvpp2_port *port = netdev_priv(dev);
> > + int i;
> > +
> > + if (pause->tx_pause &&
> > + } else {
> > + priv->sram_pool = of_gen_pool_get(dn, "cm3-mem", 0);
> > + if (!priv->sram_pool) {
> > + dev_warn(>dev, "DT is too old, TX FC
> disabled\n");
>
> I don't see anything in this patch that disables TX flow control, which means
> this
Il 10/01/21 18:18, Rob Herring ha scritto:
On Sat, 09 Jan 2021 14:29:18 +0100, AngeloGioacchino Del Regno wrote:
Document properties to configure soft start and discharge resistor
for LAB and IBB respectively.
Signed-off-by: AngeloGioacchino Del Regno
---
On Sun, Jan 10, 2021 at 05:57:14PM +, Stefan Chulski wrote:
> > > + } else {
> > > + priv->sram_pool = of_gen_pool_get(dn, "cm3-mem", 0);
> > > + if (!priv->sram_pool) {
> > > + dev_warn(>dev, "DT is too old, TX FC
> > disabled\n");
> >
> > I don't see anything
On Sun, Jan 10, 2021 at 05:30:15PM +0200, stef...@marvell.com wrote:
> From: Stefan Chulski
>
> This patch did not change any functionality.
> Added flow control RXQ and BM pool config callbacks that would be
> used to configure RXQ and BM pool thresholds.
> APIs also will disable/enable RXQ and
On Sun, Jan 10, 2021 at 05:30:16PM +0200, stef...@marvell.com wrote:
> + /* Enable global Flow Control only if hanler to SRAM not NULL */
I think this comment needs fixing. I'm not sure what a "hanler" is,
and "handler" doesn't make sense here.
--
RMK's Patch system:
> > > > + } else {
> > > > + priv->sram_pool = of_gen_pool_get(dn, "cm3-mem", 0);
> > > > + if (!priv->sram_pool) {
> > > > + dev_warn(>dev, "DT is too old, TX FC
> > > disabled\n");
> > >
> > > I don't see anything in this patch that
Hi,
Am Samstag, 9. Januar 2021, 23:20:48 CET schrieb Arnd Bergmann:
> On Sat, Jan 9, 2021 at 1:06 AM Daniel Tang wrote:
> >
> > Hi Arnd,
> >
> > On 9 Jan 2021, at 9:55 am, Arnd Bergmann wrote:
> >
> > * nspire -- added in 2013, no notable changes after 2015
Most of the platform is just the DT
On Sun, Jan 10, 2021 at 05:30:18PM +0200, stef...@marvell.com wrote:
> @@ -5373,6 +5402,30 @@ static int mvpp2_ethtool_set_pause_param(struct
> net_device *dev,
>struct ethtool_pauseparam *pause)
> {
> struct mvpp2_port *port = netdev_priv(dev);
> +
Hi,
On Sun, Jan 10, 2021 at 05:30:04PM +0200, stef...@marvell.com wrote:
> Armada hardware has a pause generation mechanism in GOP (MAC).
> GOP has to generate flow control frames based on an indication
> programmed in Ports Control 0 Register. There is a bit per port.
> However assertion of the
> >
> > +/* Routine calculate single queue shares address space */ static int
> > +mvpp22_calc_shared_addr_space(struct mvpp2_port *port) {
> > + /* If number of CPU's greater than number of threads, return last
> > +* address space
> > +*/
> > + if (num_active_cpus() >=
On Sun, Jan 10, 2021 at 06:09:39PM +, Stefan Chulski wrote:
> > > > > + } else {
> > > > > + priv->sram_pool = of_gen_pool_get(dn, "cm3-mem", 0);
> > > > > + if (!priv->sram_pool) {
> > > > > + dev_warn(>dev, "DT is too old, TX FC
> > > >
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